Re: [gem5-users] Non exclusive cache in gem5

2017-07-15 Thread Muhammad Avais
Hi Thanks for your response, In 'gem5', i have declared cache 'mostly exclusive' as recommended by you. I have also set "writeback_clean" parameter to true of cache which is closer to CPU. Now, i want that this 'mostly

[gem5-users] Floating Point exception when changing the address mapping scheme

2017-07-15 Thread Sneha Ved
Hi, When I change the address mapping scheme for gem5+ARM from RoRaBaChCo to RoRaBaCoCh, the simulation aborts with a floating point exception. Why should this be the case when the simulation runs to completion in RoRaBaChCo? Thank you. Best Regards, Sneha N Ved

Re: [gem5-users] undefined reference to `vtable for Port

2017-07-15 Thread Oscar Rosell
Hi, This looks just like a C++ error. Check solution for: https://stackoverflow.com/questions/3065154/undefined-reference-to-vtable Regards, Oscar > On 15 Jul 2017, at 17:47, Neu, Markus

[gem5-users] undefined reference to `vtable for Port

2017-07-15 Thread Neu, Markus
Hallo, at the moment i try to add a additional port to the cache.cc/.hh. The idea is to send a copy of the packets to a new module. I use a example from: learning.gem5.org/book/part2/memoryobject.html as template for the port