[m5-users] ALPHA_FS Kernel panic - not syncing: Aiee, killing interrupt handler!

Hi, I have built a couple of the PARSEC benchmarks to run under alpha-linux and have a disk image set up with these binaries and input files to run in M5 ALPHA_FS. I have run the complete blackscholes benchmark using 4 cores/4 threads with no problems. Currently, I am trying scale up the

Re: [m5-users] ALPHA_FS Kernel panic - not syncing: Aiee, killing interrupt handler!

M5 in the repository and see if that solves the problem. If not comparing the atomic trace to the detailed timing trace would probably give you an idea about where it's going wrong. Ali On Jul 9, 2008, at 2:23 AM, Joel Hestness wrote: Hi, I have built a couple of the PARSEC

[m5-users] Running M5 in Condor

Hi, Has anyone tried to run M5 under Condor? I am getting very basic errors like ImportError: No module named m5.main when running a test try. I am wondering if there are conflicts with the Python interpretter embedded in the simulator since Condor doesn't support running Python scripts

[m5-users] Instruction counts

Hi, I am looking at instruction counts that are output in m5stats.txt for a couple simulations that I have run. I am using ALPHA_FS with the detailed core, and I am confused about the values that are output. In m5stats.txt, the value 'sim_insts' claims to the the number of instructions

Re: [m5-users] Resend: Possible M5 Contributions

mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list

[m5-users] Creating/Modifying disk images without sudo or root access

Hi, I seem to recall reading in the mailing list about how to create and modify disk images without having sudo or root access on a machine. I have searched through the archives, and I can't find anything about it. Is there a way to do this? Thanks, Joel -- Joel Hestness PhD Student

Re: [m5-users] Creating/Modifying disk images without sudo or root access

://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org

Re: [m5-users] What do I need to run my own benchmark on full system mode?

@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list m5-users@m5sim.org http

[m5-users] no contention bus in detailed simulation

in detailed simulation? Thanks, Joel Revisions: Old: changeset: 5589:733318abb7b1 Current: changeset: 6283:94c016415053 -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness gdb --args ./build

Re: [m5-users] no contention bus in detailed simulation

and the attachment... On Fri, Nov 27, 2009 at 6:31 PM, Joel Hestness hestn...@cs.utexas.eduwrote: Hi Steve, Thanks for the quick response. I tried the m5 repository and ran into the same issue. I have attached the updated src/mem/bus.cc that we had in our old source. The changes

[m5-users] ALPHA crosscompiler info

-- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users

[m5-users] Infrastructure for running PARSEC 2.1 on M5

://www.cs.utexas.edu/~cart/parsec_m5/ . Let us know if you have additions or questions. Thank you, Joel -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness

[m5-users] Linux v2.6.27 limits the number of cores to 32

an affect on kernels 2.6.22 or 2.6.27. The config script restricts the CONFIG_NR_CPUS flag to 2-32 cores for kernel versions 2.6.22 and 2.6.26. Can someone give some insight into how to fix this so the v2.6.27 scheduler works with 64 cores? Thank you, Joel -- Joel Hestness PhD Student

Re: [m5-users] Linux v2.6.27 limits the number of cores to 32

with M5 kernel modifications could verify that this is a valid correction and fix the M5 linux-patches repo to include this change. The affected versions of linux-2.6 are v2.6.22 and v2.6.27. Thanks, Joel On Wed, Mar 3, 2010 at 3:50 PM, Joel Hestness hestn...@cs.utexas.eduwrote: Hi, I am

Re: [m5-users] PARSEC 2.1 with m5 - segfault!

disk image are you using as well? You need to make sure the libraries in the disk image you are running are compatible with the benchmarks libc (your compiler) as well. As libc is not entirely statically link. On Wed, Mar 24, 2010 at 2:44 PM, Joel Hestness hestn...@cs.utexas.eduwrote: Hi

[m5-users] Fwd: Checkpointing PARSEC benchmark in m5.

in m5. To: Joel Hestness jthestn...@gmail.com Hey Joel, I haven't ever seen this error. It looks like from his commands that is doing everything right so I am not sure why it is crashing. Mark On Sun, Apr 4, 2010 at 8:16 PM, Joel Hestness jthestn...@gmail.com wrote: Hey Mark, Do you have any

Re: [m5-users] PARSEC multi core

at the end of running: Exiting @ cycle 2267922695500 because switchcpu is this a normal ending? Thanks, Sheng ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student

Re: [m5-users] PARSEC multi core

-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users

Re: [m5-users] DPRINT information of PARSEC's ROI

-- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users

Re: [m5-users] [m5-dev] Regression tests for X86

guessing it isn't too bad. Gabe ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http

Re: [m5-users] Some of PARSEC benchmarks never end.

expecting it to work stable? Thanks in advance, Aleksei ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science

Re: [m5-users] What is a reasonable size for memory under ALPHA_FS?

___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness

Re: [m5-users] Cross Compile Linux Kernel for M5 simulator

/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo

Re: [m5-users] Cannot resume checkpoint

___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu/~hestness

Re: [m5-users] Cannot resume checkpoint

, Joel Hestness hestn...@cs.utexas.eduwrote: Hi Sheng, Did you collect the checkpoints from a simulated system with 512MB of memory? The checkpoints encode the current state of memory in the simulated system including the capacity, so you'll need to make sure that the simulated system

Re: [m5-users] Tracing does not work

facility it self that Nate corrected yesterday. Nilay ___ m5-users mailing list m5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/m5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science

Re: [gem5-users] McPAT and M5

? (or if there is any other elegant way to use McPAT with M5?) Thanks much, Tony ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users -- Joel Hestness PhD Student, Computer Architecture Dept

Re: [gem5-users] Question about checkpoint

, Atieh ___ gem5-users mailing list gem5-users@m5sim.org http://m5sim.org/cgi-bin/mailman/listinfo/gem5-users -- Joel Hestness PhD Student, Computer Architecture Dept. of Computer Science, University of Texas - Austin http://www.cs.utexas.edu

Re: [gem5-users] Question about checkpoint

mode? Regards, Atieh On Wed, Jun 1, 2011 at 8:41 PM, Joel Hestness hestn...@cs.utexas.eduwrote: Hi Atieh, You can take checkpoints within the benchmark by instrumenting the code with the M5 magic instructions. You will need to grab a few files from ./util/m5/ and move them to the source