Simon Marlow wrote:
I'm not a sparc expert, would anyone like to suggest a patch?
From the top of my head (sorry, I forgot my SUN Enterprise Server at work :-):
/* the flush instruction works on double words */
inline void flushCacheOnSPARC(int64_t* from, int64_t* to) {
while (from to)
Wolfgang Thaller wrote:
[...] Can anyone with sparc experience think of a reason
why cache flushing
should _not_ be necessary here?
Synchronizing the data/instruction caches *and* the caches of
different
processors (most people forget the latter) is necessary for
both PowerPC
