Re: [Intel-gfx] [PATCH] drm/i915: dont use i915_driver_unload() to cleanup failed vblank init

2010-11-17 Thread Chris Wilson
On Wed, 17 Nov 2010 14:24:53 +0800, Jeremy Kerr jeremy.k...@canonical.com wrote: Currently, i915_driver_load calls i915_driver_unload if drm_vblank_init fails. However, we have not yet fully initialised drm_i915_private (eg. -hangcheck_timer), so we're calling unload from an inconsistent

[Intel-gfx] (no subject)

2010-11-17 Thread Thantry, Hariharan L
Hi folks, I am a bit new to graphics, but had a few questions that I was hoping that someone could answer for me. I hope this is the right forum to ask these questions. My interest is in seeing whether I can use the Intel integrated graphics part for non-graphics (GPGPU) work, while driving

[Intel-gfx] [PATCH 5/6] drm/i915: Also reinit the BSD and BLT rings after a GPU reset.

2010-11-17 Thread Eric Anholt
Signed-off-by: Eric Anholt e...@anholt.net --- drivers/gpu/drm/i915/i915_drv.c |7 +-- 1 files changed, 5 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index 57e892d..af2de29 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++

[Intel-gfx] [PATCH 6/6] drm/i915: Add support for GPU reset on gen6.

2010-11-17 Thread Eric Anholt
This has proven sufficient to recover from a hang of the GPU using the gem_bad_blit test while at the KMS console then starting X. When attempting the same during an X session, the timer doesn't appear to trigger. Signed-off-by: Eric Anholt e...@anholt.net --- drivers/gpu/drm/i915/i915_drv.c |

[Intel-gfx] [PATCH 4/6] drm/i915: Apply a workaround for transitioning from DP on pipe B to HDMI.

2010-11-17 Thread Eric Anholt
This only applies to Ironlake. Signed-off-by: Eric Anholt e...@anholt.net --- drivers/gpu/drm/i915/intel_dp.c | 21 + 1 files changed, 21 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c index c8e0055..252bf7c

[Intel-gfx] [PATCH 2/6] drm/i915: Set the transcoder port to none when disabling DP.

2010-11-17 Thread Eric Anholt
The specs say to do so. Signed-off-by: Eric Anholt e...@anholt.net --- drivers/gpu/drm/i915/i915_reg.h |1 + drivers/gpu/drm/i915/intel_display.c |1 + 2 files changed, 2 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h

[Intel-gfx] [PATCH 3/6] drm/i915: Always set the DP transcoder config to 8BPC.

2010-11-17 Thread Eric Anholt
The pipe is always set to 8BPC, but here we were leaving whatever previous bits were set by the BIOS in place. Signed-off-by: Eric Anholt e...@anholt.net --- drivers/gpu/drm/i915/i915_reg.h |1 + drivers/gpu/drm/i915/intel_display.c |4 +++- 2 files changed, 4 insertions(+), 1

Re: [Intel-gfx] [PATCH] Encorage dead-code elimination for unused interpolation channels

2010-11-17 Thread Eric Anholt
On Wed, 17 Nov 2010 04:25:25 +, Peter Clifton pc...@cam.ac.uk wrote: After some discussion with Eric on IRC, this is what I came up with (which appears to work!) The other way (fix up dead code eliminator) ended up deleting the same gen code while also deleting C code. As I thought about

[Intel-gfx] [PATCH] drm/i915: Fix restore of 965 fence regs since the register tracing change.

2010-11-17 Thread Keith Packard
We were reading our 64-bit value in I915_READ64 and returning 32 bits of it. The restoration of fence regs at resume then had a zero end value, and the fence had no effect. Version 2: Split register access functions into per-size versions Sharing code between different sizes seemed reasonable