On Tue, 22 Mar 2011 09:27:51 +0800, Zhenyu Wang zhen...@linux.intel.com wrote:
Just mean to follow the doc, it matches the sequence of RC6 enabling steps
from GT PM programming doc, not sure if it's strictly required.
But as you point out, the docs do also outline the current method as well.
I had some fun playing around with Eric's patch to enable use of LLC on
SandyBridge and built up a fair amount of complementary changes
-Chris
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... to clarify just how we use it inside the driver. We still need to
translate through agp_type for interface into the fake AGP driver.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_debugfs.c | 11 ++-
drivers/gpu/drm/i915/i915_drv.h |
Rely on the GPU snooping into the CPU cache for appropriately bound
objects on MI_FLUSH. Or perhaps one day we will have a cache-coherent
CPU/GPU package...
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_gem.c |8
1 files changed, 8 insertions(+),
We only hold the mapped pages for the duration of the memcpy, and never
sleep with them, so we can safely use the cheaper atomic variants of
kmap.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_gem.c | 16
1 files changed, 8 insertions(+), 8
From: Eric Anholt e...@anholt.net
This provided a 10.4% +/- 1.5% (n=3) performance improvement on
openarena on my laptop. We have more room to improve with doing LLC
caching for display using GFDT, and in doing LLC+MLC caching, but this
was an easy performance win and incremental improvement
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_gem.c | 184 --
1 files changed, 174 insertions(+), 10 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 37a8a29..8f60bc5 100644
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_gem.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 96d4e64..afb5aaf 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
Replace the three nearly identical copies of the code with a single
function. And take advantage of the opportunity to do some
micro-optimisation: avoid the vmalloc if at all possible and also avoid
dropping the lock unless we are forced to acquire the mm semaphore.
Signed-off-by: Chris Wilson
From: Eric Anholt e...@anholt.net
The simplest and common method for ensuring scanout coherency on all
chipsets is to mark the scanout buffers as uncached (and for
userspace to remember to flush the render cache every so often).
We can improve upon this for later generations by marking scanout
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_drv.h |6 +-
drivers/gpu/drm/i915/i915_gem.c | 24 +++-
drivers/gpu/drm/i915/i915_gem_gtt.c |8 +---
drivers/gpu/drm/i915/intel_ringbuffer.c |6 --
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/intel_display.c |2 +-
drivers/gpu/drm/i915/intel_overlay.c |2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_display.c
b/drivers/gpu/drm/i915/intel_display.c
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_debugfs.c|5 ++-
drivers/gpu/drm/i915/i915_drv.h| 17 +++--
drivers/gpu/drm/i915/i915_gem.c| 55 +++-
drivers/gpu/drm/i915/i915_gem_execbuffer.c |
---
drivers/gpu/drm/i915/i915_drv.h| 10 +-
drivers/gpu/drm/i915/i915_gem.c| 166 +---
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 33 +-
drivers/gpu/drm/i915/intel_overlay.c |4 +-
drivers/gpu/drm/i915/intel_ringbuffer.c|
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_drv.h|9 -
drivers/gpu/drm/i915/i915_gem.c| 52 ++-
drivers/gpu/drm/i915/i915_gem_execbuffer.c | 43 +--
I'm building a HD network media player device and thought VAAPI was supposed to
be supported on Pineview, am I wrong?
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On Tue, 2011-03-22 at 14:52 +, Steven Newbury wrote:
I'm building a HD network media player device and thought VAAPI was supposed
to be
supported on Pineview, am I wrong?
To answer my own question somewhat, from the list here:
http://en.wikipedia.org/wiki/Intel_GMA
It's clear the
On Tue, Mar 22, 2011 at 12:29 PM, Steven Newbury st...@snewbury.org.uk wrote:
On Tue, 2011-03-22 at 14:52 +, Steven Newbury wrote:
I'm building a HD network media player device and thought VAAPI was supposed
to be
supported on Pineview, am I wrong?
To answer my own question somewhat,
Might be nice to have the patch message mention that the bulk of this
patch is simply renaming and moving i915_gem_execbuffer_sync_rings. In
fact, doing this in two patches would make the actual change a whole lot
easier to find.
--
keith.pack...@intel.com
pgpogFDNCbIgt.pgp
Description: PGP
I've done more testing with below patches, eliminated some in first
patch set that doesn't affect suspend issue it seems.
The test was done with one rev9 SNB on two boards DH67GD and DQ67SW
with latest bios. And it both passed over 100 cycles of S3 testing.
Without these, upstream kernel still
Some bits should only be set when enable FBC.
Signed-off-by: Zhenyu Wang zhen...@linux.intel.com
---
drivers/gpu/drm/i915/i915_reg.h |4 +++-
drivers/gpu/drm/i915/intel_display.c | 27 ++-
2 files changed, 17 insertions(+), 14 deletions(-)
diff --git
DSPARB is reserved on G33 and not available on Gen6.
Signed-off-by: Zhenyu Wang zhen...@linux.intel.com
---
drivers/gpu/drm/i915/i915_suspend.c |6 --
1 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_suspend.c
b/drivers/gpu/drm/i915/i915_suspend.c
Move RC6 enable after we reset rings for all regines, if e.g render ring
is disabled when RC6 enable on Sandybridge, hw won't save render context
image if any chance when enter RC6. Also match the order like we do in
driver load.
Signed-off-by: Zhenyu Wang zhen...@linux.intel.com
---
On Wed, 23 Mar 2011 10:21:07 +0800, Zhenyu Wang zhen...@linux.intel.com wrote:
DSPARB is reserved on G33 and not available on Gen6.
Does this fix a reported problem? Or just spec compliance?
--
keith.pack...@intel.com
pgpSsTjeknBqr.pgp
Description: PGP signature
On 2011.03.23 12:03:41 +0900, Keith Packard wrote:
On Wed, 23 Mar 2011 10:21:07 +0800, Zhenyu Wang zhen...@linux.intel.com
wrote:
DSPARB is reserved on G33 and not available on Gen6.
Does this fix a reported problem? Or just spec compliance?
I didn't verify if this one is really
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