Re: [Intel-gfx] X11 performance regressions

2011-05-12 Thread Knut Petersen
12Operation -- - 965000.0 0.016 10x10 wide rectangle outline Something is still not quite right here. This should be mostly CPU bound, and even my Atom gets 734k. Can you check that (a) it is CPU bound and (b) the worst offenders according to

Re: [Intel-gfx] X11 performance regressions

2011-05-12 Thread Chris Wilson
On Thu, 12 May 2011 09:19:39 +0200, Knut Petersen knut_peter...@t-online.de wrote: 12Operation -- - 965000.0 0.016 10x10 wide rectangle outline Something is still not quite right here. This should be mostly CPU bound, and even my Atom

Re: [Intel-gfx] X11 performance regressions

2011-05-12 Thread Knut Petersen
Please do something like 'perf record -f -g -a x11perf -d :0 -worect10; perf report | head -150' and paste the output. -Chris Attached find the perf log Knut # Events: 19K cycles # # Overhead CommandShared Object

Re: [Intel-gfx] X11 performance regressions

2011-05-12 Thread Chris Wilson
On Thu, 12 May 2011 10:24:00 +0200, Knut Petersen knut_peter...@t-online.de wrote: Please do something like 'perf record -f -g -a x11perf -d :0 -worect10; perf report | head -150' and paste the output. -Chris Attached find the perf log Oh, damage. A compositing WM? If you turn off

Re: [Intel-gfx] X11 performance regressions

2011-05-12 Thread Knut Petersen
Oh, damage. A compositing WM? If you turn off compositing, do you see similar performance levels to xorg-1.6? -Chris That makes difference 16.300 reps speed up to 1.280.000 reps ... 78.5 times faster. I think I will rerun the tests. cu, Knut

Re: [Intel-gfx] X11 performance regressions

2011-05-12 Thread Adam Jackson
On Wed, 2011-05-11 at 23:22 +0200, Knut Petersen wrote: Yes, there is 15400.00.54 GetProperty 15500.00.54 QueryPointer but we also see 815.01.21 X protocol NoOperation NoOp isn't a round trip, it does not generate a reply. That test measures how fast

[Intel-gfx] [PATCH 04/16] drm/i915: Only print out the actual number of fences for i915_error_state

2011-05-12 Thread Chris Wilson
From: Daniel Vetter daniel.vet...@ffwll.ch Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk --- drivers/gpu/drm/i915/i915_debugfs.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git

[Intel-gfx] [PATCH 03/16] drm/i915: s/addr ~PAGE_MASK/offset_in_page(addr)/

2011-05-12 Thread Chris Wilson
Convert our open coded offset_in_page() to the common macro. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk --- drivers/gpu/drm/i915/i915_gem.c | 21 ++--- 1 files changed, 10 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c

[Intel-gfx] [PATCH 07/16] drm/i915/crt: Explicitly return false if connected to a digital monitor

2011-05-12 Thread Chris Wilson
Rather than proceed on and silently return false by default, mention why we rejected the presence of an EDID as implying the presence of a VGA monitor. (The question arises whether there is a broken EDID which falsely reports a digital connection when attached by VGA.) Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 06/16] drm/i915: Replace ironlake_compute_wm0 with g4x_compute_wm0

2011-05-12 Thread Chris Wilson
The computation of the first-level watermarks for g4x and gen5+ are based on the same algorithm, so we can refactor those code paths to use a single function. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk --- drivers/gpu/drm/i915/intel_display.c | 88 --

[Intel-gfx] [PATCH 13/16] drm/i915: Remove unused enum chip_family

2011-05-12 Thread Chris Wilson
Superseded by the tracking the render generation in the chipset capabiltiies struct. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk --- drivers/gpu/drm/i915/i915_drv.h |7 --- 1 files changed, 0 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH 12/16] drm/915: fix relaxed tiling on gen2: tile height

2011-05-12 Thread Chris Wilson
From: Daniel Vetter daniel.vet...@ffwll.ch A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Userspace was broken and assumed 8 rows. Chris Wilson noted that the kernel unfortunately can't reliable check that because libdrm rounds up the size to the next bucket. Signed-off-by:

[Intel-gfx] [PATCH 16/16] drm/i915: Share the common force-audio property between connectors

2011-05-12 Thread Chris Wilson
Make the audio property creation routine common and share the single property between the connectors. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk --- drivers/gpu/drm/i915/i915_drv.h|1 + drivers/gpu/drm/i915/intel_dp.c| 15 ++- drivers/gpu/drm/i915/intel_drv.h

[Intel-gfx] [PATCH 10/16] drm/i915: Retire requests before disabling pagefaults

2011-05-12 Thread Chris Wilson
As we cannot wait upon an object to be released by the GPU once we have disabled pagefaults, process any pending retirements first in the hope that we move any potential relocations off the active list. References: https://bugs.freedesktop.org/show_bug.cgi?id=35733 Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 09/16] drm/i915/gmbus: Reset the controller on initialisation

2011-05-12 Thread Chris Wilson
Toggle the Software Clear Interrupt bit which resets the controller to clear any prior BUS_ERROR condition before we begin to use the controller in earnest. Suggested-by: Ben Widawsky b...@bwidawsk.net Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk --- drivers/gpu/drm/i915/intel_i2c.c |

[Intel-gfx] [PATCH 14/16] drm/i915: Use PCI-ID to identify Broadwater and Crestline

2011-05-12 Thread Chris Wilson
... as they only had a single PCI-ID each, and so using the pci-id is easier than using a capability bit. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk --- drivers/gpu/drm/i915/i915_debugfs.c |2 -- drivers/gpu/drm/i915/i915_drv.c |9 +++-- drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH 15/16] drm/i915: Convert partial to full CPU read domain if we touch every page

2011-05-12 Thread Chris Wilson
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk --- drivers/gpu/drm/i915/i915_gem.c |4 +++- 1 files changed, 3 insertions(+), 1 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c index afdbbd9..b92e8ea 100644 ---

[Intel-gfx] [PATCH 08/16] drm/i915/i2c: Convert from using GMBUS1 + reg_offset idiom to reg + 0

2011-05-12 Thread Chris Wilson
Keith complained that GMBUSx + reg_offset was ugly. An alternative naming scheme which is more consistent with the reset of the code base is to store the address of the GMBUS0 and then reference each of the GMBUSx registers as an offset from GMBUS0. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 02/16] drm/i915: Refactor pwrite/pread to use single copy of get_user_pages

2011-05-12 Thread Chris Wilson
Replace the three nearly identical copies of the code with a single function. And take advantage of the opportunity to do some micro-optimisation: avoid the vmalloc if at all possible and also avoid dropping the lock unless we are forced to acquire the mm semaphore. Measuring the impact of the

[Intel-gfx] [PATCH 01/16] drm/i915: Cache GT fifo count for SandyBridge

2011-05-12 Thread Chris Wilson
The read back of the available FIFO entries is vital for system stability, but extremely costly. However, we only need a guide so as to avoid eating into the reserved entries and since we are the only consumer we can cache the read of the count from the last write. Signed-off-by: Chris Wilson

[Intel-gfx] [PATCH 05/16] drm/i915/tv: Use a direct pointer for tv_mode

2011-05-12 Thread Chris Wilson
Instead of scanning through the static array using strcmp to find our matching tv_mode, just keep a direct link around. The historical reason for the strcmp was to match the connection property tv format, but now that property is translated for us into an index by the drm core. Signed-off-by:

Re: [Intel-gfx] Graphical corruption post 2.6.38

2011-05-12 Thread Paul Menzel
Am Freitag, den 29.04.2011, 22:16 +0200 schrieb Paul Menzel: Am Montag, den 25.04.2011, 22:13 +0100 schrieb Chris Wilson: On Mon, 25 Apr 2011 18:58:01 +0200, Paul Menzel paulepan...@users.sourceforge.net wrote: On Wed, Mar 23, 2011 at 14:08:24 +, Chris Wilson wrote: commit

[Intel-gfx] [PATCH 1/2] drm/i915: Select correct pipe during TV detect

2011-05-12 Thread Keith Packard
Signed-off-by: Keith Packard kei...@keithp.com --- drivers/gpu/drm/i915/intel_tv.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c index 6b22c1d..876064c 100644 --- a/drivers/gpu/drm/i915/intel_tv.c

[Intel-gfx] [PATCH 2/2] drm/i915: TVDAC_STATE_CHG does not indicate successful load-detect

2011-05-12 Thread Keith Packard
Do not use this bit to indicate that load detection has completed, instead just wait for vblank, at which point the load registers will have been updated. Signed-off-by: Keith Packard kei...@keithp.com --- drivers/gpu/drm/i915/intel_tv.c | 40 +++--- 1 files

Re: [Intel-gfx] [PATCH 02/16] drm/i915: Refactor pwrite/pread to use single copy of get_user_pages

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:10 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: + pages = kmalloc(n*sizeof(struct page *), + GFP_KERNEL | __GFP_NORETRY | __GFP_NOWARN); + if (pages == NULL) { + pages = drm_malloc_ab(n, sizeof(struct page *)); +

Re: [Intel-gfx] [PATCH 03/16] drm/i915: s/addr ~PAGE_MASK/offset_in_page(addr)/

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:11 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: Convert our open coded offset_in_page() to the common macro. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Reviewed-by: Keith Packard kei...@keithp.com -- keith.pack...@intel.com pgpjf0bivf3pS.pgp

Re: [Intel-gfx] [PATCH 09/16] drm/i915/gmbus: Reset the controller on initialisation

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:17 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: Toggle the Software Clear Interrupt bit which resets the controller to clear any prior BUS_ERROR condition before we begin to use the controller in earnest. Looks reasonable, except for the bad register offsets

Re: [Intel-gfx] [PATCH 05/16] drm/i915/tv: Use a direct pointer for tv_mode

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:13 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: Instead of scanning through the static array using strcmp to find our matching tv_mode, just keep a direct link around. The historical reason for the strcmp was to match the connection property tv format, but now

Re: [Intel-gfx] [PATCH 11/16] drm/i915: not finding a fence is a non-recoverable condition

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:19 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: - return -ENOSPC; + return -EDEADLK; Would be nice to have the kernel print out a debugging message at this point -- the only way to hit this is from a bug in user or kernel code. --

Re: [Intel-gfx] [PATCH 08/16] drm/i915/i2c: Convert from using GMBUS1 + reg_offset idiom to reg + 0

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:16 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: - I915_WRITE(GMBUS0 + reg_offset, 0); + intel_i2c_reset(dev_priv-dev); This looks like an unrelated change. Please split this out. -- keith.pack...@intel.com pgp2uVPK5zOxO.pgp Description: PGP

Re: [Intel-gfx] [PATCH 14/16] drm/i915: Use PCI-ID to identify Broadwater and Crestline

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:22 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: ... as they only had a single PCI-ID each, and so using the pci-id is easier than using a capability bit. This doesn't seem useful to me; it only saves a couple of bits in the struct and replaces that with

Re: [Intel-gfx] [PATCH 15/16] drm/i915: Convert partial to full CPU read domain if we touch every page

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:23 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Can you justify this change with performance data? -- keith.pack...@intel.com pgpwnyNWMT1aq.pgp Description: PGP signature

Re: [Intel-gfx] [PATCH 10/16] drm/i915: Retire requests before disabling pagefaults

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:18 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: As we cannot wait upon an object to be released by the GPU once we have disabled pagefaults, process any pending retirements first in the hope that we move any potential relocations off the active list. This

Re: [Intel-gfx] [PATCH 16/16] drm/i915: Share the common force-audio property between connectors

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:24 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: Make the audio property creation routine common and share the single property between the connectors. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Reviewed-by: Keith Packard kei...@keithp.com --

Re: [Intel-gfx] [PATCH 12/16] drm/915: fix relaxed tiling on gen2: tile height

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:20 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: From: Daniel Vetter daniel.vet...@ffwll.ch A tile on gen2 has a size of 2kb, stride of 128 bytes and 16 rows. Userspace was broken and assumed 8 rows. Chris Wilson noted that the kernel unfortunately can't

Re: [Intel-gfx] [PATCH 13/16] drm/i915: Remove unused enum chip_family

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:21 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: Superseded by the tracking the render generation in the chipset capabiltiies struct. Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk Yes please. Reviewed-by: Keith Packard kei...@keithp.com --

Re: [Intel-gfx] [PATCH 06/16] drm/i915: Replace ironlake_compute_wm0 with g4x_compute_wm0

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:14 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: The computation of the first-level watermarks for g4x and gen5+ are based on the same algorithm, so we can refactor those code paths to use a single function. g4x_compute_wm0 takes a plane. ironlake_compute_wm0

Re: [Intel-gfx] [PATCH 04/16] drm/i915: Only print out the actual number of fences for i915_error_state

2011-05-12 Thread Keith Packard
On Thu, 12 May 2011 22:17:12 +0100, Chris Wilson ch...@chris-wilson.co.uk wrote: From: Daniel Vetter daniel.vet...@ffwll.ch Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk This change seems correct. Would be nice if this code printed