On Thu, 13 Oct 2011 16:23:33 -0700, Ben Widawsky b...@bwidawsk.net wrote:
On Thu, 13 Oct 2011 16:07:57 -0700
Eric Anholt e...@anholt.net wrote:
---
I kept reviewing the B-Spec on systems with weird issues and
hand-decoding each interesting register (for example, is everything
still
On Fri, Oct 14, 2011 at 02:52:50PM +0200, Dieter Mummenschanz wrote:
the attached archive contains the i915_error_state after a gpu
hang/resume. syslog details see below. I've also attached the dmesg. I
hope this helps to verify if this is a known issue or sonething new. If
you need more
On Fri, Oct 14, 2011 at 06:01:37PM +0200, Daniel Vetter wrote:
Ok, on a Sandybridge machine I also need the settings of all the i915
module options, i.e.
cd /sys/module/i915/parameters
grep .* *
Ignore that, I've forgotten to delete this after reading your other mail.
Please ensure that you
The previous code was confused about units, which is pretty reasonable
given that the units themselves are confusing.
Signed-off-by: Adam Jackson a...@redhat.com
---
drivers/gpu/drm/i915/intel_dp.c | 26 +-
1 files changed, 21 insertions(+), 5 deletions(-)
diff --git
These were just working around the math being wrong.
Signed-off-by: Adam Jackson a...@redhat.com
---
drivers/gpu/drm/i915/intel_dp.c | 20 ++--
1 files changed, 2 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
Hi Daniel,
sorry for screwing up the message. I've just replied to your mail using
(reply-all). Is it because web mailers are not allowed or are there specific
rules to follow?
I've tried both intel_iommu=off with rc6 enabled and just rc6 disabled - no
changes. gpu still hangs/resumes and
On Fri, Oct 14, 2011 at 09:27:35PM +0200, Dieter Mummenschanz wrote:
Hi Daniel,
sorry for screwing up the message. I've just replied to your mail using
(reply-all). Is it because web mailers are not allowed or are there
specific rules to follow?
Seems to work now ...
I've tried both
On Thu, Oct 6, 2011 at 8:09 AM, Jesse Barnes jbar...@virtuousgeek.orgwrote:
On Wed, 5 Oct 2011 22:45:55 -0700
Simon Que s...@chromium.org wrote:
Hi,
Here's a patch to introduce a DMI-based SSC frequency selection in
intel_bios.c. Instead of always selecting the alternate SSC
From: Paulo Zanoni paulo.r.zan...@intel.com
v2: add a CPT-specific macro, make code cleaner
v3: fix commit message
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41272
Cc: sta...@kernel.org
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
drivers/gpu/drm/i915/i915_reg.h |8
From: Paulo Zanoni paulo.r.zan...@intel.com
Also making the differences between HDMI{B,C,D} and SDVO registers for
non-PCH, IBX and CPT more explicit.
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
drivers/gpu/drm/i915/i915_reg.h | 49 --
The obvious counterpart to is_pch_edp(). Convert existing instances of
the idiom to the new routine.
Signed-off-by: Adam Jackson a...@redhat.com
---
drivers/gpu/drm/i915/intel_dp.c | 15 +--
1 files changed, 13 insertions(+), 2 deletions(-)
diff --git
According to the gen6 docs, only the DP_A port (on-CPU eDP) still uses
the old IBX bit shift for the link training pattern setup bits.
Signed-off-by: Adam Jackson a...@redhat.com
---
drivers/gpu/drm/i915/intel_dp.c | 12 ++--
1 files changed, 6 insertions(+), 6 deletions(-)
diff --git
On Fri, 14 Oct 2011 18:16:22 -0300, przan...@gmail.com wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
v2: add a CPT-specific macro, make code cleaner
v3: fix commit message
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=41272
Cc: sta...@kernel.org
Signed-off-by: Paulo Zanoni
On Fri, 14 Oct 2011 18:17:41 -0300, przan...@gmail.com wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Suggested-by: Chris Wilson ch...@chris-wilson.co.uk
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
drivers/gpu/drm/i915/i915_debugfs.c |1 +
1 files changed, 1
On Fri, 14 Oct 2011 18:17:09 -0300, przan...@gmail.com wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Also making the differences between HDMI{B,C,D} and SDVO registers for
non-PCH, IBX and CPT more explicit.
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
I'm a little more
In the native backlight driver, use 4096 (0x1000) as the default backlight
period, and use the period as the default max brightness.
The default brightness is defined in a separate function that can be
expanded to allow for different defaults on different systems in the
future.
Change-Id:
On Mon, 26 Sep 2011 09:23:17 +0200
Daniel Vetter dan...@ffwll.ch wrote:
On Sun, Sep 25, 2011 at 04:42:57PM -0700, Ben Widawsky wrote:
static int sandybridge_write_fence_reg(struct drm_i915_gem_object
*obj, diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c
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