Re: [Intel-gfx] [PATCH] drm/i915/vlv: don't wait for vblank after pipe enable

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 12:37 AM, Jesse Barnes jbar...@virtuousgeek.org wrote: Like on ILK, the pipe won't be running until later on. Like on ilk?! Since when is vlv display derived from that? [PATCH 3/4] drm/i915: Kill vblank waits after pipe enable on gmch platforms from Ville makes a more

Re: [Intel-gfx] [Mesa-dev] [rong.r.y...@intel.com: How user space applications load registers on HSW?]

2014-05-13 Thread Daniel Vetter
On Mon, May 12, 2014 at 10:02 AM, Yang, Rong R rong.r.y...@intel.com wrote: Hi, Ken, Thanks for your patch. But how do you release your driver on the HSW products? If can't LRI/LRM from userspace batches, almost all of OpenCL application can't run. So if I want to announce that

Re: [Intel-gfx] [PATCH 1/1] Documentation: drm: describing drm properties exposed by various drivers

2014-05-13 Thread Thierry Reding
On Mon, May 12, 2014 at 10:03:55AM +0200, Daniel Vetter wrote: On Mon, May 12, 2014 at 11:37:53AM +0530, Sagar Arun Kamble wrote: I support approach using docbook to start since there are not lot of properties. Laurent has ack'ed this one. Can we go ahead with this?

Re: [Intel-gfx] [PATCH 1/1] Documentation: drm: describing drm properties exposed by various drivers

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 9:17 AM, Thierry Reding thierry.red...@gmail.com wrote: On Mon, May 12, 2014 at 10:03:55AM +0200, Daniel Vetter wrote: On Mon, May 12, 2014 at 11:37:53AM +0530, Sagar Arun Kamble wrote: I support approach using docbook to start since there are not lot of properties.

Re: [Intel-gfx] [PATCH] [v3] drm/i915/bdw: Only use 2g GGTT for 32b platforms

2014-05-13 Thread Jani Nikula
On Thu, 08 May 2014, Ben Widawsky benjamin.widaw...@intel.com wrote: Daniel requested in the bug that I use a 3GB fallback size. Since this is not in the spec as a valid size, I decided against it. We could potentially add a patch to bump it to 3GB on top of this one. This probably should be

Re: [Intel-gfx] [Mesa-dev] [rong.r.y...@intel.com: How user space applications load registers on HSW?]

2014-05-13 Thread Zou, Nanhai
Hi Daniel, We need a solution for this. Without correct L3 config setting, all the OpenCL programs that use SLM will fail. We cannot set a default L3 config for all OCL programs, because L3 config for SLM will slowdown kernel that are not using SLM. When do you

Re: [Intel-gfx] [PATCH 2/4] drm/i915: Disable/enable planes as the first/last thing during modeset on gmch platforms

2014-05-13 Thread Chris Wilson
On Fri, May 09, 2014 at 12:28:19PM +0300, Ville Syrjälä wrote: On Fri, May 09, 2014 at 07:22:16AM +0100, Chris Wilson wrote: On Thu, May 08, 2014 at 07:23:14PM +0300, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com We already moved the plane

Re: [Intel-gfx] [PATCH igt] tests/kms_fence_pin_leak: Exercise full ppgtt fence pin_count leak in the kernel

2014-05-13 Thread Ville Syrjälä
On Mon, May 12, 2014 at 08:34:07PM +0200, Daniel Vetter wrote: On Mon, May 12, 2014 at 08:46:24PM +0300, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com The kernel full ppgtt support has a bug where it can drop a pinned fence to the floor, hence we

Re: [Intel-gfx] [PATCH v2] drm/i915: State readout and cross-checking for dp_m2_n2

2014-05-13 Thread Vandana Kannan
On May-12-2014 3:57 PM, Ville Syrjälä wrote: On Mon, May 05, 2014 at 01:49:31PM +0530, Vandana Kannan wrote: Adding relevant read out comparison code, in check_crtc_state, for the new member of crtc_config, dp_m2_n2, which was introduced to store link_m_n values for a DP downclock mode (if

Re: [Intel-gfx] [PATCH 05/10] drm: add a path blob property

2014-05-13 Thread Thierry Reding
On Mon, May 12, 2014 at 04:46:42PM +1000, Dave Airlie wrote: From: Dave Airlie airl...@redhat.com This property will be used by the MST code to provide userspace with a path to parse so it can recognise connectors around hotplugs. Signed-off-by: Dave Airlie airl...@redhat.com ---

Re: [Intel-gfx] [PATCH 04/10] drm/crtc: add interface to reinitialise the legacy mode group

2014-05-13 Thread Thierry Reding
On Mon, May 12, 2014 at 04:46:41PM +1000, Dave Airlie wrote: From: Dave Airlie airl...@redhat.com This can be called to update things after dynamic connectors/encoders are created/deleted. Signed-off-by: Dave Airlie airl...@redhat.com --- drivers/gpu/drm/drm_crtc.c | 9 +

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Kill vblank waits after pipe enable on gmch platforms

2014-05-13 Thread Chris Wilson
On Fri, May 09, 2014 at 12:09:46PM +0300, Ville Syrjälä wrote: On Fri, May 09, 2014 at 07:03:09AM +0100, Chris Wilson wrote: On Thu, May 08, 2014 at 07:23:15PM +0300, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com The pipe might not start to

[Intel-gfx] [PATCH] intel-gpu-tools: Move igt tests to intel validation area

2014-05-13 Thread tim . gore
From: Tim Gore tim.g...@intel.com Currently when IGT is built for Android the resulting test executables go to /system/bin, which is not ideal. After discussion with the core validation team i have moved them to /system/vendor/intel/validation/core/igt by setting LOCAL_MODULE_PATH. I have also

Re: [Intel-gfx] [PATCH 10/10] i915: mst topology dumper in debugfs

2014-05-13 Thread Thierry Reding
On Mon, May 12, 2014 at 04:46:47PM +1000, Dave Airlie wrote: [...] @@ -3813,6 +3838,7 @@ static const struct drm_info_list i915_debugfs_list[] = { {i915_pc8_status, i915_pc8_status, 0}, {i915_power_domain_info, i915_power_domain_info, 0}, {i915_display_info,

Re: [Intel-gfx] [PATCH igt] tests/kms_fence_pin_leak: Exercise full ppgtt fence pin_count leak in the kernel

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 11:24:48AM +0300, Ville Syrjälä wrote: On Mon, May 12, 2014 at 08:34:07PM +0200, Daniel Vetter wrote: On Mon, May 12, 2014 at 08:46:24PM +0300, ville.syrj...@linux.intel.com wrote: From: Ville Syrjälä ville.syrj...@linux.intel.com The kernel full ppgtt

[Intel-gfx] [PATCH] drm/i915: WARN_ON fence pin leaks

2014-05-13 Thread Daniel Vetter
The fence pin count should always be = the bo pin count. If that's not the case then we have a funny problem and are leaking references somewhere. Which means we can catch fence pin leaks by checking for the same upper limit as we do for the bo pin count. Inspired by a discussion with Ville about

[Intel-gfx] [PATCH v2 igt] tests/kms_fence_pin_leak: Exercise full ppgtt fence pin_count leak in the kernel

2014-05-13 Thread ville . syrjala
From: Ville Syrjälä ville.syrj...@linux.intel.com The kernel full ppgtt support has a bug where it can drop a pinned fence to the floor, hence we leak the pin_count as the subsequent fence unpin becomes a nop. We can trigger it easily by unbinding a buffer from a ppgtt address space while the

Re: [Intel-gfx] [PATCH v2] drm/i915: State readout and cross-checking for dp_m2_n2

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 01:56:04PM +0530, Vandana Kannan wrote: On May-12-2014 3:57 PM, Ville Syrjälä wrote: On Mon, May 05, 2014 at 01:49:31PM +0530, Vandana Kannan wrote: Adding relevant read out comparison code, in check_crtc_state, for the new member of crtc_config, dp_m2_n2, which was

Re: [Intel-gfx] [PATCH 3/4] drm/i915: Kill vblank waits after pipe enable on gmch platforms

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 09:28:34AM +0100, Chris Wilson wrote: On Fri, May 09, 2014 at 12:09:46PM +0300, Ville Syrjälä wrote: On Fri, May 09, 2014 at 07:03:09AM +0100, Chris Wilson wrote: On Thu, May 08, 2014 at 07:23:15PM +0300, ville.syrj...@linux.intel.com wrote: From: Ville

Re: [Intel-gfx] [PATCH 1/1] Documentation: drm: describing drm properties exposed by various drivers

2014-05-13 Thread Thierry Reding
On Tue, May 13, 2014 at 09:34:45AM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 9:17 AM, Thierry Reding thierry.red...@gmail.com wrote: On Mon, May 12, 2014 at 10:03:55AM +0200, Daniel Vetter wrote: On Mon, May 12, 2014 at 11:37:53AM +0530, Sagar Arun Kamble wrote: I support

Re: [Intel-gfx] [PATCH] intel-gpu-tools: Move igt tests to intel validation area

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 09:34:42AM +0100, tim.g...@intel.com wrote: From: Tim Gore tim.g...@intel.com Currently when IGT is built for Android the resulting test executables go to /system/bin, which is not ideal. After discussion with the core validation team i have moved them to

[Intel-gfx] [PATCH] lib/igt_core: Document testrunner interface a bit

2014-05-13 Thread Daniel Vetter
Also fix up one gtkdoc fumble in igt_fb. We should use symbolic defines if possible instead of just listening the magic 0, 77, 78 values for exit codes, but that's a separate patch. Cc: tim.g...@intel.com Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- lib/igt_core.c | 23

Re: [Intel-gfx] [PATCH v2] drm/i915: State readout and cross-checking for dp_m2_n2

2014-05-13 Thread Vandana Kannan
On May-13-2014 2:28 PM, Daniel Vetter wrote: On Tue, May 13, 2014 at 01:56:04PM +0530, Vandana Kannan wrote: On May-12-2014 3:57 PM, Ville Syrjälä wrote: On Mon, May 05, 2014 at 01:49:31PM +0530, Vandana Kannan wrote: Adding relevant read out comparison code, in check_crtc_state, for the new

Re: [Intel-gfx] [PATCH] drm/i915: WARN_ON fence pin leaks

2014-05-13 Thread Chris Wilson
On Tue, May 13, 2014 at 10:55:40AM +0200, Daniel Vetter wrote: The fence pin count should always be = the bo pin count. If that's not the case then we have a funny problem and are leaking references somewhere. Which means we can catch fence pin leaks by checking for the same upper limit as

Re: [Intel-gfx] [PATCH] drm/i915: WARN_ON fence pin leaks

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 12:05 PM, Chris Wilson ch...@chris-wilson.co.uk wrote: Cc: Ville Syrjälä ville.syrj...@linux.intel.com Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- +bool +i915_gem_object_pin_fence(struct drm_i915_gem_object *obj) +{ + if (obj-fence_reg !=

[Intel-gfx] [PATCH] drm/i915: WARN_ON fence pin leaks

2014-05-13 Thread Daniel Vetter
The fence pin count should always be = the bo pin count. If that's not the case then we have a funny problem and are leaking references somewhere. Which means we can catch fence pin leaks by checking for the same upper limit as we do for the bo pin count. Inspired by a discussion with Ville about

Re: [Intel-gfx] [PATCH 10/10] i915: mst topology dumper in debugfs

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 10:33:27AM +0200, Thierry Reding wrote: On Mon, May 12, 2014 at 04:46:47PM +1000, Dave Airlie wrote: [...] @@ -3813,6 +3838,7 @@ static const struct drm_info_list i915_debugfs_list[] = { {i915_pc8_status, i915_pc8_status, 0}, {i915_power_domain_info,

Re: [Intel-gfx] [PATCH] drm/i915: WARN_ON fence pin leaks

2014-05-13 Thread Chris Wilson
On Tue, May 13, 2014 at 12:10:24PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 12:05 PM, Chris Wilson ch...@chris-wilson.co.uk wrote: Cc: Ville Syrjälä ville.syrj...@linux.intel.com Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- +bool +i915_gem_object_pin_fence(struct

Re: [Intel-gfx] [3.14.0-rc4] regression: drm FIFO underruns

2014-05-13 Thread Jörg Otte
2014-05-12 21:03 GMT+02:00 Daniel Vetter dan...@ffwll.ch: On Mon, May 12, 2014 at 01:25:24PM +0200, Jörg Otte wrote: 2014-05-11 18:49 GMT+02:00 Daniel Vetter daniel.vet...@ffwll.ch: On Sat, May 10, 2014 at 10:52 AM, Jörg Otte jrg.o...@gmail.com wrote: On Fri, May 09, 2014 at 05:14:38PM

Re: [Intel-gfx] [PATCH 10/10] i915: mst topology dumper in debugfs

2014-05-13 Thread Thierry Reding
On Tue, May 13, 2014 at 12:18:35PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 10:33:27AM +0200, Thierry Reding wrote: On Mon, May 12, 2014 at 04:46:47PM +1000, Dave Airlie wrote: [...] @@ -3813,6 +3838,7 @@ static const struct drm_info_list i915_debugfs_list[] = {

Re: [Intel-gfx] [3.14.0-rc4] regression: drm FIFO underruns

2014-05-13 Thread Chris Wilson
On Tue, May 13, 2014 at 12:38:41PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 12:29 PM, Jörg Otte jrg.o...@gmail.com wrote: Branch drm-intel-nightly as of ed60c27 drm-intel-nightly: 2014y-05m-09d-21h-51m-45s integration manifest looks badly: - KDE splash screen on boot-up is

Re: [Intel-gfx] [PATCH 1/1] Documentation: drm: describing drm properties exposed by various drivers

2014-05-13 Thread Laurent Pinchart
Hi Daniel, On Tuesday 13 May 2014 09:34:45 Daniel Vetter wrote: On Tue, May 13, 2014 at 9:17 AM, Thierry Reding wrote: On Mon, May 12, 2014 at 10:03:55AM +0200, Daniel Vetter wrote: On Mon, May 12, 2014 at 11:37:53AM +0530, Sagar Arun Kamble wrote: I support approach using docbook to

[Intel-gfx] [PATCH] drm/i915: Work-around garbage DR4 from UXA

2014-05-13 Thread Daniel Vetter
Somehow UXA submits a completely bogus DR4 value since essentially forever. It was originally introduced in commit bade7d7d2505a10a8a7d24b084aff9742e2d6d64 Author: Eric Anholt e...@anholt.net Date: Fri Jun 6 14:03:25 2008 -0700 Use the DRM for submitting batchbuffers when available. and

Re: [Intel-gfx] [3.14.0-rc4] regression: drm FIFO underruns

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 12:59 PM, Chris Wilson ch...@chris-wilson.co.uk wrote: On Tue, May 13, 2014 at 12:38:41PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 12:29 PM, Jörg Otte jrg.o...@gmail.com wrote: Branch drm-intel-nightly as of ed60c27 drm-intel-nightly:

Re: [Intel-gfx] [PATCH 1/1] Documentation: drm: describing drm properties exposed by various drivers

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 1:02 PM, Laurent Pinchart laurent.pinch...@ideasonboard.com wrote: Also eventually I want to pull these tables directly out of source code comments - everything else tends to never get updated when the code changes. On the subject of moving documentation from docbook

[Intel-gfx] [PATCH] drm/i915: Work-around garbage DR4 from UXA

2014-05-13 Thread Daniel Vetter
Somehow UXA submits a completely bogus DR4 value since essentially forever. It was originally introduced in commit bade7d7d2505a10a8a7d24b084aff9742e2d6d64 Author: Eric Anholt e...@anholt.net Date: Fri Jun 6 14:03:25 2008 -0700 Use the DRM for submitting batchbuffers when available. and

Re: [Intel-gfx] [PATCH] drm/i915: Work-around garbage DR4 from UXA

2014-05-13 Thread Chris Wilson
On Tue, May 13, 2014 at 02:02:07PM +0200, Daniel Vetter wrote: Somehow UXA submits a completely bogus DR4 value since essentially forever. It was originally introduced in commit bade7d7d2505a10a8a7d24b084aff9742e2d6d64 Author: Eric Anholt e...@anholt.net Date: Fri Jun 6 14:03:25 2008

[Intel-gfx] [PATCH] drm/i915: Use the connector name in fbdev debug messages

2014-05-13 Thread Chris Wilson
During initial probing of the modes to assign to the fbdev console, we use the CRTC and connector ids. These are much harder for us to understand than if we used their actual names (or pipe in the CRTC case). Similarly, we want to manually print the mode size rather than rely on mode-name being

Re: [Intel-gfx] [PATCH] drm/i915: Use the connector name in fbdev debug messages

2014-05-13 Thread Damien Lespiau
On Tue, May 13, 2014 at 01:45:09PM +0100, Chris Wilson wrote: - DRM_DEBUG_KMS(connector %s on crtc %d: %s\n, + DRM_DEBUG_KMS(connector %s on pipe %d [CRTC:%d]: %dx%d%s\n, drm_get_connector_name(connector), +

Re: [Intel-gfx] [PATCH] drm/i915: Use the connector name in fbdev debug messages

2014-05-13 Thread Chris Wilson
On Tue, May 13, 2014 at 01:51:46PM +0100, Damien Lespiau wrote: On Tue, May 13, 2014 at 01:45:09PM +0100, Chris Wilson wrote: - DRM_DEBUG_KMS(connector %s on crtc %d: %s\n, + DRM_DEBUG_KMS(connector %s on pipe %d [CRTC:%d]: %dx%d%s\n,

Re: [Intel-gfx] [PATCH] drm/i915: Use the connector name in fbdev debug messages

2014-05-13 Thread Damien Lespiau
On Tue, May 13, 2014 at 01:59:16PM +0100, Chris Wilson wrote: On Tue, May 13, 2014 at 01:51:46PM +0100, Damien Lespiau wrote: On Tue, May 13, 2014 at 01:45:09PM +0100, Chris Wilson wrote: - DRM_DEBUG_KMS(connector %s on crtc %d: %s\n, + DRM_DEBUG_KMS(connector %s on pipe

Re: [Intel-gfx] [3.14.0-rc4] regression: drm FIFO underruns

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 12:38:41PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 12:29 PM, Jörg Otte jrg.o...@gmail.com wrote: Branch drm-intel-nightly as of ed60c27 drm-intel-nightly: 2014y-05m-09d-21h-51m-45s integration manifest looks badly: - KDE splash screen on boot-up is

Re: [Intel-gfx] [PATCH 02/50] drm/i915: for_each_ring

2014-05-13 Thread Daniel Vetter
On Fri, May 09, 2014 at 01:08:32PM +0100, oscar.ma...@intel.com wrote: From: Ben Widawsky benjamin.widaw...@intel.com for_each_ring() iterates over all rings supported by the hardware, not just those which have been initialized as in for_each_active_ring() Signed-off-by: Ben Widawsky

[Intel-gfx] [PATCH] drm/i915: Use the connector name in fbdev debug messages

2014-05-13 Thread Chris Wilson
During initial probing of the modes to assign to the fbdev console, we use the CRTC and connector ids. These are much harder for us to understand than if we used their actual names (or pipe in the CRTC case). Similarly, we want to manually print the mode size rather than rely on mode-name being

Re: [Intel-gfx] [PATCH 04/50] drm/i915: Extract trivial parts of ring init (early init)

2014-05-13 Thread Daniel Vetter
On Fri, May 09, 2014 at 01:08:34PM +0100, oscar.ma...@intel.com wrote: From: Ben Widawsky benjamin.widaw...@intel.com It's beneficial to be able to get a name, base, and id before we've actually initialized the rings. This ability was effectively destroyed in the ringbuffer fire which Daniel

Re: [Intel-gfx] [PATCH 26/50] drm/i915/bdw: Allow non-default, non-render, user-created LRCs

2014-05-13 Thread Daniel Vetter
On Fri, May 09, 2014 at 01:08:56PM +0100, oscar.ma...@intel.com wrote: From: Oscar Mateo oscar.ma...@intel.com This commit changes the ABI, so it is provided separately so that it can be dropped by the maintainer is so he wishes. Signed-off-by: Oscar Mateo oscar.ma...@intel.com This looks

Re: [Intel-gfx] [PATCH 1/2] drm/i915: fix possible RPM ref leaking during RPS disabling

2014-05-13 Thread Imre Deak
On Mon, 2014-05-12 at 19:51 +0200, Daniel Vetter wrote: On Mon, May 12, 2014 at 06:35:04PM +0300, Imre Deak wrote: In commit c6df39b5ea6342323a42edfbeeca0a28c643d7ae Author: Imre Deak imre.d...@intel.com Date: Mon Apr 14 20:24:29 2014 +0300 drm/i915: get a runtime PM ref for

Re: [Intel-gfx] [PATCH 04/50] drm/i915: Extract trivial parts of ring init (early init)

2014-05-13 Thread Chris Wilson
On Tue, May 13, 2014 at 03:26:51PM +0200, Daniel Vetter wrote: On Fri, May 09, 2014 at 01:08:34PM +0100, oscar.ma...@intel.com wrote: diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index 2d81985..8f37238 100644 ---

Re: [Intel-gfx] [PATCH 00/50] Execlists v2

2014-05-13 Thread Daniel Vetter
On Fri, May 09, 2014 at 01:08:30PM +0100, oscar.ma...@intel.com wrote: From: Oscar Mateo oscar.ma...@intel.com For a description of this patchset, please check the previous cover letter [1]. Together with this patchset, I'm also submitting an IGT test: gem_execlist [2]. v2: - Use

Re: [Intel-gfx] [PATCH 1/2] drm/i915: fix possible RPM ref leaking during RPS disabling

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 04:46:10PM +0300, Imre Deak wrote: On Mon, 2014-05-12 at 19:51 +0200, Daniel Vetter wrote: On Mon, May 12, 2014 at 06:35:04PM +0300, Imre Deak wrote: In commit c6df39b5ea6342323a42edfbeeca0a28c643d7ae Author: Imre Deak imre.d...@intel.com Date: Mon Apr

Re: [Intel-gfx] [PATCH] drm/i915: Work-around garbage DR4 from UXA

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 01:25:49PM +0100, Chris Wilson wrote: On Tue, May 13, 2014 at 02:02:07PM +0200, Daniel Vetter wrote: Somehow UXA submits a completely bogus DR4 value since essentially forever. It was originally introduced in commit bade7d7d2505a10a8a7d24b084aff9742e2d6d64

Re: [Intel-gfx] [PATCH 1/2] drm/i915: fix possible RPM ref leaking during RPS disabling

2014-05-13 Thread Imre Deak
On Tue, 2014-05-13 at 15:54 +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 04:46:10PM +0300, Imre Deak wrote: On Mon, 2014-05-12 at 19:51 +0200, Daniel Vetter wrote: On Mon, May 12, 2014 at 06:35:04PM +0300, Imre Deak wrote: In commit

Re: [Intel-gfx] [PATCH] drm/i915: Use the connector name in fbdev debug messages

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 02:26:39PM +0100, Chris Wilson wrote: During initial probing of the modes to assign to the fbdev console, we use the CRTC and connector ids. These are much harder for us to understand than if we used their actual names (or pipe in the CRTC case). Similarly, we want to

Re: [Intel-gfx] [PATCH] drm/i915: Use the connector name in fbdev debug messages

2014-05-13 Thread Chris Wilson
On Tue, May 13, 2014 at 04:02:40PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 02:26:39PM +0100, Chris Wilson wrote: During initial probing of the modes to assign to the fbdev console, we use the CRTC and connector ids. These are much harder for us to understand than if we used

[Intel-gfx] [PATCH 0/5] Misc preparation patches

2014-05-13 Thread Damien Lespiau
Another round of those pesky preparation patches, hopefully making the code better along the way. For the for_each_crtc() and for_each_intel_crtc() macro, I was thinking about introducing them early and use them as we touch code iterating over crtcs. They have been pretty handy in patches not yet

[Intel-gfx] [PATCH 4/5] drm/i915: Use ilk_wm_max_level() in latency debugfs files

2014-05-13 Thread Damien Lespiau
Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index 18b3565..6801987 100644 ---

[Intel-gfx] [PATCH 5/5] drm/i915: Don't cast void* pointers

2014-05-13 Thread Damien Lespiau
That's not necessary and makes the code not as neat as it could be. Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 74 ++--- 1 file changed, 37 insertions(+), 37 deletions(-) diff --git

[Intel-gfx] [PATCH 3/5] drm/i915: Expose ilk_wm_max_level()

2014-05-13 Thread Damien Lespiau
Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/intel_drv.h | 1 + drivers/gpu/drm/i915/intel_pm.c | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h index d8b540b..97a2c56

[Intel-gfx] [PATCH 2/5] drm/i915: Introduce a for_each_crtc() macro

2014-05-13 Thread Damien Lespiau
Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index 9ed53a9..f6967ef 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++

Re: [Intel-gfx] [PATCH] drm/i915/vlv: don't wait for vblank after pipe enable

2014-05-13 Thread Jesse Barnes
On Tue, 13 May 2014 08:08:55 +0200 Daniel Vetter dan...@ffwll.ch wrote: On Tue, May 13, 2014 at 12:37 AM, Jesse Barnes jbar...@virtuousgeek.org wrote: Like on ILK, the pipe won't be running until later on. Like on ilk?! Since when is vlv display derived from that? [PATCH 3/4] drm/i915:

[Intel-gfx] [PATCH] drm/i915: Use the first mode if there is no preferred mode in the EDID

2014-05-13 Thread Chris Wilson
This matches the algorithm used by earlier kernels when selecting the mode for the fbcon. And only if there is no modes at all, do we fall back to using the BIOS configuration. Seamless transition is still preserved (from the BIOS configuration to ours) so long as the BIOS has also chosen what we

Re: [Intel-gfx] [PATCH] drm/i915/vlv: don't wait for vblank after pipe enable

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 07:57:57AM -0700, Jesse Barnes wrote: On Tue, 13 May 2014 08:08:55 +0200 Daniel Vetter dan...@ffwll.ch wrote: On Tue, May 13, 2014 at 12:37 AM, Jesse Barnes jbar...@virtuousgeek.org wrote: Like on ILK, the pipe won't be running until later on. Like on ilk?!

Re: [Intel-gfx] [3.14.0-rc4] regression: drm FIFO underruns

2014-05-13 Thread Jörg Otte
2014-05-13 15:22 GMT+02:00 Daniel Vetter dan...@ffwll.ch: On Tue, May 13, 2014 at 12:38:41PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 12:29 PM, Jörg Otte jrg.o...@gmail.com wrote: Branch drm-intel-nightly as of ed60c27 drm-intel-nightly: 2014y-05m-09d-21h-51m-45s integration

[Intel-gfx] [PATCH] drm,drm/i915: Export cmdline mode parsing

2014-05-13 Thread Chris Wilson
i915.ko has a custom fbdev initialisation routine that aims to preserve the current mode set by the BIOS, unless overruled by the user. The user's wishes are determined by what, if any, mode is specified on the command line (via the video= parameter). However, that command line mode is first

Re: [Intel-gfx] [PATCH] drm/i915: Use the first mode if there is no preferred mode in the EDID

2014-05-13 Thread Chris Wilson
On Tue, May 13, 2014 at 04:07:37PM +0100, Chris Wilson wrote: This matches the algorithm used by earlier kernels when selecting the mode for the fbcon. And only if there is no modes at all, do we fall back to using the BIOS configuration. Seamless transition is still preserved (from the BIOS

Re: [Intel-gfx] [PATCH] drm/i915: Work-around garbage DR4 from UXA

2014-05-13 Thread Jörg Otte
2014-05-13 15:56 GMT+02:00 Daniel Vetter dan...@ffwll.ch: On Tue, May 13, 2014 at 01:25:49PM +0100, Chris Wilson wrote: On Tue, May 13, 2014 at 02:02:07PM +0200, Daniel Vetter wrote: Somehow UXA submits a completely bogus DR4 value since essentially forever. It was originally introduced in

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Use ilk_wm_max_level() in latency debugfs files

2014-05-13 Thread Ville Syrjälä
On Tue, May 13, 2014 at 03:30:27PM +0100, Damien Lespiau wrote: Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/i915_debugfs.c

Re: [Intel-gfx] [3.14.0-rc4] regression: drm FIFO underruns

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 05:21:49PM +0200, Jörg Otte wrote: 2014-05-13 15:22 GMT+02:00 Daniel Vetter dan...@ffwll.ch: On Tue, May 13, 2014 at 12:38:41PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 12:29 PM, Jörg Otte jrg.o...@gmail.com wrote: Branch drm-intel-nightly as of

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Introduce a for_each_crtc() macro

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 03:30:25PM +0100, Damien Lespiau wrote: Signed-off-by: Damien Lespiau damien.lesp...@intel.com cocinelle for these two over the entire tree? -Daniel --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ 1 file changed, 3 insertions(+) diff --git

Re: [Intel-gfx] [PATCH 5/5] drm/i915: Don't cast void* pointers

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 03:30:28PM +0100, Damien Lespiau wrote: That's not necessary and makes the code not as neat as it could be. Signed-off-by: Damien Lespiau damien.lesp...@intel.com Queued for -next, thanks for the patch. -Daniel --- drivers/gpu/drm/i915/i915_debugfs.c | 74

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Use ilk_wm_max_level() in latency debugfs files

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 03:30:27PM +0100, Damien Lespiau wrote: Signed-off-by: Damien Lespiau damien.lesp...@intel.com I prefer expose foo and use foo in the same patch. I'll squash these two if you're ok. -Daniel --- drivers/gpu/drm/i915/i915_debugfs.c | 4 ++-- 1 file changed, 2

Re: [Intel-gfx] [3.14.0-rc4] regression: drm FIFO underruns

2014-05-13 Thread Damien Lespiau
On Tue, May 13, 2014 at 06:38:32PM +0200, Daniel Vetter wrote: Doesn't work for me, I still have an underrun at boot-up. I'm at a loss tbh with ideas. We successfully disable both pipes, then enable pipe A and it all works. Then we enable pipe B and _both_ pipes underrun immediately

Re: [Intel-gfx] [PATCH 01/10] drm/dp_helper: add defines for DP 1.2 and MST support.

2014-05-13 Thread Jingoo Han
On Monday, May 12, 2014 3:47 PM, Dave Airlie wrote: From: Dave Airlie airl...@redhat.com This just adds the defines from the DP 1.2 spec, which we will use later. Signed-off-by: Dave Airlie airl...@redhat.com --- include/drm/drm_dp_helper.h | 78

[Intel-gfx] intel-virtual-output tool installed in xf86-video-intel 2.99.907

2014-05-13 Thread dgopal
Hi When I install the xf86-video-intel 2.99.907 driver, it puts intel-virtual-output tool in /usr/bin/. I don't need this tool. Is there a way to make sure that this tool is not installed? I am noticing this after I upgraded from version 2.21.2 to 2.99.907. I am not sure if I had this tool in

Re: [Intel-gfx] [3.14.0-rc4] regression: drm FIFO underruns

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 05:46:31PM +0100, Damien Lespiau wrote: On Tue, May 13, 2014 at 06:38:32PM +0200, Daniel Vetter wrote: Doesn't work for me, I still have an underrun at boot-up. I'm at a loss tbh with ideas. We successfully disable both pipes, then enable pipe A and it all works.

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Use ilk_wm_max_level() in latency debugfs files

2014-05-13 Thread Damien Lespiau
On Tue, May 13, 2014 at 06:46:23PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 03:30:27PM +0100, Damien Lespiau wrote: Signed-off-by: Damien Lespiau damien.lesp...@intel.com I prefer expose foo and use foo in the same patch. I'll squash these two if you're ok. Sure, no problem.

Re: [Intel-gfx] [PATCH 4/5] drm/i915: Use ilk_wm_max_level() in latency debugfs files

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 05:51:45PM +0100, Damien Lespiau wrote: On Tue, May 13, 2014 at 06:46:23PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 03:30:27PM +0100, Damien Lespiau wrote: Signed-off-by: Damien Lespiau damien.lesp...@intel.com I prefer expose foo and use foo in the

[Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot.

2014-05-13 Thread clinton . a . taylor
From: Clint Taylor clinton.a.tay...@intel.com The panel power sequencer on vlv doesn't appear to accept changes to its T12 power down duration during warm reboots. This change forces a delay for warm reboots to the T12 panel timing as defined in the VBT table for the connected panel.

Re: [Intel-gfx] [PATCH 2/5] drm/i915: Introduce a for_each_crtc() macro

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 06:45:02PM +0200, Daniel Vetter wrote: On Tue, May 13, 2014 at 03:30:25PM +0100, Damien Lespiau wrote: Signed-off-by: Damien Lespiau damien.lesp...@intel.com cocinelle for these two over the entire tree? Ok, after much swearing I think I've figured out the pattern

[Intel-gfx] [PATCH 1/2] drm/i915: use dev_priv directly in i915_driver_unload

2014-05-13 Thread Daniel Vetter
Noticed while playing with coccinelle. Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch --- drivers/gpu/drm/i915/i915_dma.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c index d02c8de4bd6c..46f1decab76f

Re: [Intel-gfx] [PATCH] drm/i915: Use the first mode if there is no preferred mode in the EDID

2014-05-13 Thread Jesse Barnes
On Tue, 13 May 2014 16:50:12 +0100 Chris Wilson ch...@chris-wilson.co.uk wrote: On Tue, May 13, 2014 at 04:07:37PM +0100, Chris Wilson wrote: This matches the algorithm used by earlier kernels when selecting the mode for the fbcon. And only if there is no modes at all, do we fall back to

Re: [Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot.

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 11:51:11AM -0700, clinton.a.tay...@intel.com wrote: From: Clint Taylor clinton.a.tay...@intel.com The panel power sequencer on vlv doesn't appear to accept changes to its T12 power down duration during warm reboots. This change forces a delay for warm reboots to the

Re: [Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot.

2014-05-13 Thread Jesse Barnes
On Tue, 13 May 2014 22:26:08 +0200 Daniel Vetter dan...@ffwll.ch wrote: On Tue, May 13, 2014 at 11:51:11AM -0700, clinton.a.tay...@intel.com wrote: From: Clint Taylor clinton.a.tay...@intel.com The panel power sequencer on vlv doesn't appear to accept changes to its T12 power down

Re: [Intel-gfx] [PATCH 2/2] drm/i915: s/dev-dev_private/to_i915(dev)/

2014-05-13 Thread Jesse Barnes
On Tue, 13 May 2014 22:22:00 +0200 Daniel Vetter daniel.vet...@ffwll.ch wrote: coccinelle is seriously a tool I should have played around with much earlier. Extremely powerful, and extremely dangerous in causing massive conflict hell for everyone else since doing large-scale stuff is so much

Re: [Intel-gfx] [PATCH v3] drm/i915: Added write-enable pte bit support

2014-05-13 Thread Jesse Barnes
On Tue, 11 Feb 2014 14:19:03 +0530 akash.g...@intel.com wrote: @@ -810,6 +815,7 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm, pt_vaddr[act_pte] = vm-pte_encode(sg_page_iter_dma_address(sg_iter),

Re: [Intel-gfx] [PATCH v3] drm/i915: Added write-enable pte bit support

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 03:05:24PM -0700, Jesse Barnes wrote: On Tue, 11 Feb 2014 14:19:03 +0530 akash.g...@intel.com wrote: @@ -810,6 +815,7 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space *vm, pt_vaddr[act_pte] =

Re: [Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot.

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 02:53:22PM -0700, Jesse Barnes wrote: On Tue, 13 May 2014 22:26:08 +0200 Daniel Vetter dan...@ffwll.ch wrote: On Tue, May 13, 2014 at 11:51:11AM -0700, clinton.a.tay...@intel.com wrote: From: Clint Taylor clinton.a.tay...@intel.com The panel power sequencer

[Intel-gfx] [PATCH 4/4] drm/i915: Use for_each_crtc() when iterating through the CRTCs

2014-05-13 Thread Damien Lespiau
Patch done using the following semantic patch (thanks Daniel for the help!) @@ iterator name list_for_each_entry; iterator name for_each_crtc; struct drm_crtc * crtc; struct drm_device * dev; @@ -list_for_each_entry(crtc,dev-mode_config.crtc_list, head) { +for_each_crtc(dev,crtc)

[Intel-gfx] [PATCH 1/4] drm/i915: Introduce a for_each_intel_crtc() macro

2014-05-13 Thread Damien Lespiau
Fed up with having that long list_for_each_entry() invocation? Use for_each_intel_crtc()! Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h

[Intel-gfx] [PATCH 3/4] drm/i915: Introduce a for_each_crtc() macro

2014-05-13 Thread Damien Lespiau
Signed-off-by: Damien Lespiau damien.lesp...@intel.com --- drivers/gpu/drm/i915/i915_drv.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index edf7299..4006dfe 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++

[Intel-gfx] [PATCH 0/4] for_each_{intel_,}crtc v2

2014-05-13 Thread Damien Lespiau
With Daniel's help to figure out an arcane corner of coccinelle, here is v2 of a series introducing macros to iterate through the CRTCs instead of using list_for_each_entry() and mode_config.crtc_list, a tiny bit more readable and easier to recall. Damien Lespiau (4): drm/i915: Introduce a

[Intel-gfx] [PATCH 2/4] drm/i915: Use for_each_intel_crtc() when iterating through intel_crtcs

2014-05-13 Thread Damien Lespiau
Generated using the semantic patch: @@ iterator name list_for_each_entry; iterator name for_each_intel_crtc; struct intel_crtc * crtc; struct drm_device * dev; @@ -list_for_each_entry(crtc,dev-mode_config.crtc_list,...) { +for_each_intel_crtc(dev,crtc) { ... } Followed

Re: [Intel-gfx] [PATCH v6] drm/i915/vlv: WA for Turbo and RC6 to work together.

2014-05-13 Thread Jesse Barnes
On Sun, 30 Mar 2014 11:58:48 +0530 deepa...@linux.intel.com wrote: @@ -843,6 +849,8 @@ struct intel_gen6_power_mgmt { bool rp_up_masked; bool rp_down_masked; + u32 ei_interrupt_count; + int last_adj; enum { LOW_POWER, BETWEEN, HIGH_POWER } power; @@

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Validate BDB section before reading

2014-05-13 Thread Jesse Barnes
On Tue, 25 Mar 2014 12:57:32 + Chris Wilson ch...@chris-wilson.co.uk wrote: Make sure that the whole BDB section is within the MMIO region prior to accessing it contents. That we don't read outside of the secion is left up to the individual section parsers. Signed-off-by: Chris Wilson

Re: [Intel-gfx] [PATCH 0/4] for_each_{intel_,}crtc v2

2014-05-13 Thread Daniel Vetter
On Tue, May 13, 2014 at 11:32:20PM +0100, Damien Lespiau wrote: With Daniel's help to figure out an arcane corner of coccinelle, here is v2 of a series introducing macros to iterate through the CRTCs instead of using list_for_each_entry() and mode_config.crtc_list, a tiny bit more readable and

Re: [Intel-gfx] [PATCH v3] drm/i915: Added write-enable pte bit support

2014-05-13 Thread Jesse Barnes
On Wed, 14 May 2014 00:30:34 +0200 Daniel Vetter dan...@ffwll.ch wrote: On Tue, May 13, 2014 at 03:05:24PM -0700, Jesse Barnes wrote: On Tue, 11 Feb 2014 14:19:03 +0530 akash.g...@intel.com wrote: @@ -810,6 +815,7 @@ static void gen6_ppgtt_insert_entries(struct i915_address_space

Re: [Intel-gfx] [PATCH] drm/i915/vlv: T12 eDP panel timing enforcement during reboot.

2014-05-13 Thread Jesse Barnes
On Wed, 14 May 2014 00:32:30 +0200 Daniel Vetter dan...@ffwll.ch wrote: On Tue, May 13, 2014 at 02:53:22PM -0700, Jesse Barnes wrote: On Tue, 13 May 2014 22:26:08 +0200 Daniel Vetter dan...@ffwll.ch wrote: On Tue, May 13, 2014 at 11:51:11AM -0700, clinton.a.tay...@intel.com wrote:

Re: [Intel-gfx] [PATCH 2/2] drm/i915: s/dev-dev_private/to_i915(dev)/

2014-05-13 Thread Jesse Barnes
On Tue, 13 May 2014 14:56:28 -0700 Jesse Barnes jbar...@virtuousgeek.org wrote: On Tue, 13 May 2014 22:22:00 +0200 Daniel Vetter daniel.vet...@ffwll.ch wrote: coccinelle is seriously a tool I should have played around with much earlier. Extremely powerful, and extremely dangerous in

Re: [Intel-gfx] [PATCH 09/10] i915: add DP 1.2 MST support (v0.3)

2014-05-13 Thread Dave Airlie
So we leak all dynamically created objects? There's no kfree(intel_connector) here and we cannot add it because drm_mode_object_find() is not ref-counted. So we keep the connector in the mode_group and wait until the final drm_mode_config_cleanup()? But drm_connector_cleanup() already

Re: [Intel-gfx] [PATCH v2] drm/i915: Increase WM memory latency values?on SNB

2014-05-13 Thread Robert Navarro
Ville Syrjälä ville.syrjala at linux.intel.com writes: Replace. Finally got around to compiling this for my system, there were a few issues with the build scripts on the latest Ubuntu. Currently running 3.15.0-rc3-custom-drm-intel-nightly-bug70254+ with no issues thus far. I'll give a

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