On Fri, Sep 07, 2018 at 11:31:15AM -0700, Dhinakaran Pandiyan wrote:
> On Fri, 2018-09-07 at 09:25 -0700, Manasi Navare wrote:
> > On Fri, Sep 07, 2018 at 05:34:23PM +0300, Ville Syrjälä wrote:
> > > On Thu, Sep 06, 2018 at 11:21:34PM -0700, Dhinakaran Pandiyan
> > > wrote:
> > > > commit
On Fri, 2018-09-07 at 08:35 -0700, Nathan Ciobanu wrote:
> On Thu, Sep 06, 2018 at 11:21:35PM -0700, Dhinakaran Pandiyan wrote:
> > We have new tests and fixes in place since the feature was last
> > disabled.
> >
> > Try again for gen-9+ hardware and enable only PSR1 as a first step.
>
> Since
On Fri, 2018-09-07 at 09:25 -0700, Manasi Navare wrote:
> On Fri, Sep 07, 2018 at 05:34:23PM +0300, Ville Syrjälä wrote:
> > On Thu, Sep 06, 2018 at 11:21:34PM -0700, Dhinakaran Pandiyan
> > wrote:
> > > commit '3cf71bc9904d ("drm/i915: Re-apply "Perform link quality
> > > check,
> > >
>-Original Message-
>From: Intel-gfx [mailto:intel-gfx-boun...@lists.freedesktop.org] On Behalf Of
>Joonas Lahtinen
>Sent: Friday, September 7, 2018 12:47 AM
>To: Nikula, Jani ; Vivi, Rodrigo
>
>Cc: intel-gfx@lists.freedesktop.org; Zanoni, Paulo R
>Subject: Re: [Intel-gfx] [PATCH 1/1]
On Fri, 2018-09-07 at 17:32 +0300, Ville Syrjälä wrote:
> On Fri, Sep 07, 2018 at 03:39:24PM +0300, Jani Nikula wrote:
> > On Thu, 06 Sep 2018, Dhinakaran Pandiyan > .com> wrote:
> > > Comment claims link needs to be retrained because the connected
> > > sink raised
> > > a long pulse to indicate
== Series Details ==
Series: drm/i915: Display gtt remapping prep stuff
URL : https://patchwork.freedesktop.org/series/49354/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4787_full -> Patchwork_10129_full =
== Summary - SUCCESS ==
No regressions found.
== Known
Adding ML.
Anusha
From: Srivatsa, Anusha
Sent: Wednesday, September 5, 2018 1:40 PM
To: jwbo...@kernel.org; b...@decadent.org.uk; k...@kernel.org
Subject: linux-firmware pull request(ICL:DMC)
Hi Josh,Ben,Kyle,
Please consider pulling the following i915 updates to linux-firmware.git.
The
Quoting Antonio Argenziano (2018-09-07 17:37:45)
>
>
> On 07/09/18 01:41, Chris Wilson wrote:
> > Quite often on catastrophic failure the test leaves a long queue of
> > unterminated batches pending execution. Each runs until hangcheck fires
> > and skips onto the next, leaving us waiting for a
On 07/09/18 01:41, Chris Wilson wrote:
Quite often on catastrophic failure the test leaves a long queue of
unterminated batches pending execution. Each runs until hangcheck fires
and skips onto the next, leaving us waiting for a very long time at test
exit.
On older kernels, this gracefully
On Thu, 6 Sep 2018 14:10:35 -0700
Rodrigo Vivi wrote:
> On Thu, Sep 06, 2018 at 01:04:09PM -0700, Bob Paauwe wrote:
> > 48 bit ppgtt device configuration is really just extended address
> > range full ppgtt and may actually be something other than 48 bits.
> >
> > Change USES_FULL_48BIT_PPGTT()
On Fri, Sep 07, 2018 at 05:32:36PM +0300, Ville Syrjälä wrote:
> On Fri, Sep 07, 2018 at 03:39:24PM +0300, Jani Nikula wrote:
> > On Thu, 06 Sep 2018, Dhinakaran Pandiyan
> > wrote:
> > > Comment claims link needs to be retrained because the connected sink
> > > raised
> > > a long pulse to
== Series Details ==
Series: drm/i915: Display gtt remapping prep stuff
URL : https://patchwork.freedesktop.org/series/49354/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4787 -> Patchwork_10129 =
== Summary - SUCCESS ==
No regressions found.
External URL:
On Fri, Sep 07, 2018 at 05:34:23PM +0300, Ville Syrjälä wrote:
> On Thu, Sep 06, 2018 at 11:21:34PM -0700, Dhinakaran Pandiyan wrote:
> > commit '3cf71bc9904d ("drm/i915: Re-apply "Perform link quality check,
> > unconditionally during long pulse"")' applies a work around for monitors
> > that
== Series Details ==
Series: drm/i915: Display gtt remapping prep stuff
URL : https://patchwork.freedesktop.org/series/49354/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: s/tile_offset/aligned_offset/ etc.
Okay!
Commit: drm/i915: Add .max_stride() plane hook
== Series Details ==
Series: drm/i915: Display gtt remapping prep stuff
URL : https://patchwork.freedesktop.org/series/49354/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
e59bd2903569 drm/i915: s/tile_offset/aligned_offset/ etc.
9572f44af5e9 drm/i915: Add .max_stride() plane
On 07/09/2018 15:13, Ville Syrjälä wrote:
On Fri, Sep 07, 2018 at 09:45:14AM +0100, Chris Wilson wrote:
Quoting Tvrtko Ursulin (2018-09-07 09:37:00)
On 05/09/2018 15:09, Ville Syrjälä wrote:
On Wed, Sep 05, 2018 at 02:49:30PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Notice in
On Fri, Sep 07, 2018 at 04:30:36PM +0100, Chris Wilson wrote:
> Quoting Ville Syrjala (2018-09-07 16:24:04)
> > diff --git a/drivers/gpu/drm/i915/intel_drv.h
> > b/drivers/gpu/drm/i915/intel_drv.h
> > index 8162025114f5..9e16bdcffc84 100644
> > --- a/drivers/gpu/drm/i915/intel_drv.h
> > +++
== Series Details ==
Series: drm/i915: use for_each_pipe loop to assign crtc_mask (rev3)
URL : https://patchwork.freedesktop.org/series/49341/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4786_full -> Patchwork_10128_full =
== Summary - WARNING ==
Minor unknown changes
On Thu, Sep 06, 2018 at 11:21:35PM -0700, Dhinakaran Pandiyan wrote:
> We have new tests and fixes in place since the feature was last
> disabled.
>
> Try again for gen-9+ hardware and enable only PSR1 as a first step.
Since this patch explicitly disables PSR2 for all platforms maybe you
can
Quoting Ville Syrjala (2018-09-07 16:24:04)
> diff --git a/drivers/gpu/drm/i915/intel_drv.h
> b/drivers/gpu/drm/i915/intel_drv.h
> index 8162025114f5..9e16bdcffc84 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -504,11 +504,7 @@ struct
From: Ville Syrjälä
Move the skl+ specific framebuffer related checks from
intel_plane_atomic_check_with_state() into a new function
(skl_plane_check_fb()) which we'll simply call from the skl
plane->check() hook.
v2: Split out the Y/Yf+CCS vs. interlaced change (José)
Reviewed-by: José
From: Ville Syrjälä
Move the display w/a #1175 to a better place. That place
being the new skl+ specific plane->check() hook. This leaves
the skl_check_plane_surface() stuff to deal with the gtt offset
and src coordinate stuff as originally envisioned.
Reviewed-by: Rodrigo Vivi
Signed-off-by:
From: Ville Syrjälä
Rename some of the tile_offset() functions to aligned_offset() since
they operate on both linear and tiled functions. And we'll include
_plane_ in the name of all the variants that take a plane state.
Should make it more clear which function to use where.
v2: Pimp the patch
From: Ville Syrjälä
Move the chv rotation vs. reflections checks to the plane->check() hook,
away from the (now) platform agnostic
intel_plane_atomic_check_with_state().
Reviewed-by: José Roberto de Souza
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_atomic_plane.c | 9
From: Ville Syrjälä
Make the main/aux surface stuff a bit more generic by using an array
of structures. This will allow us to deal with both the main and aux
surfaces with common code.
Reviewed-by: José Roberto de Souza
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c |
From: Ville Syrjälä
Extract intel_cursor_check_surface() to better match the code layout
of the other plane types.
Reviewed-by: José Roberto de Souza
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 47 ++--
1 file changed, 29
From: Ville Syrjälä
To reduce the confusion between a drm plane and the planes of
framebuffers let's desiginate the latter as "color plane".
Weak-Reviewed-by: José Roberto de Souza
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 106 ++-
From: Ville Syrjälä
We can easily calculate the plane can_scale/min_downscale on demand.
And later on we'll probably want to start calculating these dynamically
based on the cdclk just as skl already does.
Reviewed-by: José Roberto de Souza
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
Let's assume that the primary plane for pipe A has the highest max
stride of all planes, and we'll use that as the global limit when
creating a new framebuffer.
Reviewed-by: José Roberto de Souza
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 33
From: Ville Syrjälä
Stash the gtt_view structure into the plane state. This will become
useful when we do GTT remapping as the gtt_view will not come directly
from the fb anymore.
Reviewed-by: José Roberto de Souza
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/intel_display.c | 16
From: Ville Syrjälä
A reposting of all the reviewed prep stuff for the gtt remapping.
Changes since the first posting:
- fix the ilk+ x-tiled stride to be 32k
- split out some unrelated changes (those were already pushed
separately)
- some typos etc. fixed
Ville Syrjälä (13):
drm/i915:
From: Ville Syrjälä
Split up intel_check_primary_plane() and intel_check_sprite_plane()
into per-platform variants. This way we can get a unified behaviour
between the SKL universal planes, and we stop checking for non-SKL
specific scaling limits for the "sprite" planes. And we now get
a natural
From: Ville Syrjälä
Each plane may have different stride limitations. Let's add a new
plane function to retutn the maximum stride for each plane. There's
going to be some use for this outside the .atomic_check() stuff hence
the separate hook.
v2: Fix ilk+ x-tiled max stride to be 32k (José)
From: Ville Syrjälä
Let's store the final plane stride in the plane state. This avoids
having to pick between the normal vs. rotated stride during hardware
programming. And once we get GTT remapping the plane stride will
no longer match the fb stride so we'll need a place to store it
anyway.
On 07/09/2018 14:37, Patchwork wrote:
> == Series Details ==
>
> Series: Add XYUV format support (rev6)
> URL : https://patchwork.freedesktop.org/series/48007/
> State : failure
>
> == Summary ==
>
> = CI Bug Log - changes from CI_DRM_4786_full -> Patchwork_10123_full =
>
> == Summary -
== Series Details ==
Series: series starting with [v2,1/3] drm/i915/csr: keep firmware name and
required version together
URL : https://patchwork.freedesktop.org/series/49269/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4786_full -> Patchwork_10126_full =
== Summary -
On Fri, Sep 07, 2018 at 04:04:03PM +0300, Jani Nikula wrote:
> On Fri, 07 Sep 2018, Mahesh Kumar wrote:
> > This cleanup patch makes changes to use for_each_pipe loop
> > during bit-mask assignment of allowed crtc with encoder.
> >
> > changes:
> > - use BIT(i) macro instead of (1 << i) (Chris)
On Thu, Sep 06, 2018 at 11:21:34PM -0700, Dhinakaran Pandiyan wrote:
> commit '3cf71bc9904d ("drm/i915: Re-apply "Perform link quality check,
> unconditionally during long pulse"")' applies a work around for monitors
> that don't signal link loss. Apply this only for external displays as
> eDP
On Fri, Sep 07, 2018 at 03:39:24PM +0300, Jani Nikula wrote:
> On Thu, 06 Sep 2018, Dhinakaran Pandiyan
> wrote:
> > Comment claims link needs to be retrained because the connected sink raised
> > a long pulse to indicate link loss. If the sink did so,
> > intel_dp_hotplug() would have handled
== Series Details ==
Series: series starting with [1/6] drm/i915: Missed interrupt simulation is no
more, tell the world
URL : https://patchwork.freedesktop.org/series/49339/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4786_full -> Patchwork_10124_full =
== Summary -
On Fri, Sep 07, 2018 at 09:45:14AM +0100, Chris Wilson wrote:
> Quoting Tvrtko Ursulin (2018-09-07 09:37:00)
> >
> > On 05/09/2018 15:09, Ville Syrjälä wrote:
> > > On Wed, Sep 05, 2018 at 02:49:30PM +0100, Tvrtko Ursulin wrote:
> > >> From: Tvrtko Ursulin
> > >>
> > >> Notice in more places if
== Series Details ==
Series: drm/i915: use for_each_pipe loop to assign crtc_mask (rev3)
URL : https://patchwork.freedesktop.org/series/49341/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4786 -> Patchwork_10128 =
== Summary - SUCCESS ==
No regressions found.
This cleanup patch makes changes to use for_each_pipe loop
during bit-mask assignment of allowed crtc with encoder.
changes:
- use BIT(i) macro instead of (1 << i) (Chris)
changes from V2:
- use int for consistency (Jani)
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: Mahesh Kumar
---
== Series Details ==
Series: drm/i915: use for_each_pipe loop to assign crtc_mask (rev2)
URL : https://patchwork.freedesktop.org/series/49341/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4786 -> Patchwork_10127 =
== Summary - SUCCESS ==
No regressions found.
Hi,
I used u8 because internally num_pipes variable used by for_each_pipe
macro is of u8 type.
If you think it's good to have int for consistency I can update the patch.
Regards,
-Mahesh
On 9/7/2018 6:34 PM, Jani Nikula wrote:
On Fri, 07 Sep 2018, Mahesh Kumar wrote:
This cleanup patch
On Fri, 07 Sep 2018, Mahesh Kumar wrote:
> This cleanup patch makes changes to use for_each_pipe loop
> during bit-mask assignment of allowed crtc with encoder.
>
> changes:
> - use BIT(i) macro instead of (1 << i) (Chris)
>
> Cc: Jani Nikula
> Cc: Rodrigo Vivi
> Signed-off-by: Mahesh Kumar
>
== Series Details ==
Series: series starting with [v2,1/3] drm/i915/csr: keep firmware name and
required version together
URL : https://patchwork.freedesktop.org/series/49269/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4786 -> Patchwork_10126 =
== Summary - SUCCESS ==
This cleanup patch makes changes to use for_each_pipe loop
during bit-mask assignment of allowed crtc with encoder.
changes:
- use BIT(i) macro instead of (1 << i) (Chris)
Cc: Jani Nikula
Cc: Rodrigo Vivi
Signed-off-by: Mahesh Kumar
---
drivers/gpu/drm/i915/intel_ddi.c | 4 +++-
Quoting Mahesh Kumar (2018-09-07 13:40:35)
> This cleanup patch makes changes to use for_each_pipe loop
> during bit-mask assignment of allowed crtc with encoder.
mask |= BIT(i) ?
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
On Thu, 06 Sep 2018, Dhinakaran Pandiyan wrote:
> Comment claims link needs to be retrained because the connected sink raised
> a long pulse to indicate link loss. If the sink did so,
> intel_dp_hotplug() would have handled link retraining. Looking at the
> logs in Bugzilla referenced in commit
This cleanup patch makes changes to use for_each_pipe loop
during bit-mask assignment of allowed crtc with encoder.
Cc: Jani Nikula
Cc: Rodrigo Vivi
Cc: Mahesh Kumar
Signed-off-by: Mahesh Kumar
---
drivers/gpu/drm/i915/intel_ddi.c | 4 +++-
drivers/gpu/drm/i915/intel_dp.c | 5 -
Chris Wilson writes:
> Using the guc, we cannot disable the user interrupt generation as we use
> it for driving submission. And from Icelake, we no longer have the
> ability to individually mask interrupt generation from each engine,
> disabling our ability to fake missed interrupts.
>
> In
== Series Details ==
Series: series starting with [1/6] drm/i915: Missed interrupt simulation is no
more, tell the world
URL : https://patchwork.freedesktop.org/series/49339/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4786 -> Patchwork_10124 =
== Summary - SUCCESS ==
From: Tvrtko Ursulin
GEM_WARN_ON currently has dangerous semantics where it is completely
compiled out on !GEM_DEBUG builds. This can leave users who expect it to
be more like a WARN_ON, just without a warning in non-debug builds, in
complete ignorance.
Another gotcha with it is that it cannot
Quoting Tvrtko Ursulin (2018-09-07 12:14:20)
> From: Tvrtko Ursulin
>
> Proposal to add test tags as a replacement for separate test
> list which can be difficult to maintain and get out of date.
>
> Putting this maintanenace inline with tests makes it easier
> to remember to update the (now
== Series Details ==
Series: series starting with [1/6] drm/i915: Missed interrupt simulation is no
more, tell the world
URL : https://patchwork.freedesktop.org/series/49339/
State : warning
== Summary ==
$ dim sparse origin/drm-tip
Commit: drm/i915: Missed interrupt simulation is no more,
== Series Details ==
Series: Add XYUV format support (rev6)
URL : https://patchwork.freedesktop.org/series/48007/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4786_full -> Patchwork_10123_full =
== Summary - FAILURE ==
Serious unknown changes coming with
If the caller supplies more than 4G of objects and than one that has to
be in the low 4G, it is possible for the low 4G to be full before we
attempt to find room for the last object that must be there. As we don't
reorder the two types, every pass hits the same problem and we fail with
ENOSPC.
We do not need to continually clear our dedicated PTE for error capture
as it will be updated and invalidated to the next object. Only at the
end do we wish to be sure that the PTE doesn't point back to any buffer.
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gpu_error.c | 10
If we fail to allocate an array for a large number of user requested
capture objects, reduce the array size and try to grab at least some of
the objects!
Signed-off-by: Chris Wilson
---
drivers/gpu/drm/i915/i915_gpu_error.c | 20 +---
1 file changed, 13 insertions(+), 7
The final call to zlib_deflate(Z_FINISH) may require more output
space to be allocated and so needs to re-invoked. Failure to do so in
the current code leads to incomplete zlib streams (albeit intact due to
the use of Z_SYNC_FLUSH) resulting in the occasional short object
capture.
Testcase:
Using the guc, we cannot disable the user interrupt generation as we use
it for driving submission. And from Icelake, we no longer have the
ability to individually mask interrupt generation from each engine,
disabling our ability to fake missed interrupts.
In both cases, report back to userspace
Currently, we convert the error state into a string every time we read
from sysfs (and sysfs reads in page size (4KiB) chunks). We do try to
window the string and only capture the portion that is being read, but
that means that we must always convert up to the window to find the
start. For a very
From: Tvrtko Ursulin
Proposal to add test tags as a replacement for separate test
list which can be difficult to maintain and get out of date.
Putting this maintanenace inline with tests makes it easier
to remember to update the (now implicit) lists, and also enables
richer test selection
Hi Dave,
Here's the first batch of changes for v4.20. Nothing too special.
Notable things are more Icelake enabling/fixing patches and PPGTT
enabling for some older platforms. Icelake is still behind
alpha_support flag as we have the code in upstream but extensive
testing is pending hardware
== Series Details ==
Series: igt/gem_exec_capture: Capture many, many objects
URL : https://patchwork.freedesktop.org/series/49288/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4782 -> IGTPW_1809 =
== Summary - FAILURE ==
Serious unknown changes coming with IGTPW_1809
On 07/09/2018 10:39, Tvrtko Ursulin wrote:
On 07/09/2018 10:23, Lionel Landwerlin wrote:
On 07/09/2018 09:26, Tvrtko Ursulin wrote:
On 06/09/2018 11:36, Lionel Landwerlin wrote:
On 06/09/2018 11:22, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-09-06 11:18:01)
On 06/09/2018 11:10,
On 07/09/2018 10:23, Lionel Landwerlin wrote:
On 07/09/2018 09:26, Tvrtko Ursulin wrote:
On 06/09/2018 11:36, Lionel Landwerlin wrote:
On 06/09/2018 11:22, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-09-06 11:18:01)
On 06/09/2018 11:10, Chris Wilson wrote:
Quoting Lionel
Quoting Tvrtko Ursulin (2018-09-07 10:30:08)
> From: Tvrtko Ursulin
>
> New home is more appropriate for this test.
Just delete it.
-Chris
___
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
Quoting Tvrtko Ursulin (2018-09-07 10:30:07)
> From: Tvrtko Ursulin
>
> Move a really small test that invalid context is rejected under the
> gem_ctx_exec umbrella.
>
> Signed-off-by: Tvrtko Ursulin
> ---
> tests/Makefile.sources | 1 -
> tests/gem_ctx_bad_exec.c | 60
From: Tvrtko Ursulin
Move a really small test that invalid context is rejected under the
gem_ctx_exec umbrella.
Signed-off-by: Tvrtko Ursulin
---
tests/Makefile.sources | 1 -
tests/gem_ctx_bad_exec.c | 60
tests/gem_ctx_exec.c | 22
From: Tvrtko Ursulin
New home is more appropriate for this test.
At the same time tidy code a tiny bit.
Signed-off-by: Tvrtko Ursulin
---
tests/gem_ctx_exec.c | 75 +++---
tests/gem_ctx_switch.c | 46 ++
2 files changed, 58
== Series Details ==
Series: series starting with [1/3] drm/i915/dp: Fix link retraining comment in
intel_dp_long_pulse()
URL : https://patchwork.freedesktop.org/series/49321/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4785_full -> Patchwork_10122_full =
== Summary -
On 07/09/2018 09:26, Tvrtko Ursulin wrote:
On 06/09/2018 11:36, Lionel Landwerlin wrote:
On 06/09/2018 11:22, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-09-06 11:18:01)
On 06/09/2018 11:10, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-09-06 10:57:47)
On 05/09/2018 15:22,
== Series Details ==
Series: Add XYUV format support (rev6)
URL : https://patchwork.freedesktop.org/series/48007/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4786 -> Patchwork_10123 =
== Summary - SUCCESS ==
No regressions found.
External URL:
== Series Details ==
Series: Add XYUV format support (rev6)
URL : https://patchwork.freedesktop.org/series/48007/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
28881f8a7368 drm: Introduce new DRM_FORMAT_XYUV
-:30: WARNING:LONG_LINE: line over 100 characters
#30: FILE:
Quoting Tvrtko Ursulin (2018-09-07 09:26:27)
>
> On 06/09/2018 11:36, Lionel Landwerlin wrote:
> > On 06/09/2018 11:22, Chris Wilson wrote:
> >> Quoting Lionel Landwerlin (2018-09-06 11:18:01)
> >>> On 06/09/2018 11:10, Chris Wilson wrote:
> Quoting Lionel Landwerlin (2018-09-06 10:57:47)
>
Quoting Chris Wilson (2018-09-07 09:49:09)
> Quoting Tvrtko Ursulin (2018-09-05 14:49:34)
> > From: Tvrtko Ursulin
> >
> > Allow workloads to specify frequency of preemption points per context.
> >
> > New workload command ('X') is added to allow this.
>
> Called it! ;)
With muttering under
Quoting Tvrtko Ursulin (2018-09-05 14:49:34)
> From: Tvrtko Ursulin
>
> Allow workloads to specify frequency of preemption points per context.
>
> New workload command ('X') is added to allow this.
Called it! ;)
-Chris
___
Intel-gfx mailing list
Quoting Tvrtko Ursulin (2018-09-05 14:49:33)
> From: Tvrtko Ursulin
>
> MI_NOOP cannot be preempted which means up to now gem_wsim workloads were
> preemptable on batch buffer granularity only.
>
> Add MI_ARB_CHK every 100us so the new default is mid-batch preemption.
Sure you don't want this
Introduced new XYUV scan-in format for framebuffer and
added support for it to i915(SkyLake+).
Stanislav Lisovskiy (2):
drm: Introduce new DRM_FORMAT_XYUV
drm/i915: Adding YUV444 packed format support for skl+
drivers/gpu/drm/drm_fourcc.c | 1 +
drivers/gpu/drm/i915/i915_reg.h
v5: This is YUV444 packed format same as AYUV, but without alpha,
as supported by i915.
v6: Removed unneeded initializer for new XYUV format.
v7: Added is_yuv field initialization according to latest
drm_fourcc format structure initialization changes.
v8: Edited commit message to be
Quoting Tvrtko Ursulin (2018-09-07 09:37:00)
>
> On 05/09/2018 15:09, Ville Syrjälä wrote:
> > On Wed, Sep 05, 2018 at 02:49:30PM +0100, Tvrtko Ursulin wrote:
> >> From: Tvrtko Ursulin
> >>
> >> Notice in more places if we are running behind.
> >>
> >> Signed-off-by: Tvrtko Ursulin
> >> ---
>
== Series Details ==
Series: drm/i915: fix SPDX license identifiers
URL : https://patchwork.freedesktop.org/series/49323/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4785_full -> Patchwork_10121_full =
== Summary - WARNING ==
Minor unknown changes coming with
Quite often on catastrophic failure the test leaves a long queue of
unterminated batches pending execution. Each runs until hangcheck fires
and skips onto the next, leaving us waiting for a very long time at test
exit.
On older kernels, this gracefully degrades into the existing mechanism.
On 05/09/2018 15:09, Ville Syrjälä wrote:
On Wed, Sep 05, 2018 at 02:49:30PM +0100, Tvrtko Ursulin wrote:
From: Tvrtko Ursulin
Notice in more places if we are running behind.
Signed-off-by: Tvrtko Ursulin
---
benchmarks/gem_wsim.c | 52 ++-
1 file
On 06/09/2018 11:36, Lionel Landwerlin wrote:
On 06/09/2018 11:22, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-09-06 11:18:01)
On 06/09/2018 11:10, Chris Wilson wrote:
Quoting Lionel Landwerlin (2018-09-06 10:57:47)
On 05/09/2018 15:22, Tvrtko Ursulin wrote:
From: Lionel Landwerlin
== Series Details ==
Series: series starting with [1/3] drm/i915/dp: Fix link retraining comment in
intel_dp_long_pulse()
URL : https://patchwork.freedesktop.org/series/49321/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4785 -> Patchwork_10122 =
== Summary - SUCCESS ==
== Series Details ==
Series: series starting with [1/3] drm/i915/dp: Fix link retraining comment in
intel_dp_long_pulse()
URL : https://patchwork.freedesktop.org/series/49321/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
f2bc4d26da72 drm/i915/dp: Fix link retraining comment
== Series Details ==
Series: drm/i915: fix SPDX license identifiers
URL : https://patchwork.freedesktop.org/series/49323/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4785 -> Patchwork_10121 =
== Summary - SUCCESS ==
No regressions found.
External URL:
Thanks for review! I will split this patch to 3 and commit again.
On Thu, 06 Sep 2018, Jani Nikula wrote:
>> The N value was computed by kernel driver that based on synchronous
>> clock mode. But only specific N value (0x8000) would be acceptable for
>> LG LP140WF6-SPM1 eDP panel which is
Quoting Rodrigo Vivi (2018-09-06 20:35:19)
> On Thu, Sep 06, 2018 at 09:46:13AM +0300, Jani Nikula wrote:
> > On Wed, 05 Sep 2018, Rodrigo Vivi wrote:
> > > On Wed, Sep 05, 2018 at 12:07:43PM +0300, Joonas Lahtinen wrote:
> > >> Was not the decision that we only gate the MODULE_FIRMWARE line
On Fri, Sep 07, 2018 at 10:08:21AM +0300, Jani Nikula wrote:
> Commit b24413180f56 ("License cleanup: add SPDX GPL-2.0 license
> identifier to files with no license") added default GPL-2.0 identifiers
> to i915 files without a license. For i915 the right choice would have
> been MIT. Fix it.
>
>
On Thu, 06 Sep 2018, "Lee, Shawn C" wrote:
> The N value was computed by kernel driver that based on synchronous clock
> mode. But only specific N value (0x8000) would be acceptable for
> LG LP140WF6-SPM1 eDP panel which is running at asynchronous clock mode.
> With the other N value, Tcon will
Quoting Jani Nikula (2018-09-07 08:08:21)
> Commit b24413180f56 ("License cleanup: add SPDX GPL-2.0 license
> identifier to files with no license") added default GPL-2.0 identifiers
> to i915 files without a license. For i915 the right choice would have
> been MIT. Fix it.
>
> Fixes: b24413180f56
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/icl: Avoid Gen10 watermark
workarounds in Gen11 (rev2)
URL : https://patchwork.freedesktop.org/series/49170/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4785_full -> Patchwork_10119_full =
== Summary -
Commit b24413180f56 ("License cleanup: add SPDX GPL-2.0 license
identifier to files with no license") added default GPL-2.0 identifiers
to i915 files without a license. For i915 the right choice would have
been MIT. Fix it.
Fixes: b24413180f56 ("License cleanup: add SPDX GPL-2.0 license
On Thu, 2018-09-06 at 22:06 -0700, Rodrigo Vivi wrote:
> On Thu, Sep 06, 2018 at 04:52:02PM -0700, Dhinakaran Pandiyan wrote:
> > We have new tests and fixes in place since the feature was last
> > disabled.
> >
> > Try again for gen-9+ hardware and enable only PSR1 as a first step.
> >
> > Cc:
Comment claims link needs to be retrained because the connected sink raised
a long pulse to indicate link loss. If the sink did so,
intel_dp_hotplug() would have handled link retraining. Looking at the
logs in Bugzilla referenced in commit '3cf71bc9904d ("drm/i915: Re-apply
Perform link quality
We have new tests and fixes in place since the feature was last
disabled.
Try again for gen-9+ hardware and enable only PSR1 as a first step.
Cc: Jani Nikula
Cc: Jose Roberto de Souza
Cc: Paulo Zanoni
Cc: Rodrigo Vivi
Cc: Ville Syrjälä
References: 2ee7dc497e34 ("drm/i915: disable PSR by
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