Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets

Hi, On 19-12-18 06:39, Patchwork wrote: == Series Details == Series: series starting with [1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets URL : https://patchwork.freedesktop.org/series/54244/ State : failure == Summary == CI Bug Log - changes from

Re: [Intel-gfx] [PATCH] sysfs: Disable lockdep for driver bind/unbind files

On Tue, Dec 18, 2018 at 09:14:43PM +0100, Daniel Vetter wrote: > This is the much more correct fix for my earlier attempt at: > > https://lkml.org/lkml/2018/12/10/118 > > Short recap: > > - There's not actually a locking issue, it's just lockdep being a bit > too eager to complain about a

Re: [Intel-gfx] [PATCH v9 35/39] misc/mei/hdcp: Component framework for I915 Interface

Tomas and Daniel, From the discussion on this thread, I infer following understanding: * At present(v9) I915 wants to be hard binded to mei_hdcp device-driver binding status through components o This means I915 driver load will get complete only when the mei_hdcp's device and

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets

== Series Details == Series: series starting with [1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets URL : https://patchwork.freedesktop.org/series/54244/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5331_full -> Patchwork_11120_full

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/5] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation

== Series Details == Series: series starting with [1/5] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation URL : https://patchwork.freedesktop.org/series/54242/ State : success == Summary == CI Bug Log - changes from CI_DRM_5331_full -> Patchwork_9_full

[Intel-gfx] ✓ Fi.CI.IGT: success for sysfs: Disable lockdep for driver bind/unbind files

== Series Details == Series: sysfs: Disable lockdep for driver bind/unbind files URL : https://patchwork.freedesktop.org/series/54238/ State : success == Summary == CI Bug Log - changes from CI_DRM_5331_full -> Patchwork_8_full Summary

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v4,1/2] drm: Add color management LUT validation helper (v4) (rev2)

== Series Details == Series: series starting with [v4,1/2] drm: Add color management LUT validation helper (v4) (rev2) URL : https://patchwork.freedesktop.org/series/54170/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5331_full -> Patchwork_7_full

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets

== Series Details == Series: series starting with [1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets URL : https://patchwork.freedesktop.org/series/54244/ State : success == Summary == CI Bug Log - changes from CI_DRM_5331 -> Patchwork_11120

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets

== Series Details == Series: series starting with [1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets URL : https://patchwork.freedesktop.org/series/54244/ State : warning == Summary == $ dim checkpatch origin/drm-tip c5983ec2fe41 drm/i915: Add an update

[Intel-gfx] [PATCH 4/4] drm/i915: DDI: call intel_edp_drrs_enable() on encoder updates

Call intel_edp_drrs_enable() on encoder updates to make sure that we enable DRRS (when applicable) on fastsets. Note calling intel_edp_drrs_enable() when PSR has already been enabled is a no-op, so it is safe to do this on every encoder->update callback. Signed-off-by: Hans de Goede ---

[Intel-gfx] [PATCH 3/4] drm/i915: Allow calling intel_edp_drrs_enable twice

Do not make it an error to call intel_edp_drrs_enable while drrs has already been enabled, instead exit silently in this case. This is a preparation patch for ensuring that drrs is enabled on fastsets. Note that the removed WARN_ON could also be triggered from userspace through the i915_drrs_ctl

[Intel-gfx] [PATCH 2/4] drm/i915: DDI: call intel_psr_enable() on encoder updates

Call intel_psr_enable() on encoder updates to make sure that we enable PSR (when applicable) on fastsets. Note calling intel_psr_enable() when PSR has already been enabled is a no-op, so it is safe to do this on every encoder->update callback. Signed-off-by: Hans de Goede ---

[Intel-gfx] [PATCH 1/4] drm/i915: Add an update callback to intel_encoder and call this on fastsets

When we are doing a fastset (needs_modeset=false, update_pipe=true) we may need to update some encoder-level things such as checking that psr is enabled. This commit adds an update callback to intel_encoder and a new intel_encoders_update helper which calls this for all encoders connected to a

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Disable FBC on fastset if necessary

== Series Details == Series: drm/i915: Disable FBC on fastset if necessary URL : https://patchwork.freedesktop.org/series/54226/ State : success == Summary == CI Bug Log - changes from CI_DRM_5331_full -> Patchwork_6_full Summary

Re: [Intel-gfx] [WIP PATCH 05/15] drm/dp_mst: Fix payload deallocation on hotplugs using malloc refs

On Fri, 2018-12-14 at 10:38 +0100, Daniel Vetter wrote: > On Thu, Dec 13, 2018 at 08:25:34PM -0500, Lyude Paul wrote: > > Up until now, freeing payloads on remote MST hubs that just had ports > > removed has almost never worked because we've been relying on port > > validation in order to stop us

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation

== Series Details == Series: series starting with [1/5] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation URL : https://patchwork.freedesktop.org/series/54242/ State : success == Summary == CI Bug Log - changes from CI_DRM_5331 -> Patchwork_9

Re: [Intel-gfx] [WIP PATCH 06/15] drm/i915: Keep malloc references to MST ports

On Fri, 2018-12-14 at 10:32 +0100, Daniel Vetter wrote: > On Thu, Dec 13, 2018 at 08:25:35PM -0500, Lyude Paul wrote: > > So that the ports stay around until we've destroyed the connectors, in > > order to ensure that we don't pass an invalid pointer to any MST helpers > > once we introduce the

Re: [Intel-gfx] [PATCH] sysfs: Disable lockdep for driver bind/unbind files

On Tue, Dec 18, 2018 at 9:14 PM Daniel Vetter wrote: > > This is the much more correct fix for my earlier attempt at: > > https://lkml.org/lkml/2018/12/10/118 > > Short recap: > > - There's not actually a locking issue, it's just lockdep being a bit > too eager to complain about a possible

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/5] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation

== Series Details == Series: series starting with [1/5] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation URL : https://patchwork.freedesktop.org/series/54242/ State : warning == Summary == $ dim sparse origin/drm-tip Sparse version: v0.5.2 Commit: drm/i915: Remove HW

[Intel-gfx] Linux: need help to understand code flow of DP over Type-C

Hi All, I would like to understand Linux code flow of DP over Type-C. Your help is greatly appreciated. Icelake platform is preferred but should be okay with other platform code also. Regards Vijay ___ Intel-gfx mailing list

Re: [Intel-gfx] [WIP PATCH 03/15] drm/dp_mst: Introduce new refcounting scheme for mstbs and ports

On Fri, 2018-12-14 at 10:29 +0100, Daniel Vetter wrote: > On Thu, Dec 13, 2018 at 08:25:32PM -0500, Lyude Paul wrote: > > The current way of handling refcounting in the DP MST helpers is really > > confusing and probably just plain wrong because it's been hacked up many > > times over the years

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/5] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation

== Series Details == Series: series starting with [1/5] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation URL : https://patchwork.freedesktop.org/series/54242/ State : warning == Summary == $ dim checkpatch origin/drm-tip 27c548155de2 drm/i915: Remove HW semaphores for

[Intel-gfx] [PATCH 2/5] drm/i915/execlists: Pull the render flush into breadcrumb emission

In preparation for removing the manual EMIT_FLUSH prior to emitting the breadcrumb implement the flush inline with writing the breadcrumb for execlists. Using one command to both flush and write the breadcrumb is naturally a tiny bit faster than splitting it into two. Signed-off-by: Chris Wilson

[Intel-gfx] Remove HW semaphore synchronisation for gen7

So a global per-engine execution queue is planned to go the way of the dodo. One consequence for this is that HW semaphores will no longer be viable for gen7. However, this is a mixed blessing as it gives us a strong impetus to remove them and take another step towards implementing request

[Intel-gfx] [PATCH 1/5] drm/i915: Remove HW semaphores for gen7 inter-engine synchronisation

The writing is on the wall for the existence of a single execution queue along each engine, and as a consequence we will not be able to track dependencies along the HW queue itself, i.e. we will not be able to use HW semaphores on gen7 as they use a global set of registers (and unlike gen8+ we can

[Intel-gfx] [PATCH 5/5] drm/i915: Remove redundant trailing request flush

Now that we perform the request flushing inline with emitting the breadcrumb, we can remove the now redundant manual flush. And we can also remove the infrastructure that remained only for its purpose. Signed-off-by: Chris Wilson --- drivers/gpu/drm/i915/i915_request.c | 13

[Intel-gfx] [PATCH 3/5] drm/i915/ringbuffer: Pull the render flush into breadcrumb emission

In preparation for removing the manual EMIT_FLUSH prior to emitting the breadcrumb implement the flush inline with writing the breadcrumb for ringbuffer emission. With a combined flush+breadcrumb, we can use a single operation to both flush and after the flush is complete (post-sync) write the

[Intel-gfx] [PATCH 4/5] drm/i915/ringbuffer: Remove irq-seqno w/a for gen6/7 rcs

Having transitioned to using PIPECONTROL to combine the flush with the breadcrumb write using their post-sync functions, assume that this will resolve the serialisation with the subsequent MI_USER_INTERRUPT. That is when inspecting the breadcrumb after an interrupt we can rely on the write being

[Intel-gfx] ✓ Fi.CI.BAT: success for sysfs: Disable lockdep for driver bind/unbind files

== Series Details == Series: sysfs: Disable lockdep for driver bind/unbind files URL : https://patchwork.freedesktop.org/series/54238/ State : success == Summary == CI Bug Log - changes from CI_DRM_5331 -> Patchwork_8 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for sysfs: Disable lockdep for driver bind/unbind files

== Series Details == Series: sysfs: Disable lockdep for driver bind/unbind files URL : https://patchwork.freedesktop.org/series/54238/ State : warning == Summary == $ dim checkpatch origin/drm-tip 53cd70987b66 sysfs: Disable lockdep for driver bind/unbind files -:106: ERROR:GIT_COMMIT_ID:

[Intel-gfx] [PATCH] sysfs: Disable lockdep for driver bind/unbind files

This is the much more correct fix for my earlier attempt at: https://lkml.org/lkml/2018/12/10/118 Short recap: - There's not actually a locking issue, it's just lockdep being a bit too eager to complain about a possible deadlock. - Contrary to what I claimed the real problem is recursion on

Re: [Intel-gfx] uABI / Removing DRM_I915_LOW_LEVEL_TRACEPOINTS Kconfig

On 12/17/18 6:14 PM, Steven Rostedt wrote: On Mon, 17 Dec 2018 18:26:03 -0700 Michael Sartain wrote: Ftrace and perf are fantastic, stable, very well known, and documented with ecosystems built around them. AMD already is doing exactly what we are asking for with tracepoints, and Intel has

Re: [Intel-gfx] [PATCH] drm/i915: Disable -Wuninitialized for intel_breadcrumbs.o

On Tue, Dec 18, 2018 at 11:01 AM Nathan Chancellor wrote: > On Tue, Dec 18, 2018 at 11:53:06AM +, Chris Wilson wrote: > > The other false-positive clang-6 gave was for local_clock_us(). > > Presumably that one is fixed? > > With this patch, I can build i915 using defconfig and allyesconfig >

Re: [Intel-gfx] [PATCH] drm/i915: Disable -Wuninitialized for intel_breadcrumbs.o

On Tue, Dec 18, 2018 at 11:53:06AM +, Chris Wilson wrote: > Quoting Nick Desaulniers (2018-10-25 23:20:58) > > On Thu, Oct 25, 2018 at 12:36 PM Nathan Chancellor > > wrote: > > > > > > This warning is disabled by default in scripts/Makefile.extrawarn when > > > W= is not provided but this

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v4,1/2] drm: Add color management LUT validation helper (v4) (rev2)

== Series Details == Series: series starting with [v4,1/2] drm: Add color management LUT validation helper (v4) (rev2) URL : https://patchwork.freedesktop.org/series/54170/ State : success == Summary == CI Bug Log - changes from CI_DRM_5331 -> Patchwork_7

Re: [Intel-gfx] uABI / Removing DRM_I915_LOW_LEVEL_TRACEPOINTS Kconfig

On 12/18/18 3:33 AM, Chris Wilson wrote: Quoting Michael Sartain (2018-12-18 01:26:03) I'm writing to try and make a case for Tvrtko's "Remove DRM_I915_LOW_LEVEL_TRACEPOINTS Kconfig" patch: https://lists.freedesktop.org/archives/intel-gfx/2018-June/169052.html I'd recommend we just

Re: [Intel-gfx] [PATCH 0/1] drm/i915: Enable fastset by default, except on initial modeset

On Tue, Dec 18, 2018 at 05:07:34PM +0100, Hans de Goede wrote: > Hi, > > On 17-12-18 19:43, Rodrigo Vivi wrote: > > On Mon, Dec 17, 2018 at 03:23:14PM +0100, Hans de Goede wrote: > > > Hi All, > > > > > > As discussed a while ago, I would like to see us enable fastboot by > > > default, starting

[Intel-gfx] [PATCH v4 2/2] drm/i915: Validate userspace-provided color management LUT's (v4)

We currently program userspace-provided gamma and degamma LUT's into our hardware without really checking to see whether they satisfy our hardware's rules. We should try to catch tables that are invalid for our hardware early and reject the atomic transaction. All of our platforms that accept a

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Disable FBC on fastset if necessary

== Series Details == Series: drm/i915: Disable FBC on fastset if necessary URL : https://patchwork.freedesktop.org/series/54226/ State : success == Summary == CI Bug Log - changes from CI_DRM_5331 -> Patchwork_6 Summary ---

Re: [Intel-gfx] [PATCH 0/1] drm/i915: Enable fastset by default, except on initial modeset

Hi, On 17-12-18 19:43, Rodrigo Vivi wrote: On Mon, Dec 17, 2018 at 03:23:14PM +0100, Hans de Goede wrote: Hi All, As discussed a while ago, I would like to see us enable fastboot by default, starting with Skylake / GEN9 and newer hardware, so that we can avoid an unnecessary modeset at boot

Re: [Intel-gfx] [4/5] drm/i915: Make HW readout mark CRTC scaler as in use.

Hi, On 17-12-18 10:50, Maarten Lankhorst wrote: This way we don't accidentally double allocate it and hopefully disable it during fastset. I noticed this when I wrote a patch to sanity check all of the scaler state. Signed-off-by: Maarten Lankhorst Patch looks good to me: Reviewed-by: Hans

Re: [Intel-gfx] [RESEND, 3/5] drm/i915: Enable fastset for non-boot modesets.

Hi, On 17-12-18 10:50, Maarten Lankhorst wrote: Now that our state comparison functions are pretty complete, we should enable fastset by default when a modeset can be avoided. Even if we're not completely certain about the inherited state, we can be certain after the first modeset that our sw

Re: [Intel-gfx] [PATCH] drm/i915: Update crtc scaler settings when update_pipe is set

Hi, On 18-12-18 12:07, Maarten Lankhorst wrote: Op 17-12-2018 om 15:19 schreef Hans de Goede: When the pipe_config's update_pipe flag is set we may need to update the panel fitting settings. On GEN9+ this means we need to update the crtc's scaler settings. This fixes the following WARN_ON,

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Disable FBC on fastset if necessary

== Series Details == Series: drm/i915: Disable FBC on fastset if necessary URL : https://patchwork.freedesktop.org/series/54226/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0af44790eb9f drm/i915: Disable FBC on fastset if necessary -:6: WARNING:COMMIT_LOG_LONG_LINE: Possible

[Intel-gfx] ✗ Fi.CI.BAT: failure for Move pm_runtime accounted time to raw nsec

== Series Details == Series: Move pm_runtime accounted time to raw nsec URL : https://patchwork.freedesktop.org/series/54222/ State : failure == Summary == Applying: PM/runtime: Add a new interface to get accounted time Applying: drm/i915: Move on the new pm runtime interface Applying:

[Intel-gfx] [PATCH] drm/i915: Disable FBC on fastset if necessary

Without this, we will get a dmesg-warn when enable_fbc is cleared on a fastset: WARN_ON(!crtc_state->enable_fbc) WARNING: CPU: 0 PID: 1090 at drivers/gpu/drm/i915/intel_fbc.c:1091 intel_fbc_enable+0x2ce/0x580 [i915] RIP: 0010:intel_fbc_enable+0x2ce/0x580 [i915] Call Trace: ?

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Infoframe precompute/check (rev5)

== Series Details == Series: drm/i915: Infoframe precompute/check (rev5) URL : https://patchwork.freedesktop.org/series/49983/ State : success == Summary == CI Bug Log - changes from CI_DRM_5324_full -> Patchwork_11109_full Summary ---

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: Fix TypeC legacy HPD handling (rev2)

On Fri, Dec 14, 2018 at 09:28:33PM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/icl: Fix TypeC legacy HPD handling (rev2) > URL : https://patchwork.freedesktop.org/series/54017/ > State : success Pushed to -dinq, thanks for the reviews. > > == Summary == > > CI Bug

[Intel-gfx] [PATCH v3 0/3] Move pm_runtime accounted time to raw nsec

Move pm_runtime accounted time to raw nsec. The subject of the patchset has changed as the 1st patch has been queued by Rafael Patch 1 adds a new pm_runtime interface to get accounted suspended time Patch 2 moves drm/i915 driver on the new interface and removes access to internal fields Patch

[Intel-gfx] [PATCH 3/3] PM/runtime:Replace jiffies based accounting with ktime based accounting

From: Thara Gopinath This patch replaces jiffies based accounting for runtime_active_time and runtime_suspended_time with ktime base accounting. This makes the runtime debug counters inline with genpd and other pm subsytems which uses ktime based accounting. Signed-off-by: Thara Gopinath [move

[Intel-gfx] [RFC v3 1/3] PM/runtime: Add a new interface to get accounted time

Some drivers (like i915/drm) need to get the accounted suspended time. pm_runtime_accounted_time_get() will return the suspended or active accounted time until now. Signed-off-by: Vincent Guittot --- drivers/base/power/runtime.c | 26 ++ include/linux/pm_runtime.h | 2

[Intel-gfx] [RFC 2/3] drm/i915: Move on the new pm runtime interface

Use the new pm runtime interface to get the accounted suspended time: pm_runtime_accounted_time_get() Signed-off-by: Vincent Guittot --- drivers/gpu/drm/i915/i915_pmu.c | 18 -- drivers/gpu/drm/i915/i915_pmu.h | 4 ++-- 2 files changed, 10 insertions(+), 12 deletions(-) diff

[Intel-gfx] ✓ Fi.CI.IGT: success for PM/pm_runtime: move on hrtimer and nsec

== Series Details == Series: PM/pm_runtime: move on hrtimer and nsec URL : https://patchwork.freedesktop.org/series/54059/ State : success == Summary == CI Bug Log - changes from CI_DRM_5317_full -> Patchwork_11097_full Summary ---

Re: [Intel-gfx] [PATCH v7] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

Quoting Ville Syrjälä (2018-12-18 14:15:09) > On Tue, Dec 18, 2018 at 10:27:12AM +, Chris Wilson wrote: > > Having completed a test run of gem_eio across all machines in CI we also > > observe the phenomenon (of lost interrupts after resetting the GPU) on > > gen3 machines as well as the

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size

== Series Details == Series: series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size URL : https://patchwork.freedesktop.org/series/54213/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5328 -> Patchwork_4

Re: [Intel-gfx] [PATCH v7] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

On Tue, Dec 18, 2018 at 10:27:12AM +, Chris Wilson wrote: > Having completed a test run of gem_eio across all machines in CI we also > observe the phenomenon (of lost interrupts after resetting the GPU) on > gen3 machines as well as the previously sighted gen6/gen7. Let's apply > the same

Re: [Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/icl: combo port vswing programming changes per BSPEC (rev5)

On Tue, Dec 18, 2018 at 12:35:30AM +, Patchwork wrote: > == Series Details == > > Series: drm/i915/icl: combo port vswing programming changes per BSPEC (rev5) > URL : https://patchwork.freedesktop.org/series/53340/ > State : success Pushed to -dinq, thanks for the patch and review. > >

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size

== Series Details == Series: series starting with [1/3] drm/i915: Prepare for larger CSB status FIFO size URL : https://patchwork.freedesktop.org/series/54213/ State : warning == Summary == $ dim checkpatch origin/drm-tip c158aa2a2dad drm/i915: Prepare for larger CSB status FIFO size -:133:

Re: [Intel-gfx] [PATCH v4 2/2] drm/i915: Validate userspace-provided color management LUT's (v3)

On Mon, Dec 17, 2018 at 02:44:15PM -0800, Matt Roper wrote: > We currently program userspace-provided gamma and degamma LUT's into our > hardware without really checking to see whether they satisfy our > hardware's rules. We should try to catch tables that are invalid for > our hardware early and

Re: [Intel-gfx] [PATCH 1/3] drm/i915: Prepare for larger CSB status FIFO size

Quoting Mika Kuoppala (2018-12-18 13:24:23) > @@ -867,7 +867,7 @@ static void process_csb(struct intel_engine_cs *engine) > struct intel_engine_execlists * const execlists = >execlists; > struct execlist_port *port = execlists->port; > const u32 * const buf =

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2] Add support for forcing specific module

On Tue, Dec 18, 2018 at 02:08:21PM +0200, Petri Latvala wrote: > On Mon, Dec 17, 2018 at 09:22:31AM -0800, Lucas De Marchi wrote: > > On Mon, Dec 17, 2018 at 7:49 AM Daniel Vetter wrote: > > > > > > On Wed, Sep 05, 2018 at 05:38:27PM -0300, Rodrigo Siqueira wrote: > > > > This commit adds a new

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Fix Cherryview oops on boot

== Series Details == Series: drm/i915: Fix Cherryview oops on boot URL : https://patchwork.freedesktop.org/series/54007/ State : success == Summary == CI Bug Log - changes from CI_DRM_5311_full -> Patchwork_11090_full Summary ---

[Intel-gfx] [PATCH 2/3] drm/i915/icl: Switch to using 12 deep CSB status FIFO

Now when we can support variable csb fifo sizes, disable legacy mode. By disabling legacy we hope to get better hw testing coverage by assuming everyone else have switched over. v2: rebase Cc: Chris Wilson Cc: Joonas Lahtinen Cc: Daniele Ceraolo Spurio Cc: Kelvin Gardiner Cc: Paulo Zanoni

[Intel-gfx] [PATCH 1/3] drm/i915: Prepare for larger CSB status FIFO size

Make csb entry count variable in preparation for larger CSB status FIFO size found on gen11+ hardware. v2: adapt to hwsp access only (Chris) non continuous mmio (Daniele) Cc: Daniele Ceraolo Spurio Cc: Chris Wilson Cc: Joonas Lahtinen Signed-off-by: Mika Kuoppala ---

[Intel-gfx] [PATCH 3/3] drm/i915/icl: Introduce gen11 flush/invalidate

There are more pipe control levers to pull with icl. Take them into use both for flushing and invalidating to ensure completeness. Doing so, avoid overloading the gen8 flush/invalidate further and make a gen11 specific callback. Cc: Chris Wilson Cc: Tvrtko Ursulin Signed-off-by: Mika Kuoppala

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev8)

== Series Details == Series: drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev8) URL : https://patchwork.freedesktop.org/series/53979/ State : success == Summary == CI Bug Log - changes from CI_DRM_5325_full -> Patchwork_3_full

Re: [Intel-gfx] [igt-dev] [PATCH i-g-t v2] Add support for forcing specific module

On Mon, Dec 17, 2018 at 09:22:31AM -0800, Lucas De Marchi wrote: > On Mon, Dec 17, 2018 at 7:49 AM Daniel Vetter wrote: > > > > On Wed, Sep 05, 2018 at 05:38:27PM -0300, Rodrigo Siqueira wrote: > > > This commit adds a new option for forcing the use of a specific driver > > > indicated via an

Re: [Intel-gfx] [PATCH] drm/i915: Disable -Wuninitialized for intel_breadcrumbs.o

Quoting Nick Desaulniers (2018-10-25 23:20:58) > On Thu, Oct 25, 2018 at 12:36 PM Nathan Chancellor > wrote: > > > > This warning is disabled by default in scripts/Makefile.extrawarn when > > W= is not provided but this Makefile adds -Wall after this warning is > > disabled so it shows up in the

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev2)

== Series Details == Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev2) URL : https://patchwork.freedesktop.org/series/54127/ State : failure == Summary == CI Bug Log - changes from CI_DRM_5325_full -> Patchwork_2_full

Re: [Intel-gfx] uABI / Removing DRM_I915_LOW_LEVEL_TRACEPOINTS Kconfig

Quoting Michael Sartain (2018-12-18 01:26:03) > I'm writing to try and make a case for Tvrtko's "Remove > DRM_I915_LOW_LEVEL_TRACEPOINTS Kconfig" patch: > > https://lists.freedesktop.org/archives/intel-gfx/2018-June/169052.html I'd recommend we just remove the tracepoints as in the very near

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Infoframe precompute/check (rev5)

== Series Details == Series: drm/i915: Infoframe precompute/check (rev5) URL : https://patchwork.freedesktop.org/series/49983/ State : success == Summary == CI Bug Log - changes from CI_DRM_5324 -> Patchwork_11109 Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for PM/pm_runtime: move on hrtimer and nsec

== Series Details == Series: PM/pm_runtime: move on hrtimer and nsec URL : https://patchwork.freedesktop.org/series/54059/ State : success == Summary == CI Bug Log - changes from CI_DRM_5317 -> Patchwork_11097 Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Fix Cherryview oops on boot

== Series Details == Series: drm/i915: Fix Cherryview oops on boot URL : https://patchwork.freedesktop.org/series/54007/ State : success == Summary == CI Bug Log - changes from CI_DRM_5311 -> Patchwork_11090 Summary --- **WARNING**

Re: [Intel-gfx] [PATCH] drm/i915: Update crtc scaler settings when update_pipe is set

Op 17-12-2018 om 15:19 schreef Hans de Goede: > When the pipe_config's update_pipe flag is set we may need to update the > panel fitting settings. On GEN9+ this means we need to update the crtc's > scaler settings. > > This fixes the following WARN_ON, during i915 loading on an Asrock > B150M

Re: [Intel-gfx] [PATCH v2 4/4] drm/i915/icl: Add fallback detection method for TypeC legacy ports

The v2 looks ok to me. On Fri, 2018-12-14 at 20:27 +0200, Imre Deak wrote: > Add a fallback detection method for TypeC legacy ports in case the > VBT port information used to detect normally such ports is > incorrect. > > For the fallback method we use the TypeC legacy mode specific HPD >

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev8)

== Series Details == Series: drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen (rev8) URL : https://patchwork.freedesktop.org/series/53979/ State : success == Summary == CI Bug Log - changes from CI_DRM_5325 -> Patchwork_3

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev2)

== Series Details == Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev2) URL : https://patchwork.freedesktop.org/series/54127/ State : success == Summary == CI Bug Log - changes from CI_DRM_5325 -> Patchwork_2

[Intel-gfx] [PATCH v7] drm/i915: Apply missed interrupt after reset w/a to all ringbuffer gen

Having completed a test run of gem_eio across all machines in CI we also observe the phenomenon (of lost interrupts after resetting the GPU) on gen3 machines as well as the previously sighted gen6/gen7. Let's apply the same HWSTAM workaround that was effective for gen6+ for all, as although we

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Move to new PM core fields

On Tue, 18 Dec 2018 at 11:03, Rafael J. Wysocki wrote: > > On Tue, Dec 18, 2018 at 10:58 AM Vincent Guittot > wrote: > > > > On Tue, 18 Dec 2018 at 10:57, Rafael J. Wysocki wrote: > > > > > > On Mon, Dec 17, 2018 at 3:22 PM Vincent Guittot > > > wrote: > > > > > > > > On Fri, 14 Dec 2018 at

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Move to new PM core fields

On Tue, Dec 18, 2018 at 10:58 AM Vincent Guittot wrote: > > On Tue, 18 Dec 2018 at 10:57, Rafael J. Wysocki wrote: > > > > On Mon, Dec 17, 2018 at 3:22 PM Vincent Guittot > > wrote: > > > > > > On Fri, 14 Dec 2018 at 15:36, Ulf Hansson wrote: > > > > > > > > On Fri, 14 Dec 2018 at 15:22,

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev2)

== Series Details == Series: series starting with [RESEND,1/5] drm/i915/backlight: Restore backlight on resume, v2. (rev2) URL : https://patchwork.freedesktop.org/series/54127/ State : warning == Summary == $ dim checkpatch origin/drm-tip 221bb96c5120 drm/i915/backlight: Restore backlight on

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Move to new PM core fields

On Tue, 18 Dec 2018 at 10:57, Rafael J. Wysocki wrote: > > On Mon, Dec 17, 2018 at 3:22 PM Vincent Guittot > wrote: > > > > On Fri, 14 Dec 2018 at 15:36, Ulf Hansson wrote: > > > > > > On Fri, 14 Dec 2018 at 15:22, Vincent Guittot > > > wrote: > > > > > > > > With jiffies been replaced by raw

Re: [Intel-gfx] [PATCH v2 3/3] drm/i915: Move to new PM core fields

On Mon, Dec 17, 2018 at 3:22 PM Vincent Guittot wrote: > > On Fri, 14 Dec 2018 at 15:36, Ulf Hansson wrote: > > > > On Fri, 14 Dec 2018 at 15:22, Vincent Guittot > > wrote: > > > > > > With jiffies been replaced by raw ns in PM core accounting, 915 driver is > > > updated to use this new time

[Intel-gfx] [HACK for CI] drm/i915: Update crtc scaler settings when update_pipe is set

From: Hans de Goede When the pipe_config's update_pipe flag is set we may need to update the panel fitting settings. On GEN9+ this means we need to update the crtc's scaler settings. This fixes the following WARN_ON, during i915 loading on an Asrock B150M Pro4S/D3 board with an i5-6500 CPU /