[Intel-gfx] ✓ Fi.CI.BAT: success for Enable HDR on MCA LSPCON based Gen9 devices (rev10)

2020-11-03 Thread Patchwork
== Series Details == Series: Enable HDR on MCA LSPCON based Gen9 devices (rev10) URL : https://patchwork.freedesktop.org/series/68081/ State : success == Summary == CI Bug Log - changes from CI_DRM_9260 -> Patchwork_18849 Summary ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev10)

2020-11-03 Thread Patchwork
== Series Details == Series: Enable HDR on MCA LSPCON based Gen9 devices (rev10) URL : https://patchwork.freedesktop.org/series/68081/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev10)

2020-11-03 Thread Patchwork
== Series Details == Series: Enable HDR on MCA LSPCON based Gen9 devices (rev10) URL : https://patchwork.freedesktop.org/series/68081/ State : warning == Summary == $ dim checkpatch origin/drm-tip 78d17307adc1 drm/i915/display: Add HDR Capability detection for LSPCON bf9c35469dac

[Intel-gfx] [v10 03/12] drm/i915/display: Attach HDR property for capable Gen9 devices

2020-11-03 Thread Uma Shankar
Attach HDR property for Gen9 devices with MCA LSPCON chips. v2: Cleaned HDR property attachment logic based on capability as per Jani Nikula's suggestion. v3: Fixed the HDR property attachment logic as per the new changes by Kai-Feng to align with lspcon detection failure on some devices. v4:

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ehl: Implement W/A 22010492432 (rev3)

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Implement W/A 22010492432 (rev3) URL : https://patchwork.freedesktop.org/series/83135/ State : success == Summary == CI Bug Log - changes from CI_DRM_9260 -> Patchwork_18848 Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/tgl: Fix typo during output setup

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Fix typo during output setup URL : https://patchwork.freedesktop.org/series/83465/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9258_full -> Patchwork_18847_full Summary ---

[Intel-gfx] [PATCH V3] drm/i915/ehl: Implement W/A 22010492432

2020-11-03 Thread Tejas Upadhyay
As per W/A implemented for TGL to program half of the nominal DCO divider fraction value which is also applicable on EHL. Changes since V2: - Apply stepping B0 till FOREVER - B0 - revid update as per Bspec 29153 Changes since V1: - ehl_ used as to keep earliest platform

Re: [Intel-gfx] [PATCH] drm/i915/gvt: Remove incorrect kerneldoc marking

2020-11-03 Thread Zhenyu Wang
On 2020.11.03 20:43:07 +, Chris Wilson wrote: > Just a normal comment, not a kerneldoc function description. > > drivers/gpu/drm/i915/gvt/handlers.c:1666: warning: Function parameter or > member 'vgpu' not described in 'bxt_ppat_low_write' > drivers/gpu/drm/i915/gvt/handlers.c:1666: warning:

[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [v2,1/2] drm/i915/display: Support PSR Multiple Transcoders

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915/display: Support PSR Multiple Transcoders URL : https://patchwork.freedesktop.org/series/83446/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9256_full -> Patchwork_18845_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tgl: Fix typo during output setup

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915/tgl: Fix typo during output setup URL : https://patchwork.freedesktop.org/series/83465/ State : success == Summary == CI Bug Log - changes from CI_DRM_9258 -> Patchwork_18847 Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() URL : https://patchwork.freedesktop.org/series/83445/ State : success == Summary == CI Bug Log - changes from CI_DRM_9256_full -> Patchwork_18844_full

Re: [Intel-gfx] [PATCH] drm/i915/tgl: Fix typo during output setup

2020-11-03 Thread Lucas De Marchi
On Wed, Nov 04, 2020 at 03:00:00AM +0200, Imre Deak wrote: Fix a typo that led to some MST short pulse event handling issue (the short pulse event was handled for both encoder instances, each having its own state). Fixes: 1d8ca002456b6 ("drm/i915: Add PORT_TCn aliases to enum port") Cc: Ville

Re: [Intel-gfx] [PATCH 1/3] drm/i915/dg1: map/unmap pll clocks

2020-11-03 Thread Lucas De Marchi
On Mon, Nov 02, 2020 at 08:59:32AM -0800, Aditya Swarup wrote: On 10/26/20 9:35 PM, Lucas De Marchi wrote: On Mon, Oct 26, 2020 at 09:32:26PM -0700, Lucas De Marchi wrote: DG1 uses 2 registers for the ddi clock mapping, with PHY A and B using DPCLKA_CFGCR0 and PHY C and D using DPCLKA1_CFGCR0.

[Intel-gfx] [PATCH] drm/i915/tgl: Fix typo during output setup

2020-11-03 Thread Imre Deak
Fix a typo that led to some MST short pulse event handling issue (the short pulse event was handled for both encoder instances, each having its own state). Fixes: 1d8ca002456b6 ("drm/i915: Add PORT_TCn aliases to enum port") Cc: Ville Syrjälä Cc: Lucas De Marchi Signed-off-by: Imre Deak ---

Re: [Intel-gfx] [PATCH] drm/i915/ehl: Remove invalid PCI ID

2020-11-03 Thread Srivatsa, Anusha
> -Original Message- > From: Ville Syrjälä > Sent: Monday, November 2, 2020 9:29 AM > To: Srivatsa, Anusha > Cc: intel-gfx@lists.freedesktop.org > Subject: Re: [PATCH] drm/i915/ehl: Remove invalid PCI ID > > On Fri, Oct 30, 2020 at 02:26:14PM -0700, Anusha Srivatsa wrote: > > Update

Re: [Intel-gfx] linux-next: build failure after merge of the drm-intel-fixes tree

2020-11-03 Thread Rodrigo Vivi
On Wed, Nov 04, 2020 at 09:37:05AM +1100, Stephen Rothwell wrote: > Hi all, > > After merging the drm-intel-fixes tree, today's linux-next build (x86_64 > allmodconfig) failed like this: > > drivers/gpu/drm/i915/gt/intel_lrc.c: In function 'gen12_emit_fini_breadcrumb': >

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v5,1/6] drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes (rev3)

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [v5,1/6] drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes (rev3) URL : https://patchwork.freedesktop.org/series/83373/ State : success == Summary == CI Bug Log - changes from CI_DRM_9255_full -> Patchwork_18843_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915: Include fb modidier in state dumps

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915: Include fb modidier in state dumps URL : https://patchwork.freedesktop.org/series/83438/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9255_full -> Patchwork_18842_full Summary

[Intel-gfx] linux-next: build failure after merge of the drm-intel-fixes tree

2020-11-03 Thread Stephen Rothwell
Hi all, After merging the drm-intel-fixes tree, today's linux-next build (x86_64 allmodconfig) failed like this: drivers/gpu/drm/i915/gt/intel_lrc.c: In function 'gen12_emit_fini_breadcrumb': drivers/gpu/drm/i915/gt/intel_lrc.c:4998:31: error: implicit declaration of function

Re: [Intel-gfx] [PATCH] drm/i915: Tweaked Wa_14010685332 for PCHs used on gen11 platforms

2020-11-03 Thread Rodrigo Vivi
On Fri, Oct 30, 2020 at 11:46:58AM +0530, Anshuman Gupta wrote: > From: Bob Paauwe > > The WA specifies that we need to toggle a SDE chicken bit on and then > off as the final step in preparation for s0ix entry. > > Bspec: 33450 > Bspec: 8402 > > However, something is happening after

Re: [Intel-gfx] [PATCH] drm/i915/tgl, rkl, dg1: Apply WA_1406941453 to TGL, RKL and DG1

2020-11-03 Thread Clint Taylor
On 11/2/20 5:59 PM, Swathi Dhanavanthri wrote: This workaround is applicable only for tgl,rkl and dg1. Bspec: 52890, 53273, 53508. Signed-off-by: Swathi Dhanavanthri --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 12 +--- 1 file changed, 5 insertions(+), 7 deletions(-) diff

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gvt: Remove incorrect kerneldoc marking

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915/gvt: Remove incorrect kerneldoc marking URL : https://patchwork.freedesktop.org/series/83451/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9256 -> Patchwork_18846 Summary ---

[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/ehl: Implement W/A 22010492432 (rev2)

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Implement W/A 22010492432 (rev2) URL : https://patchwork.freedesktop.org/series/83135/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9253_full -> Patchwork_18840_full Summary

[Intel-gfx] [PATCH] drm/i915/gvt: Remove incorrect kerneldoc marking

2020-11-03 Thread Chris Wilson
Just a normal comment, not a kerneldoc function description. drivers/gpu/drm/i915/gvt/handlers.c:1666: warning: Function parameter or member 'vgpu' not described in 'bxt_ppat_low_write' drivers/gpu/drm/i915/gvt/handlers.c:1666: warning: Function parameter or member 'offset' not described in

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/2] drm/i915/display: Support PSR Multiple Transcoders

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915/display: Support PSR Multiple Transcoders URL : https://patchwork.freedesktop.org/series/83446/ State : success == Summary == CI Bug Log - changes from CI_DRM_9256 -> Patchwork_18845

Re: [Intel-gfx] [PATCH] drm/i915/display: Use initial_fastset_check() to compute and apply the initial PSR state

2020-11-03 Thread Imre Deak
On Mon, Nov 02, 2020 at 02:10:48PM -0800, José Roberto de Souza wrote: > Replace the previous approach to force compute the initial PSR state > after i915 take over from firmware by the better and recently added > initial_fastset_check() hook. > > Cc: Imre Deak > Signed-off-by: José Roberto de

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/2] drm/i915/display: Support PSR Multiple Transcoders

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915/display: Support PSR Multiple Transcoders URL : https://patchwork.freedesktop.org/series/83446/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/2] drm/i915/display: Support PSR Multiple Transcoders

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [v2,1/2] drm/i915/display: Support PSR Multiple Transcoders URL : https://patchwork.freedesktop.org/series/83446/ State : warning == Summary == $ dim checkpatch origin/drm-tip 0a126bd8ea31 drm/i915/display: Support PSR Multiple Transcoders

[Intel-gfx] [PATCH v2 2/2] drm/i915/display: Support Multiple Transcoders' PSR status on debugfs

2020-11-03 Thread Gwan-gyeong Mun
In order to support the PSR state of each transcoder, it adds i915_psr_status to sub-directory of each transcoder. v2: Change using of Symbolic permissions 'S_IRUGO' to using of octal permissions '0444' Signed-off-by: Gwan-gyeong Mun Cc: José Roberto de Souza ---

[Intel-gfx] [PATCH v2 1/2] drm/i915/display: Support PSR Multiple Transcoders

2020-11-03 Thread Gwan-gyeong Mun
It is a preliminary work for supporting multiple EDP PSR and DP PanelReplay. And it refactors singleton PSR to Multi Transcoder supportable PSR. And this moves and renames the i915_psr structure of drm_i915_private's to intel_dp's intel_psr structure. It also causes changes in PSR interrupt

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() URL : https://patchwork.freedesktop.org/series/83445/ State : success == Summary == CI Bug Log - changes from CI_DRM_9256 -> Patchwork_18844

Re: [Intel-gfx] [patch V3 22/37] highmem: High implementation details and document API

2020-11-03 Thread Thomas Gleixner
On Tue, Nov 03 2020 at 09:48, Linus Torvalds wrote: > I have no complaints about the patch, but it strikes me that if people > want to actually have much better debug coverage, this is where it > should be (I like the "every other address" thing too, don't get me > wrong). > > In particular,

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm() URL : https://patchwork.freedesktop.org/series/83445/ State : warning == Summary == $ dim checkpatch origin/drm-tip 32d744b404ab drm/i915: Pass intel_atomic_state to

[Intel-gfx] [PATCH 3/3] drm/i915: Pimp the watermark documentation a bit

2020-11-03 Thread Ville Syrjala
From: Ville Syrjälä Document what each of the "raw" vs. "optimal" vs. "intermediate" watermarks do. Signed-off-by: Ville Syrjälä --- .../drm/i915/display/intel_display_types.h| 48 ++- 1 file changed, 25 insertions(+), 23 deletions(-) diff --git

[Intel-gfx] [PATCH 2/3] drm/i915: Nuke intel_atomic_crtc_state_for_each_plane_state() from skl+ wm code

2020-11-03 Thread Ville Syrjala
From: Ville Syrjälä intel_atomic_crtc_state_for_each_plane_state() peeks at the plane's current state without holding the plane's mutex, trusting that the crtc's mutex will protect it. In practice that does work since our planes can't move between pipes, but it sets a bad example.

[Intel-gfx] [PATCH 1/3] drm/i915: Pass intel_atomic_state to skl_build_pipe_wm()

2020-11-03 Thread Ville Syrjala
From: Ville Syrjälä Pass the whole intel_atomic_state to skl_build_pipe_wm() so we can start to iterate stuff containerd in the commit. Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/intel_pm.c | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git

Re: [Intel-gfx] [PATCH v3] vfio/pci: Bypass IGD init in case of -ENODEV

2020-11-03 Thread Alex Williamson
On Tue, 3 Nov 2020 02:01:20 +0800 Fred Gao wrote: > Bypass the IGD initialization when -ENODEV returns, > that should be the case if opregion is not available for IGD > or within discrete graphics device's option ROM, > or host/lpc bridge is not found. > > Then use of -ENODEV here means no

Re: [Intel-gfx] [patch V3 22/37] highmem: High implementation details and document API

2020-11-03 Thread Linus Torvalds
On Tue, Nov 3, 2020 at 2:33 AM Thomas Gleixner wrote: > > +static inline void *kmap(struct page *page) > +{ > + void *addr; > + > + might_sleep(); > + if (!PageHighMem(page)) > + addr = page_address(page); > + else > + addr = kmap_high(page); >

Re: [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432

2020-11-03 Thread Imre Deak
On Tue, Nov 03, 2020 at 06:31:58PM +0200, Surendrakumar Upadhyay, TejaskumarX wrote: > > -Original Message- > > From: Imre Deak > > Sent: 03 November 2020 21:13 > > To: Surendrakumar Upadhyay, TejaskumarX > > > > Cc: intel-gfx@lists.freedesktop.org; Pandey, Hariom > > > > Subject: Re:

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v5,1/6] drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes (rev3)

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [v5,1/6] drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes (rev3) URL : https://patchwork.freedesktop.org/series/83373/ State : success == Summary == CI Bug Log - changes from CI_DRM_9255 -> Patchwork_18843

Re: [Intel-gfx] [PATCH 3/5] drm/amdgpu: Paper over the drm_driver mangling for virt

2020-11-03 Thread Alex Deucher
On Sun, Nov 1, 2020 at 5:01 AM Daniel Vetter wrote: > > On Sat, Oct 31, 2020 at 2:57 PM Daniel Vetter wrote: > > > > On Fri, Oct 30, 2020 at 7:47 PM Alex Deucher wrote: > > > > > > On Fri, Oct 30, 2020 at 6:11 AM Daniel Vetter > > > wrote: > > > > > > > > Prep work to make drm_device->driver

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v5,1/6] drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes (rev3)

2020-11-03 Thread Patchwork
== Series Details == Series: series starting with [v5,1/6] drm/i915/dp: Some reshuffling in mode_valid as prep for bigjoiner modes (rev3) URL : https://patchwork.freedesktop.org/series/83373/ State : warning == Summary == $ dim checkpatch origin/drm-tip ef45baae1b4d drm/i915/dp: Some

Re: [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432

2020-11-03 Thread Surendrakumar Upadhyay, TejaskumarX
> -Original Message- > From: Imre Deak > Sent: 03 November 2020 21:13 > To: Surendrakumar Upadhyay, TejaskumarX > > Cc: intel-gfx@lists.freedesktop.org; Pandey, Hariom > > Subject: Re: [PATCH V2] drm/i915/ehl: Implement W/A 22010492432 > > On Tue, Nov 03, 2020 at 07:16:51PM +0530,

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Include fb modidier in state dumps

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915: Include fb modidier in state dumps URL : https://patchwork.freedesktop.org/series/83438/ State : success == Summary == CI Bug Log - changes from CI_DRM_9255 -> Patchwork_18842 Summary ---

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Include fb modidier in state dumps

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915: Include fb modidier in state dumps URL : https://patchwork.freedesktop.org/series/83438/ State : warning == Summary == $ dim checkpatch origin/drm-tip 843ae78a11bb drm/i915: Include fb modidier in state dumps -:43: WARNING:LONG_LINE: line length of 120

[Intel-gfx] ✗ Fi.CI.BAT: failure for Enable HDR on MCA LSPCON based Gen9 devices (rev9)

2020-11-03 Thread Patchwork
== Series Details == Series: Enable HDR on MCA LSPCON based Gen9 devices (rev9) URL : https://patchwork.freedesktop.org/series/68081/ State : failure == Summary == CI Bug Log - changes from CI_DRM_9255 -> Patchwork_18841 Summary ---

[Intel-gfx] [PATCH v6 6/6] drm/i915/dp: Allow big joiner modes in intel_dp_mode_valid(), v3.

2020-11-03 Thread Manasi Navare
From: Maarten Lankhorst Small changes to intel_dp_mode_valid(), allow listing modes that can only be supported in the bigjoiner configuration, which is not supported yet. v13: * Allow bigjoiner if hdisplay >5120 v12: * slice_count logic simplify (Ville) * Fix unnecessary changes in

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev9)

2020-11-03 Thread Patchwork
== Series Details == Series: Enable HDR on MCA LSPCON based Gen9 devices (rev9) URL : https://patchwork.freedesktop.org/series/68081/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Enable HDR on MCA LSPCON based Gen9 devices (rev9)

2020-11-03 Thread Patchwork
== Series Details == Series: Enable HDR on MCA LSPCON based Gen9 devices (rev9) URL : https://patchwork.freedesktop.org/series/68081/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7ce78e26d315 drm/i915/display: Add HDR Capability detection for LSPCON 0fac40ec244f

Re: [Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432

2020-11-03 Thread Imre Deak
On Tue, Nov 03, 2020 at 07:16:51PM +0530, Tejas Upadhyay wrote: > As per W/A implemented for TGL to program half of the nominal > DCO divider fraction value which is also applicable on EHL. > > Changes since V1: > - ehl_ used as to keep earliest platform prefix > - WA required B0

Re: [Intel-gfx] [PATCH] drm/i915: Include fb modidier in state dumps

2020-11-03 Thread Simon Ser
Thanks! Acked-by: Simon Ser ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

[Intel-gfx] [PATCH] drm/i915: Include fb modidier in state dumps

2020-11-03 Thread Ville Syrjala
From: Ville Syrjälä To help diagnose modifier related issues let's include that information in the various state dumps. Cc: Simon Ser Signed-off-by: Ville Syrjälä --- drivers/gpu/drm/i915/display/intel_display.c | 4 ++-- drivers/gpu/drm/i915/display/intel_display_debugfs.c | 7

[Intel-gfx] [v9 08/12] drm/i915/display: Implement infoframes readback for LSPCON

2020-11-03 Thread Uma Shankar
Implemented Infoframes enabled readback for LSPCON devices. This will help align the implementation with state readback infrastructure. v2: Added proper bitmask of enabled infoframes as per Ville's recommendation. v3: Added pcon specific infoframe types instead of using the HSW one's, as

[Intel-gfx] [v9 05/12] drm/i915/display: Nuke bogus lspcon check

2020-11-03 Thread Uma Shankar
Dropped a irrelevant lspcon check from intel_hdmi_add_properties function. Suggested-by: Ville Syrjälä" Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_hdmi.c | 10 +- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git

[Intel-gfx] [v9 09/12] drm/i915/display: Implement DRM infoframe read for LSPCON

2020-11-03 Thread Uma Shankar
Implement Read back of HDR metadata infoframes i.e Dynamic Range and Mastering Infoframe for LSPCON devices. v2: Added proper bitmask of enabled infoframes as per Ville's recommendation. v3: Dropped a redundant wrapper as per Ville's comment. Signed-off-by: Uma Shankar ---

[Intel-gfx] [v9 11/12] drm/i915/lspcon: Do not send DRM infoframes to non-HDMI sinks

2020-11-03 Thread Uma Shankar
Non-HDMI sinks shouldn't be sent Dynamic Range and Mastering infoframes. Check for that when using LSPCON. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_ddi.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git

[Intel-gfx] [v9 00/12] Enable HDR on MCA LSPCON based Gen9 devices

2020-11-03 Thread Uma Shankar
Gen9 hardware supports HDMI2.0 through LSPCON chips. Extending HDR support for MCA and Parade LSPCON based GEN9 devices. SOC will drive LSPCON as DP and send HDR metadata as standard DP SDP packets. LSPCON will be set to operate in PCON mode, will receive the metadata and create Dynamic Range and

[Intel-gfx] [v9 04/12] drm/i915/display: Attach content type property for LSPCON

2020-11-03 Thread Uma Shankar
Content type is supported on HDMI sink devices. Attached the property for the same for LSPCON based devices. Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_dp.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/gpu/drm/i915/display/intel_dp.c

[Intel-gfx] [v9 06/12] drm/i915/display: Enable BT2020 for HDR on LSPCON devices

2020-11-03 Thread Uma Shankar
Enable Colorspace as BT2020 if driving HDR content.Sending Colorimetry data for HDR using AVI infoframe. LSPCON firmware expects this and though SOC drives DP, for HDMI panel AVI infoframe is sent to the LSPCON device which transfers the same to HDMI sink. v2: Dropped state managed in drm core as

[Intel-gfx] [v9 03/12] drm/i915/display: Attach HDR property for capable Gen9 devices

2020-11-03 Thread Uma Shankar
Attach HDR property for Gen9 devices with MCA LSPCON chips. v2: Cleaned HDR property attachment logic based on capability as per Jani Nikula's suggestion. v3: Fixed the HDR property attachment logic as per the new changes by Kai-Feng to align with lspcon detection failure on some devices. v4:

[Intel-gfx] [v9 02/12] drm/i915/display: Enable HDR on gen9 devices with MCA Lspcon

2020-11-03 Thread Uma Shankar
Gen9 hardware supports HDMI2.0 through LSPCON chips. Extending HDR support for MCA LSPCON based GEN9 devices. SOC will drive LSPCON as DP and send HDR metadata as standard DP SDP packets. LSPCON will be set to operate in PCON mode, will receive the metadata and create Dynamic Range and Mastering

[Intel-gfx] [v9 01/12] drm/i915/display: Add HDR Capability detection for LSPCON

2020-11-03 Thread Uma Shankar
LSPCON firmware exposes HDR capability through LPCON_CAPABILITIES DPCD register. LSPCON implementations capable of supporting HDR set HDR_CAPABILITY bit in LSPCON_CAPABILITIES to 1. This patch reads the same, detects the HDR capability and adds this to intel_lspcon struct. v2: Addressed Jani

[Intel-gfx] [v9 07/12] drm/i915/display: Enable HDR for Parade based lspcon

2020-11-03 Thread Uma Shankar
Enable HDR for LSPCON based on Parade along with MCA. v2: Added a helper for status reg as suggested by Ville. Signed-off-by: Uma Shankar Signed-off-by: Vipin Anand --- drivers/gpu/drm/i915/display/intel_lspcon.c | 19 +-- 1 file changed, 13 insertions(+), 6 deletions(-) diff

[Intel-gfx] [v9 10/12] drm/i915/lspcon: Create separate infoframe_enabled helper

2020-11-03 Thread Uma Shankar
Lspcon has Infoframes as well as DIP for HDR metadata(DRM Infoframe). Create a separate mechanism for lspcon compared to HDMI in order to address the same and ensure future scalability. Suggested-by: Ville Syrjälä Signed-off-by: Uma Shankar --- drivers/gpu/drm/i915/display/intel_ddi.c| 10

[Intel-gfx] [v9 12/12] drm/i915/display: [NOT FOR MERGE] Reduce blanking to support 4k60@10bpp for LSPCON

2020-11-03 Thread Uma Shankar
Blanking needs to be reduced to incorporate DP and HDMI timing/link bandwidth limitations for CEA modes (4k@60 at 10 bpp). DP can drive 17.28Gbs while 4k modes (VIC97 etc) at 10 bpp required 17.8 Gbps. This will cause mode to blank out. Reduced Htotal by shortening the back porch and front porch

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/ehl: Implement W/A 22010492432 (rev2)

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Implement W/A 22010492432 (rev2) URL : https://patchwork.freedesktop.org/series/83135/ State : success == Summary == CI Bug Log - changes from CI_DRM_9253 -> Patchwork_18840 Summary ---

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Flush xcs before tgl breadcrumbs

2020-11-03 Thread Chris Wilson
Quoting Mika Kuoppala (2020-11-03 12:44:53) > Chris Wilson writes: > > > In a simple test case that writes to scratch and then busy-waits for the > > batch to be signaled, we observe that the signal is before the write is > > posted. That is bad news. > > > > Splitting the flush + write_dword

Re: [Intel-gfx] [patch V3 05/37] asm-generic: Provide kmap_size.h

2020-11-03 Thread Arnd Bergmann
On Tue, Nov 3, 2020 at 10:27 AM Thomas Gleixner wrote: > > kmap_types.h is a misnomer because the old atomic MAP based array does not > exist anymore and the whole indirection of architectures including > kmap_types.h is inconinstent and does not allow to provide guard page > debugging for this

Re: [Intel-gfx] [PATCH v4 4/7] iommu: Add quirk for Intel graphic devices in map_sg

2020-11-03 Thread Robin Murphy
On 2020-09-27 07:34, Lu Baolu wrote: Combining the sg segments exposes a bug in the Intel i915 driver which causes visual artifacts and the screen to freeze. This is most likely because of how the i915 handles the returned list. It probably doesn't respect the returned value specifying the

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/ehl: Implement W/A 22010492432 (rev2)

2020-11-03 Thread Patchwork
== Series Details == Series: drm/i915/ehl: Implement W/A 22010492432 (rev2) URL : https://patchwork.freedesktop.org/series/83135/ State : warning == Summary == $ dim checkpatch origin/drm-tip 003c5f8bf5bd drm/i915/ehl: Implement W/A 22010492432 -:34: CHECK:PARENTHESIS_ALIGNMENT: Alignment

[Intel-gfx] ✗ Fi.CI.BUILD: failure for mm/highmem: Preemptible variant of kmap_atomic & friends (rev2)

2020-11-03 Thread Patchwork
== Series Details == Series: mm/highmem: Preemptible variant of kmap_atomic & friends (rev2) URL : https://patchwork.freedesktop.org/series/83421/ State : failure == Summary == Applying: mm/highmem: Un-EXPORT __kmap_atomic_idx() Applying: highmem: Remove unused functions Applying: fs: Remove

[Intel-gfx] [PATCH V2] drm/i915/ehl: Implement W/A 22010492432

2020-11-03 Thread Tejas Upadhyay
As per W/A implemented for TGL to program half of the nominal DCO divider fraction value which is also applicable on EHL. Changes since V1: - ehl_ used as to keep earliest platform prefix - WA required B0 stepping onwards Cc: Deak Imre Signed-off-by: Tejas Upadhyay ---

Re: [Intel-gfx] [PATCH v4 21/61] drm/i915: Pass ww ctx to intel_pin_to_display_plane

2020-11-03 Thread Thomas Hellström
On 10/16/20 12:44 PM, Maarten Lankhorst wrote: Instead of multiple lockings, lock the object once, and perform the ww dance around attach_phys and pin_pages. Signed-off-by: Maarten Lankhorst --- Not familiar with the code, but looks good from what I can tell. Reviewed-by: Thomas Hellström

[Intel-gfx] [patch V4 24/37] sched: highmem: Store local kmaps in task struct

2020-11-03 Thread Thomas Gleixner
Instead of storing the map per CPU provide and use per task storage. That prepares for local kmaps which are preemptible. The context switch code is preparatory and not yet in use because kmap_atomic() runs with preemption disabled. Will be made usable in the next step. The context switch logic

Re: [Intel-gfx] [PATCH v4 01/61] drm/i915: Move cmd parser pinning to execbuffer

2020-11-03 Thread Thomas Hellström
On 10/16/20 12:43 PM, Maarten Lankhorst wrote: We need to get rid of allocations in the cmd parser, because it needs to be called from a signaling context, first move all pinning to execbuf, where we already hold all locks. Allocate jump_whitelist in the execbuffer, and add annotations around

Re: [Intel-gfx] [patch V3 24/37] sched: highmem: Store local kmaps in task struct

2020-11-03 Thread Thomas Gleixner
On Tue, Nov 03 2020 at 10:27, Thomas Gleixner wrote: > +struct kmap_ctrl { > +#ifdef CONFIG_KMAP_LOCAL > + int idx; > + pte_t pteval[KM_TYPE_NR]; I'm a moron. Fixed it on the test machine ...

[Intel-gfx] ✗ Fi.CI.BUILD: failure for mm/highmem: Preemptible variant of kmap_atomic & friends

2020-11-03 Thread Patchwork
== Series Details == Series: mm/highmem: Preemptible variant of kmap_atomic & friends URL : https://patchwork.freedesktop.org/series/83421/ State : failure == Summary == Applying: mm/highmem: Un-EXPORT __kmap_atomic_idx() Applying: highmem: Remove unused functions Applying: fs: Remove

Re: [Intel-gfx] [PATCH v4 59/61] drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal

2020-11-03 Thread Thomas Hellström
On 11/3/20 2:27 PM, Thomas Hellström wrote: On 10/16/20 12:44 PM, Maarten Lankhorst wrote: We need to lock the global gtt dma_resv, use i915_vm_lock_objects to handle this correctly. Add ww handling for this where required. Add the object lock around unpin/put pages, and use the unlocked

Re: [Intel-gfx] [PATCH v4 60/61] drm/i915: Finally remove obj->mm.lock.

2020-11-03 Thread Thomas Hellström
On 10/16/20 12:44 PM, Maarten Lankhorst wrote: With all callers and selftests fixed to use ww locking, we can now finally remove this lock. Signed-off-by: Maarten Lankhorst --- drivers/gpu/drm/i915/gem/i915_gem_object.c| 2 - drivers/gpu/drm/i915/gem/i915_gem_object.h| 5 +--

Re: [Intel-gfx] [PATCH v4 59/61] drm/i915/selftests: Prepare gtt tests for obj->mm.lock removal

2020-11-03 Thread Thomas Hellström
On 10/16/20 12:44 PM, Maarten Lankhorst wrote: We need to lock the global gtt dma_resv, use i915_vm_lock_objects to handle this correctly. Add ww handling for this where required. Add the object lock around unpin/put pages, and use the unlocked versions of pin_pages and pin_map where required.

Re: [Intel-gfx] [PATCH v4 40/61] drm/i915/selftests: Prepare huge_pages testcases for obj->mm.lock removal.

2020-11-03 Thread Thomas Hellström
On 10/16/20 12:44 PM, Maarten Lankhorst wrote: Straightforward conversion, just convert a bunch of calls to unlocked versions. Signed-off-by: Maarten Lankhorst --- Reviewed-by: Thomas Hellström ___ Intel-gfx mailing list

Re: [Intel-gfx] [PATCH 2/2] drm/i915/gt: Flush xcs before tgl breadcrumbs

2020-11-03 Thread Mika Kuoppala
Chris Wilson writes: > In a simple test case that writes to scratch and then busy-waits for the > batch to be signaled, we observe that the signal is before the write is > posted. That is bad news. > > Splitting the flush + write_dword into two separate flush_dw prevents > the issue from being

[Intel-gfx] [PULL] drm-intel-next-queued

2020-11-03 Thread Jani Nikula
16:43:57 -0400) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-next-queued-2020-11-03 for you to fetch changes up to 139caf7ca2866cd0a45814ff938cb0c33920a266: drm/i915: Update DRIVER_DATE to 20201103 (2020-11-03

Re: [Intel-gfx] [patch V3 03/37] fs: Remove asm/kmap_types.h includes

2020-11-03 Thread David Sterba
On Tue, Nov 03, 2020 at 10:27:15AM +0100, Thomas Gleixner wrote: > Historical leftovers from the time where kmap() had fixed slots. > > Signed-off-by: Thomas Gleixner > Cc: Alexander Viro > Cc: Benjamin LaHaise > Cc: linux-fsde...@vger.kernel.org > Cc: linux-...@kvack.org > Cc: Chris Mason >

Re: [Intel-gfx] [PATCH v4 0/7] Convert the intel iommu driver to the dma-iommu api

2020-11-03 Thread Joerg Roedel
Hi, On Tue, Nov 03, 2020 at 11:58:26AM +0200, Joonas Lahtinen wrote: > Would that work for you? We intend to send the feature pull requests > to DRM for 5.11 in the upcoming weeks. For the IOMMU side it is best to include the workaround for now. When the DRM fixes are merged into v5.11-rc1

[Intel-gfx] [patch V3 21/37] Documentation/io-mapping: Remove outdated blurb

2020-11-03 Thread Thomas Gleixner
The implementation details in the documentation are outdated and not really helpful. Remove them. Signed-off-by: Thomas Gleixner --- V3: New patch --- Documentation/driver-api/io-mapping.rst | 22 -- 1 file changed, 22 deletions(-) ---

[Intel-gfx] [patch V3 25/37] mm/highmem: Provide kmap_local*

2020-11-03 Thread Thomas Gleixner
Now that the kmap atomic index is stored in task struct provide a preemptible variant. On context switch the maps of an outgoing task are removed and the map of the incoming task are restored. That's obviously slow, but highmem is slow anyway. The kmap_local.*() functions can be invoked from both

[Intel-gfx] [patch V3 20/37] io-mapping: Cleanup atomic iomap

2020-11-03 Thread Thomas Gleixner
Switch the atomic iomap implementation over to kmap_local and stick the preempt/pagefault mechanics into the generic code similar to the kmap_atomic variants. Rename the x86 map function in preparation for a non-atomic variant. Signed-off-by: Thomas Gleixner --- V2: New patch to make review

[Intel-gfx] [patch V3 18/37] highmem: Get rid of kmap_types.h

2020-11-03 Thread Thomas Gleixner
The header is not longer used and on alpha, ia64, openrisc, parisc and um it was completely unused anyway as these architectures have no highmem support. Signed-off-by: Thomas Gleixner --- V3: New patch --- arch/alpha/include/asm/kmap_types.h | 15 ---

[Intel-gfx] [patch V3 17/37] xtensa/mm/highmem: Switch to generic kmap atomic

2020-11-03 Thread Thomas Gleixner
No reason having the same code in every architecture Signed-off-by: Thomas Gleixner Cc: Chris Zankel Cc: Max Filippov Cc: linux-xte...@linux-xtensa.org --- V3: Remove the kmap types cruft --- arch/xtensa/Kconfig |1 arch/xtensa/include/asm/fixmap.h |4 +--

[Intel-gfx] [patch V3 28/37] mips/crashdump: Simplify copy_oldmem_page()

2020-11-03 Thread Thomas Gleixner
Replace kmap_atomic_pfn() with kmap_local_pfn() which is preemptible and can take page faults. Remove the indirection of the dump page and the related cruft which is not longer required. Signed-off-by: Thomas Gleixner Cc: Thomas Bogendoerfer Cc: linux-m...@vger.kernel.org --- V3: New patch ---

[Intel-gfx] [patch V3 37/37] io-mapping: Remove io_mapping_map_atomic_wc()

2020-11-03 Thread Thomas Gleixner
No more users. Get rid of it and remove the traces in documentation. Signed-off-by: Thomas Gleixner --- V3: New patch --- Documentation/driver-api/io-mapping.rst | 22 +--- include/linux/io-mapping.h | 42 +--- 2 files changed, 9

[Intel-gfx] [patch V3 31/37] drm/ttm: Replace kmap_atomic() usage

2020-11-03 Thread Thomas Gleixner
There is no reason to disable pagefaults and preemption as a side effect of kmap_atomic_prot(). Use kmap_local_page_prot() instead and document the reasoning for the mapping usage with the given pgprot. Remove the NULL pointer check for the map. These functions return a valid address for valid

[Intel-gfx] [patch V3 29/37] ARM: mm: Replace kmap_atomic_pfn()

2020-11-03 Thread Thomas Gleixner
There is no requirement to disable pagefaults and preemption for these cache management mappings. Replace kmap_atomic_pfn() with kmap_local_pfn(). This allows to remove kmap_atomic_pfn() in the next step. Signed-off-by: Thomas Gleixner Cc: Russell King Cc: linux-arm-ker...@lists.infradead.org

[Intel-gfx] [patch V3 32/37] drm/vmgfx: Replace kmap_atomic()

2020-11-03 Thread Thomas Gleixner
There is no reason to disable pagefaults and preemption as a side effect of kmap_atomic_prot(). Use kmap_local_page_prot() instead and document the reasoning for the mapping usage with the given pgprot. Remove the NULL pointer check for the map. These functions return a valid address for valid

[Intel-gfx] [patch V3 27/37] x86/crashdump/32: Simplify copy_oldmem_page()

2020-11-03 Thread Thomas Gleixner
Replace kmap_atomic_pfn() with kmap_local_pfn() which is preemptible and can take page faults. Remove the indirection of the dump page and the related cruft which is not longer required. Signed-off-by: Thomas Gleixner --- V3: New patch --- arch/x86/kernel/crash_dump_32.c | 48

[Intel-gfx] [patch V3 36/37] drm/i915: Replace io_mapping_map_atomic_wc()

2020-11-03 Thread Thomas Gleixner
None of these mapping requires the side effect of disabling pagefaults and preemption. Use io_mapping_map_local_wc() instead, and clean up gtt_user_read() and gtt_user_write() to use a plain copy_from_user() as the local maps are not disabling pagefaults. Signed-off-by: Thomas Gleixner Cc: Jani

[Intel-gfx] [patch V3 30/37] highmem: Remove kmap_atomic_pfn()

2020-11-03 Thread Thomas Gleixner
No more users. Signed-off-by: Thomas Gleixner --- V3: New patch --- include/linux/highmem-internal.h | 12 1 file changed, 12 deletions(-) --- a/include/linux/highmem-internal.h +++ b/include/linux/highmem-internal.h @@ -99,13 +99,6 @@ static inline void *kmap_atomic(struct p

[Intel-gfx] [patch V3 26/37] io-mapping: Provide iomap_local variant

2020-11-03 Thread Thomas Gleixner
Similar to kmap local provide a iomap local variant which only disables migration, but neither disables pagefaults nor preemption. Signed-off-by: Thomas Gleixner --- V3: Restrict migrate disable to the 32bit mapping case and update documentation. V2: Split out from the large combo patch and add

[Intel-gfx] [patch V3 33/37] highmem: Remove kmap_atomic_prot()

2020-11-03 Thread Thomas Gleixner
No more users. Signed-off-by: Thomas Gleixner --- V3: New patch --- include/linux/highmem-internal.h | 14 ++ 1 file changed, 2 insertions(+), 12 deletions(-) --- a/include/linux/highmem-internal.h +++ b/include/linux/highmem-internal.h @@ -87,16 +87,11 @@ static inline void

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