[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/gt: Remove GEN12_SFC_DONE_MAX from register defs header

2022-03-10 Thread Patchwork
== Series Details == Series: drm/i915/gt: Remove GEN12_SFC_DONE_MAX from register defs header URL : https://patchwork.freedesktop.org/series/101270/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH] drm/i915/gt: Remove GEN12_SFC_DONE_MAX from register defs header

2022-03-10 Thread Jani Nikula
On Thu, 10 Mar 2022, Matt Roper wrote: > We shouldn't really be keeping track of how many SFC_DONE registers > our platforms can have, but rather how many SFC hardware units there can > be (each SFC unit will have one corresponding SFC_DONE register). So > drop the stray GEN12_SFC_DONE_MAX

[Intel-gfx] ✓ Fi.CI.IGT: success for dyndbg add exclusive class support

2022-03-10 Thread Patchwork
== Series Details == Series: dyndbg add exclusive class support URL : https://patchwork.freedesktop.org/series/101265/ State : success == Summary == CI Bug Log - changes from CI_DRM_11350_full -> Patchwork_22537_full Summary ---

[Intel-gfx] [PATCH 2/4] drm/i915/display: s/intel_cdclk_can_squash/intel_cdclk_squash

2022-03-10 Thread Anusha Srivatsa
Apart from checking if squashing can be performed, accommodate accessing in-flight cdclk state for any changes that are needed during commit phase. Cc: Jani Nikula Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/display/intel_cdclk.c | 21 +++-- 1 file changed, 11

[Intel-gfx] [PATCH 3/4] drm/i915/display: s/intel_cdclk_can_crawl/intel_cdclk_crawl

2022-03-10 Thread Anusha Srivatsa
Apart from checking if crawling can be performed, accommodate accessing in-flight cdclk state for any changes that are needed during commit phase. Cc: Jani Nikula Signed-off-by: Anusha Srivatsa --- drivers/gpu/drm/i915/display/intel_cdclk.c | 22 +++--- 1 file changed, 11

[Intel-gfx] [PATCH 4/4] drm/i915/display: Add cdclk checks to atomic check

2022-03-10 Thread Anusha Srivatsa
Checking cdclk conditions during atomic check and preparing for commit phase so we can have atomic commit as simple as possible. Add the specific steps to be taken during cdclk changes, prepare for squashing, crawling and modeset scenarios. v2: Add intel_cdclk_modeset() similar to

[Intel-gfx] [PATCH 0/5] Add CDCLK checks to atomic check phase

2022-03-10 Thread Anusha Srivatsa
This version splits the original patch into simpler units. The intention is to check for squashing, crawling conditions at atomic check phase and prepare for commit phase. This basically means the in-flight cdclk state is available. intel_cdclk_can_squash(), intel_cdclk_can_crawl() and

[Intel-gfx] [PATCH 1/4] drm/i915/display: Add CDCLK actions to intel_cdclk_state

2022-03-10 Thread Anusha Srivatsa
This is a prep patch for what the rest of the series does. Add existing actions that change cdclk - squash, crawl, modeset to intel_cdclk_state so we have access to the cdclk values that are in transition. Cc: Jani Nikula Signed-off-by: Anusha Srivatsa ---

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/sseu: Don't overallocate subslice storage

2022-03-10 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/sseu: Don't overallocate subslice storage URL : https://patchwork.freedesktop.org/series/101268/ State : success == Summary == CI Bug Log - changes from CI_DRM_11350 -> Patchwork_22538

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] drm/i915/sseu: Don't overallocate subslice storage

2022-03-10 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/sseu: Don't overallocate subslice storage URL : https://patchwork.freedesktop.org/series/101268/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915/sseu: Don't overallocate subslice storage

2022-03-10 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/sseu: Don't overallocate subslice storage URL : https://patchwork.freedesktop.org/series/101268/ State : warning == Summary == $ dim checkpatch origin/drm-tip 5c1d208e40c1 drm/i915/sseu: Don't overallocate subslice storage

[Intel-gfx] [PATCH] drm/i915/gt: Remove GEN12_SFC_DONE_MAX from register defs header

2022-03-10 Thread Matt Roper
We shouldn't really be keeping track of how many SFC_DONE registers our platforms can have, but rather how many SFC hardware units there can be (each SFC unit will have one corresponding SFC_DONE register). So drop the stray GEN12_SFC_DONE_MAX definition we had in the register definition file and

[Intel-gfx] [PATCH 2/2] drm/i915/xehp: Update topology dumps for Xe_HP

2022-03-10 Thread Matt Roper
When running on Xe_HP or beyond, let's use an updated format for describing topology in our error state dumps and debugfs to give a more accurate view of the hardware: - Just report DSS directly without the legacy "slice0" output that's no longer meaningful. - Indicate whether each DSS is

[Intel-gfx] [PATCH 1/2] drm/i915/sseu: Don't overallocate subslice storage

2022-03-10 Thread Matt Roper
Xe_HP removed "slice" as a first-class unit in the hardware design. Instead we now have a single pool of subslices (which are now referred to as "DSS") that different hardware units have different ways of grouping ("compute slices," "geometry slices," etc.). For the purposes of topology

Re: [Intel-gfx] [PATCH v3 1/1] drm/i915/reset: Fix error_state_read ptr + offset use

2022-03-10 Thread Teres Alexis, Alan Previn
Folks, rev'd to version 4 but patchworks generated a new series: https://patchwork.freedesktop.org/series/101256/  (BAT passed and all). John, hoping for an RVB on that newer URL and your help to merge if its good. ...alan On 3/10/2022 4:31 PM, Alan Previn wrote: Fix our pointer offset

[Intel-gfx] ✓ Fi.CI.BAT: success for dyndbg add exclusive class support

2022-03-10 Thread Patchwork
== Series Details == Series: dyndbg add exclusive class support URL : https://patchwork.freedesktop.org/series/101265/ State : success == Summary == CI Bug Log - changes from CI_DRM_11350 -> Patchwork_22537 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH v7 13/13] drm/i915/guc: Print the GuC error capture output register list.

2022-03-10 Thread Umesh Nerlige Ramappa
On Sat, Feb 26, 2022 at 01:55:41AM -0800, Alan Previn wrote: Print the GuC captured error state register list (string names and values) when gpu_coredump_state printout is invoked via the i915 debugfs for flushing the gpu error-state that was captured prior. Since GuC could have reported

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for dyndbg add exclusive class support

2022-03-10 Thread Patchwork
== Series Details == Series: dyndbg add exclusive class support URL : https://patchwork.freedesktop.org/series/101265/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for dyndbg add exclusive class support

2022-03-10 Thread Patchwork
== Series Details == Series: dyndbg add exclusive class support URL : https://patchwork.freedesktop.org/series/101265/ State : warning == Summary == $ dim checkpatch origin/drm-tip 7362a1150693 dyndbg: fix static_branch manipulation 38c78ef4dda7 dyndbg: add class_id field and query support

Re: [Intel-gfx] [PATCH v2 1/1] drm/i915/reset: Fix error_state_read ptr + offset use

2022-03-10 Thread Teres Alexis, Alan Previn
i missed something in rev3, but rev4 ended up as a different series. Please review this new URL for this patch. Apologies for the confusion: https://patchwork.freedesktop.org/series/101256/ ...alan On 3/9/2022 5:45 PM, Teres Alexis, Alan Previn wrote: On 3/9/2022 5:18 PM, John Harrison

[Intel-gfx] [PATCH 2/5] dyndbg: add class_id field and query support

2022-03-10 Thread Jim Cromie
DRM defines/uses 10 enum drm_debug_category's to create exclusive classes of debug messages. To support this directly in dynamic-debug, add the following: - struct _ddebug.class_id:4 - 4 bits is enough - define _DPRINTK_SITE_UNCLASSED 15 - see below and the query support: - struct

[Intel-gfx] [PATCH 4/5] dyndbg: drop EXPORTed dynamic_debug_exec_queries

2022-03-10 Thread Jim Cromie
This exported fn is effectively obsoleted by Commit:HEAD~2, so remove it. Its intent was to allow drm.debug to use the exported function to implement its drm.debug bitmap api using dynamic_debug. Instead, HEAD~2 implements the bitmap inside dyndbg, using the internal fn that the export wraps.

[Intel-gfx] [PATCH 5/5] dyndbg: show both old and new in change-info

2022-03-10 Thread Jim Cromie
print old -> new flag values in the info("change") message. Signed-off-by: Jim Cromie --- lib/dynamic_debug.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/lib/dynamic_debug.c b/lib/dynamic_debug.c index b15a9c715e5b..cceac8ebbacd 100644 ---

[Intel-gfx] [PATCH 3/5] dyndbg: add DEFINE_DYNAMIC_DEBUG_CLASSBITS macro

2022-03-10 Thread Jim Cromie
DEFINE_DYNAMIC_DEBUG_CLASSBITS(fsname, var, bitmap_desc, classes..) allows users to create a drm.debug style (bitmap) sysfs interface, to control sets of pr_debug's according to their .class_id's This wraps existing "class" keyword and behavior: bash-5.1# echo < /proc/dynamic_debug/control

[Intel-gfx] [PATCH 1/5] dyndbg: fix static_branch manipulation

2022-03-10 Thread Jim Cromie
In https://lore.kernel.org/lkml/20211209150910.ga23...@axis.com/ Vincent's patch commented on, and worked around, a bug toggling static_branch's, when a 2nd PRINTK-ish flag was added. The bug results in a premature static_branch_disable when the 1st of 2 flags was disabled. The cited commit

[Intel-gfx] [PATCH 0/5] dyndbg add exclusive class support

2022-03-10 Thread Jim Cromie
Hi Greg, Jason, Please consider these for char/misc or linux-next/soon/mumble. This patchset adds exclusive class support to dyndbg, allowing it to directly represent drm's debug_category. It is the dyndbg half of: https://lore.kernel.org/lkml/20220217034829.64395-1-jim.cro...@gmail.com/ The

[Intel-gfx] ✓ Fi.CI.IGT: success for enhanced edid driver compatibility (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: enhanced edid driver compatibility (rev2) URL : https://patchwork.freedesktop.org/series/101241/ State : success == Summary == CI Bug Log - changes from CI_DRM_11349_full -> Patchwork_22536_full Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for Fix i915 error_state_read ptr use

2022-03-10 Thread Patchwork
== Series Details == Series: Fix i915 error_state_read ptr use URL : https://patchwork.freedesktop.org/series/101256/ State : success == Summary == CI Bug Log - changes from CI_DRM_11349_full -> Patchwork_22535_full Summary ---

[Intel-gfx] ✓ Fi.CI.IGT: success for Fix i915 error_state_read ptr use (rev3)

2022-03-10 Thread Patchwork
== Series Details == Series: Fix i915 error_state_read ptr use (rev3) URL : https://patchwork.freedesktop.org/series/100768/ State : success == Summary == CI Bug Log - changes from CI_DRM_11349_full -> Patchwork_22534_full Summary ---

[Intel-gfx] ✓ Fi.CI.BAT: success for enhanced edid driver compatibility (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: enhanced edid driver compatibility (rev2) URL : https://patchwork.freedesktop.org/series/101241/ State : success == Summary == CI Bug Log - changes from CI_DRM_11349 -> Patchwork_22536 Summary ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for enhanced edid driver compatibility (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: enhanced edid driver compatibility (rev2) URL : https://patchwork.freedesktop.org/series/101241/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for enhanced edid driver compatibility (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: enhanced edid driver compatibility (rev2) URL : https://patchwork.freedesktop.org/series/101241/ State : warning == Summary == $ dim checkpatch origin/drm-tip 02fc6192d066 drm/edid: seek for available CEA block from specific EDID block index 63da852d707f

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix i915 error_state_read ptr use

2022-03-10 Thread Patchwork
== Series Details == Series: Fix i915 error_state_read ptr use URL : https://patchwork.freedesktop.org/series/101256/ State : success == Summary == CI Bug Log - changes from CI_DRM_11349 -> Patchwork_22535 Summary --- **SUCCESS**

[Intel-gfx] ✓ Fi.CI.BAT: success for Fix i915 error_state_read ptr use (rev3)

2022-03-10 Thread Patchwork
== Series Details == Series: Fix i915 error_state_read ptr use (rev3) URL : https://patchwork.freedesktop.org/series/100768/ State : success == Summary == CI Bug Log - changes from CI_DRM_11349 -> Patchwork_22534 Summary ---

[Intel-gfx] [v6 2/5] drm/edid: parse multiple CEA extension block

2022-03-10 Thread Lee Shawn C
Try to find and parse more CEA ext blocks if edid->extensions is greater than one. v2: split prvious patch to two. And do CEA block parsing in this one. v3: simplify this patch based on previous change. v4: refine patch v3. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc:

[Intel-gfx] [v6 5/5] drm/edid: check for HF-SCDB block

2022-03-10 Thread Lee Shawn C
Find HF-SCDB information in CEA extensions block. And retrieve Max_TMDS_Character_Rate that support by sink device. v2: HF-SCDB and HF-VSDBS carry the same SCDS data. Reuse drm_parse_hdmi_forum_vsdb() to parse this packet. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx

[Intel-gfx] [v6 4/5] drm/edid: parse HF-EEODB CEA extension block

2022-03-10 Thread Lee Shawn C
While adding CEA modes, try to get available EEODB block number. Then based on it to parse numbers of ext blocks, retrieve CEA information and add more CEA modes. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C ---

[Intel-gfx] [v6 3/5] drm/edid: read HF-EEODB ext block

2022-03-10 Thread Lee Shawn C
According to HDMI 2.1 spec. "The HDMI Forum EDID Extension Override Data Block (HF-EEODB) is utilized by Sink Devices to provide an alternate method to indicate an EDID Extension Block count larger than 1, while avoiding the need to present a VESA Block Map in the first E-EDID Extension Block."

[Intel-gfx] [v6 1/5] drm/edid: seek for available CEA block from specific EDID block index

2022-03-10 Thread Lee Shawn C
drm_find_cea_extension() always look for a top level CEA block. Pass ext_index from caller then this function to search next available CEA ext block from a specific EDID block pointer. v2: save proper extension block index if CTA data information was found in DispalyID block. Cc: Jani Nikula

[Intel-gfx] [v6 0/5] enhanced edid driver compatibility

2022-03-10 Thread Lee Shawn C
Support to parse multiple CEA extension blocks and HF-EEODB to extend drm edid driver's capability. v4: add one more patch to support HF-SCDB v5: HF-SCDB and HF-VSDBS carry the same SCDS data. Reuse drm_parse_hdmi_forum_vsdb() to parse this packet. v6: save proper extension block index if CTA

[Intel-gfx] [PATCH v4 0/1] Fix i915 error_state_read ptr use

2022-03-10 Thread Alan Previn
Fix pointer offset usage in error_state_read when there is no i915_gpu_coredump but buf offset is non-zero. This is the 2nd rev of this series. Changes from prior revs: v4: - Mistake on v3, really added the missing fixme this time. v3: - Add a fixme comment about handling partial

[Intel-gfx] [PATCH v4 1/1] drm/i915/reset: Fix error_state_read ptr + offset use

2022-03-10 Thread Alan Previn
Fix our pointer offset usage in error_state_read when there is no i915_gpu_coredump but buf offset is non-zero. Fixes: 0e39037b3165 ("drm/i915: Cache the error string") This fixes a kernel page fault can happen when multiple tests are running concurrently in a loop and one is producing engine

[Intel-gfx] [PATCH v3 1/1] drm/i915/reset: Fix error_state_read ptr + offset use

2022-03-10 Thread Alan Previn
Fix our pointer offset usage in error_state_read when there is no i915_gpu_coredump but buf offset is non-zero. Fixes: 0e39037b3165 ("drm/i915: Cache the error string") This fixes a kernel page fault can happen when multiple tests are running concurrently in a loop and one is producing engine

[Intel-gfx] [PATCH v3 0/1] Fix i915 error_state_read ptr use

2022-03-10 Thread Alan Previn
Fix pointer offset usage in error_state_read when there is no i915_gpu_coredump but buf offset is non-zero. This is the 2nd rev of this series. Changes from prior revs: v3: - Add a fixme comment about handling partial inconsistent sysfs reads as per review comment from John Harrison.

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP

2022-03-10 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP URL : https://patchwork.freedesktop.org/series/101248/ State : success == Summary == CI Bug Log - changes from CI_DRM_11349_full -> Patchwork_22533_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for Some more bits for small BAR enabling (rev3)

2022-03-10 Thread Patchwork
== Series Details == Series: Some more bits for small BAR enabling (rev3) URL : https://patchwork.freedesktop.org/series/101052/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11349_full -> Patchwork_22532_full Summary

Re: [Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP

2022-03-10 Thread Ville Syrjälä
On Thu, Mar 10, 2022 at 12:05:17PM -0800, José Roberto de Souza wrote: > Commit 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel > powered off") completely broke short pulse handling for eDP as it is > usually generated by sink when it is displaying image and there is > some error or

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP

2022-03-10 Thread Patchwork
== Series Details == Series: series starting with [1/2] drm/i915/display: Fix HPD short pulse handling for eDP URL : https://patchwork.freedesktop.org/series/101248/ State : success == Summary == CI Bug Log - changes from CI_DRM_11349 -> Patchwork_22533

Re: [Intel-gfx] [PATCH v3 4/4] drm/i915: Improve long running OCL w/a for GuC submission

2022-03-10 Thread John Harrison
On 3/10/2022 01:27, Tvrtko Ursulin wrote: On 09/03/2022 21:16, John Harrison wrote: On 3/8/2022 01:41, Tvrtko Ursulin wrote: On 03/03/2022 22:37, john.c.harri...@intel.com wrote: From: John Harrison A workaround was added to the driver to allow OpenCL workloads to run 'forever' by disabling

[Intel-gfx] [PATCH 1/2] drm/i915/display: Fix HPD short pulse handling for eDP

2022-03-10 Thread José Roberto de Souza
Commit 13ea6db2cf24 ("drm/i915/edp: Ignore short pulse when panel powered off") completely broke short pulse handling for eDP as it is usually generated by sink when it is displaying image and there is some error or status that source needs to handle. When power panel is enabled, this state is

[Intel-gfx] [PATCH 2/2] drm/i915/display: Do not re-enable PSR after it was marked as not reliable

2022-03-10 Thread José Roberto de Souza
If a error happens and sink_not_reliable is set, PSR should be disabled for good but that is not happening. It would be disabled by the function handling the PSR error but then on the next fastset it would be enabled again in _intel_psr_post_plane_update(). It would only be disabled for good in

[Intel-gfx] [PULL] drm-misc-fixes

2022-03-10 Thread Thomas Zimmermann
Hi Dave and Daniel, here's the PR for drm-misc-fixes for this week. Best regards Thomas drm-misc-fixes-2022-03-10: * drm/sun4i: Fix P010 and P210 format numbers The following changes since commit 62929726ef0ec72cbbe9440c5d125d4278b99894: drm/vrr: Set VRR capable prop only if it is attached

Re: [Intel-gfx] [PATCH v10 4/5] mei: gsc: add runtime pm handlers

2022-03-10 Thread Rodrigo Vivi
On Tue, Mar 08, 2022 at 06:36:53PM +0200, Alexander Usyskin wrote: > From: Tomas Winkler > > Implement runtime handlers for mei-gsc, to track > idle state of the device properly. > > CC: Rodrigo Vivi > Signed-off-by: Tomas Winkler > Signed-off-by: Alexander Usyskin > --- >

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/gem: missing boundary check in vm_access leads to OOB read/write (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: drm/i915/gem: missing boundary check in vm_access leads to OOB read/write (rev2) URL : https://patchwork.freedesktop.org/series/100932/ State : success == Summary == CI Bug Log - changes from CI_DRM_11316_full -> Patchwork_22468_full

[Intel-gfx] ✗ Fi.CI.IGT: failure for enhanced edid driver compatibility

2022-03-10 Thread Patchwork
== Series Details == Series: enhanced edid driver compatibility URL : https://patchwork.freedesktop.org/series/101241/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11348_full -> Patchwork_22531_full Summary ---

Re: [Intel-gfx] [PATCH 09/13] drm/i915: Stash DRRS state under intel_crtc

2022-03-10 Thread Ville Syrjälä
On Thu, Mar 10, 2022 at 05:45:49PM +, Souza, Jose wrote: > On Thu, 2022-03-10 at 02:47 +0200, Ville Syrjala wrote: > > static void intel_drrs_frontbuffer_update(struct drm_i915_private > > *dev_priv, > > unsigned int frontbuffer_bits, > >

Re: [Intel-gfx] [PATCH 09/13] drm/i915: Stash DRRS state under intel_crtc

2022-03-10 Thread Souza, Jose
On Thu, 2022-03-10 at 02:47 +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Get rid of the ugly intel_dp dependency, and one more crtc->config > usage by storing the DRRS state under intel_crtc. intel_drrs_enable() > copies what it needs from the crtc state, after which DRRS can be >

[Intel-gfx] ✓ Fi.CI.BAT: success for Some more bits for small BAR enabling (rev3)

2022-03-10 Thread Patchwork
== Series Details == Series: Some more bits for small BAR enabling (rev3) URL : https://patchwork.freedesktop.org/series/101052/ State : success == Summary == CI Bug Log - changes from CI_DRM_11349 -> Patchwork_22532 Summary ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Some more bits for small BAR enabling (rev3)

2022-03-10 Thread Patchwork
== Series Details == Series: Some more bits for small BAR enabling (rev3) URL : https://patchwork.freedesktop.org/series/101052/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: missing boundary check in vm_access leads to OOB read/write (rev2)

2022-03-10 Thread Vudum, Lakshminarayana
From: Matthew Auld Sent: Thursday, March 10, 2022 1:21 AM To: Intel Graphics Development ; Vudum, Lakshminarayana Cc: Katragadda, MastanX Subject: Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: missing boundary check in vm_access leads to OOB read/write (rev2) On Thu, 3 Mar 2022 at

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/gem: missing boundary check in vm_access leads to OOB read/write (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: drm/i915/gem: missing boundary check in vm_access leads to OOB read/write (rev2) URL : https://patchwork.freedesktop.org/series/100932/ State : success == Summary == CI Bug Log - changes from CI_DRM_11316 -> Patchwork_22468

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/gem: missing boundary check in vm_access leads to OOB read/write (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: drm/i915/gem: missing boundary check in vm_access leads to OOB read/write (rev2) URL : https://patchwork.freedesktop.org/series/100932/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11316 -> Patchwork_22468

Re: [Intel-gfx] [PATCH] drm: remove min_order BUG_ON check

2022-03-10 Thread Matthew Auld
On 10/03/2022 14:47, Arunpravin wrote: On 08/03/22 10:31 pm, Matthew Auld wrote: On 08/03/2022 13:59, Arunpravin wrote: On 07/03/22 10:11 pm, Matthew Auld wrote: On 07/03/2022 14:37, Arunpravin wrote: place BUG_ON(order < min_order) outside do..while loop as it fails Unigine Heaven

[Intel-gfx] ✓ Fi.CI.BAT: success for enhanced edid driver compatibility

2022-03-10 Thread Patchwork
== Series Details == Series: enhanced edid driver compatibility URL : https://patchwork.freedesktop.org/series/101241/ State : success == Summary == CI Bug Log - changes from CI_DRM_11348 -> Patchwork_22531 Summary --- **SUCCESS**

Re: [Intel-gfx] [PATCH] drm/i915/display: Remove check for low voltage sku for max dp source rate

2022-03-10 Thread Imre Deak
On Tue, Oct 26, 2021 at 11:08:21AM +0530, Ankit Nautiyal wrote: > The low voltage sku check can be ignored as OEMs need to consider that > when designing the board and then put any limits in VBT. > > Same is now changed in Bspec pages. > > v2: Added debug print for combo PHY procmon reference

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for enhanced edid driver compatibility

2022-03-10 Thread Patchwork
== Series Details == Series: enhanced edid driver compatibility URL : https://patchwork.freedesktop.org/series/101241/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately. -

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for enhanced edid driver compatibility

2022-03-10 Thread Patchwork
== Series Details == Series: enhanced edid driver compatibility URL : https://patchwork.freedesktop.org/series/101241/ State : warning == Summary == $ dim checkpatch origin/drm-tip a6ac1723dd25 drm/edid: seek for available CEA block from specific EDID block index 426e5a856c6d drm/edid: parse

[Intel-gfx] [v5 5/5] drm/edid: check for HF-SCDB block

2022-03-10 Thread Lee Shawn C
Find HF-SCDB information in CEA extensions block. And retrieve Max_TMDS_Character_Rate that support by sink device. v2: HF-SCDB and HF-VSDBS carry the same SCDS data. Reuse drm_parse_hdmi_forum_vsdb() to parse this packet. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx

[Intel-gfx] [v5 4/5] drm/edid: parse HF-EEODB CEA extension block

2022-03-10 Thread Lee Shawn C
While adding CEA modes, try to get available EEODB block number. Then based on it to parse numbers of ext blocks, retrieve CEA information and add more CEA modes. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C ---

[Intel-gfx] [v5 3/5] drm/edid: read HF-EEODB ext block

2022-03-10 Thread Lee Shawn C
According to HDMI 2.1 spec. "The HDMI Forum EDID Extension Override Data Block (HF-EEODB) is utilized by Sink Devices to provide an alternate method to indicate an EDID Extension Block count larger than 1, while avoiding the need to present a VESA Block Map in the first E-EDID Extension Block."

[Intel-gfx] [v5 2/5] drm/edid: parse multiple CEA extension block

2022-03-10 Thread Lee Shawn C
Try to find and parse more CEA ext blocks if edid->extensions is greater than one. v2: split prvious patch to two. And do CEA block parsing in this one. v3: simplify this patch based on previous change. v4: refine patch v3. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc:

[Intel-gfx] [v5 1/5] drm/edid: seek for available CEA block from specific EDID block index

2022-03-10 Thread Lee Shawn C
drm_find_cea_extension() always look for a top level CEA block. Pass ext_index from caller then this function to search next available CEA ext block from a specific EDID block pointer. Cc: Jani Nikula Cc: Ville Syrjala Cc: Ankit Nautiyal Cc: intel-gfx Signed-off-by: Lee Shawn C ---

[Intel-gfx] [v5 0/5] enhanced edid driver compatibility

2022-03-10 Thread Lee Shawn C
Support to parse multiple CEA extension blocks and HF-EEODB to extend drm edid driver's capability. v4: add one more patch to support HF-SCDB v5: HF-SCDB and HF-VSDBS carry the same SCDS data. Reuse drm_parse_hdmi_forum_vsdb() to parse this packet. Lee Shawn C (5): drm/edid: seek for

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Add "maximum pipe read bandwidth" checks

2022-03-10 Thread Lisovskiy, Stanislav
On Thu, Mar 03, 2022 at 09:12:07PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä > > Make sure the CDCLK is high enough to support the so called > "maximum pipe read bandwidth" limitation. Specified as > 51.2 x CDCLK. Reviewed-by: Stanislav Lisovskiy > > Signed-off-by: Ville Syrjälä >

Re: [Intel-gfx] [PATCH v3] ALSA: hda/i915 - avoid hung task timeout in i915 wait

2022-03-10 Thread Takashi Iwai
On Wed, 09 Mar 2022 19:24:39 +0100, Kai Vehmanen wrote: > > If kernel is built with hung task detection enabled and > CONFIG_DEFAULT_HUNG_TASK_TIMEOUT set to less than 60 seconds, > snd_hdac_i915_init() will trigger the hung task timeout in case i915 is > not available and taint the kernel. > >

[Intel-gfx] ✗ Fi.CI.BAT: failure for Some more bits for small BAR enabling (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: Some more bits for small BAR enabling (rev2) URL : https://patchwork.freedesktop.org/series/101052/ State : failure == Summary == CI Bug Log - changes from CI_DRM_11348 -> Patchwork_22530 Summary ---

Re: [Intel-gfx] [PATCH v3] ALSA: hda/i915 - avoid hung task timeout in i915 wait

2022-03-10 Thread Tvrtko Ursulin
On 09/03/2022 18:24, Kai Vehmanen wrote: If kernel is built with hung task detection enabled and CONFIG_DEFAULT_HUNG_TASK_TIMEOUT set to less than 60 seconds, snd_hdac_i915_init() will trigger the hung task timeout in case i915 is not available and taint the kernel. Use

Re: [Intel-gfx] [PATCH v1] drm/i915: fix null pointer dereference

2022-03-10 Thread Łukasz Bartosik
> > On Wed, Feb 09, 2022 at 02:02:05AM +, Sripada, Radhakrishna wrote: > > > > > > > -Original Message- > > > From: Łukasz Bartosik > > > Sent: Tuesday, February 8, 2022 8:20 AM > > > To: Jani Nikula ; Joonas Lahtinen > > > ; Vivi, Rodrigo ; > > > Tvrtko Ursulin > > > Cc: Sripada,

Re: [Intel-gfx] [CI 1/2] drm/mm: Add an iterator to optimally walk over holes for an allocation (v5)

2022-03-10 Thread Tvrtko Ursulin
On 05/03/2022 23:36, Vivek Kasireddy wrote: This iterator relies on drm_mm_first_hole() and drm_mm_next_hole() functions to identify suitable holes for an allocation of a given size by efficiently traversing the rbtree associated with the given allocator. It replaces the for loop in

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Some more bits for small BAR enabling (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: Some more bits for small BAR enabling (rev2) URL : https://patchwork.freedesktop.org/series/101052/ State : warning == Summary == $ dim sparse --fast origin/drm-tip Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v2 8/9] drm/i915: Fix DBUF bandwidth vs. cdclk handling

2022-03-10 Thread Lisovskiy, Stanislav
On Thu, Mar 10, 2022 at 10:59:16AM +0200, Ville Syrjälä wrote: > On Thu, Mar 10, 2022 at 10:22:56AM +0200, Lisovskiy, Stanislav wrote: > > On Thu, Mar 03, 2022 at 09:12:06PM +0200, Ville Syrjala wrote: > > > From: Ville Syrjälä > > > > > > Make the dbuf bandwidth min cdclk calculations match the

[Intel-gfx] [PATCH v2 6/8] drm/i915/display: Check mappable aperture when pinning preallocated vma

2022-03-10 Thread Matthew Auld
From: CQ Tang When system does not have mappable aperture, ggtt->mappable_end=0. In this case if we pass PIN_MAPPABLE when pinning vma, the pinning code will return -ENOSPC. So conditionally set PIN_MAPPABLE if HAS_GMCH(). Suggested-by: Chris P Wilson Signed-off-by: CQ Tang Cc: Radhakrishna

[Intel-gfx] [PATCH v2 7/8] drm/i915: fixup the initial fb base on DG1

2022-03-10 Thread Matthew Auld
The offset we get looks to be the exact start of DSM, but the inital_plane_vma expects the address to be relative. v2(Ville): - The base is actually the pre-programmed GGTT address, which is then meant to 1:1 map to somewhere inside dsm. In the case of dgpu the base looks to just be

[Intel-gfx] [PATCH v2 8/8] drm/i915: fixup the initial fb on DG2

2022-03-10 Thread Matthew Auld
On DG2+ the initial fb shouldn't be placed anywhere close to DSM, and so should just be allocated directly from LMEM. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- .../drm/i915/display/intel_plane_initial.c| 46 +++ 1 file changed, 27 insertions(+), 19 deletions(-)

[Intel-gfx] [PATCH v2 5/8] drm/i915/ttm: wire up the object offset

2022-03-10 Thread Matthew Auld
For the ttm backend we can use existing placements fpfn and lpfn to force the allocator to place the object at the requested offset, potentially evicting stuff if the spot is currently occupied. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- .../gpu/drm/i915/gem/i915_gem_object_types.h

[Intel-gfx] [PATCH v2 4/8] drm/i915: add i915_gem_object_create_region_at()

2022-03-10 Thread Matthew Auld
Add a generic interface for allocating an object at some specific offset, and convert stolen over. Later we will want to hook this up to different backends. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- .../drm/i915/display/intel_plane_initial.c| 4 +-

[Intel-gfx] [PATCH v2 3/8] drm/i915/stolen: consider I915_BO_ALLOC_GPU_ONLY

2022-03-10 Thread Matthew Auld
Keep the behaviour consistent with normal lmem, where we assume CPU access if by default required. Signed-off-by: Matthew Auld Cc: Thomas Hellström --- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 8 1 file changed, 8 insertions(+) diff --git

[Intel-gfx] [PATCH v2 2/8] drm/i915/stolen: don't treat small BAR as an error

2022-03-10 Thread Matthew Auld
From: Akeem G Abodunrin On client platforms with reduced LMEM BAR, we should be able to continue with driver load with reduced io_size. Instead of using the BAR size to determine the how large stolen should be, we should instead use the ADDR_RANGE register to figure this out(at least on

[Intel-gfx] [PATCH v2 1/8] drm/i915/lmem: don't treat small BAR as an error

2022-03-10 Thread Matthew Auld
Just pass along the probed io_size. The backend should be able to utilize the entire range here, even if some of it is non-mappable. It does leave open with what to do with stolen local-memory. Signed-off-by: Matthew Auld Cc: Thomas Hellström Reviewed-by: Thomas Hellström ---

[Intel-gfx] [PATCH v2 0/8] Some more bits for small BAR enabling

2022-03-10 Thread Matthew Auld
The leftover bits around dealing with stolen-local memory + small BAR, plus some related fixes. v2: some tweaks based on feedback from Ville -- 2.34.1

Re: [Intel-gfx] [PATCH] drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES

2022-03-10 Thread Tvrtko Ursulin
On 10/03/2022 05:18, Matt Atwood wrote: Newer platforms have DSS that aren't necessarily available for both geometry and compute, two queries will need to exist. This introduces the first, when passing a valid engine class and engine instance in the flags returns a topology describing

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev2)

2022-03-10 Thread Patchwork
== Series Details == Series: drm/i915/uapi: Add DRM_I915_QUERY_GEOMETRY_SUBSLICES (rev2) URL : https://patchwork.freedesktop.org/series/101219/ State : success == Summary == CI Bug Log - changes from CI_DRM_11347_full -> Patchwork_22529_full

Re: [Intel-gfx] [PATCH 13/13] drm/i915: Implement static DRRS

2022-03-10 Thread Jani Nikula
On Thu, 10 Mar 2022, Ville Syrjälä wrote: > On Thu, Mar 10, 2022 at 12:30:06PM +0200, Jani Nikula wrote: >> On Thu, 10 Mar 2022, Ville Syrjala wrote: >> > From: Ville Syrjälä >> > >> > Let's start supporting static DRRS by trying to match the refresh >> > rate the user has requested, assuming

Re: [Intel-gfx] [PATCH 09/13] drm/i915: Stash DRRS state under intel_crtc

2022-03-10 Thread Ville Syrjälä
On Thu, Mar 10, 2022 at 12:53:58PM +0200, Jani Nikula wrote: > On Thu, 10 Mar 2022, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Get rid of the ugly intel_dp dependency, and one more crtc->config > > usage by storing the DRRS state under intel_crtc. intel_drrs_enable() > > copies what it

Re: [Intel-gfx] [PATCH 13/13] drm/i915: Implement static DRRS

2022-03-10 Thread Ville Syrjälä
On Thu, Mar 10, 2022 at 12:30:06PM +0200, Jani Nikula wrote: > On Thu, 10 Mar 2022, Ville Syrjala wrote: > > From: Ville Syrjälä > > > > Let's start supporting static DRRS by trying to match the refresh > > rate the user has requested, assuming the panel supports suitable > > timings. > > > >

Re: [Intel-gfx] [PATCH 09/13] drm/i915: Stash DRRS state under intel_crtc

2022-03-10 Thread Jani Nikula
On Thu, 10 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Get rid of the ugly intel_dp dependency, and one more crtc->config > usage by storing the DRRS state under intel_crtc. intel_drrs_enable() > copies what it needs from the crtc state, after which DRRS can be > blissfully ignorant

[Intel-gfx] [PULL] drm-intel-fixes

2022-03-10 Thread Tvrtko Ursulin
Hi Dave, Daniel, One PSR2 fix for the next release candidate, if there will be one. Regards, Tvrtko drm-intel-fixes-2022-03-10: - Fix PSR2 when selective fetch is enabled and cursor at (-1, -1) (Jouni Högander) The following changes since commit ffb217a13a2eaf6d5bd974fc83036a53ca69f1e2:

Re: [Intel-gfx] [PATCH 13/13] drm/i915: Implement static DRRS

2022-03-10 Thread Jani Nikula
On Thu, 10 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Let's start supporting static DRRS by trying to match the refresh > rate the user has requested, assuming the panel supports suitable > timings. > > For now we stick to just our current two timings: > - fixed_mode: the panel's

Re: [Intel-gfx] [PATCH 12/13] drm/i915: Introduce intel_panel_{fixed, downclock}_mode()

2022-03-10 Thread Jani Nikula
On Thu, 10 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Absract away the details on where we store the fixed/downclock modes, > and also how we select them. Will be useful for static DRRS (aka. > allowing the user to select the refresh rate for the panel). > > Only hooked these up

Re: [Intel-gfx] [PATCH 11/13] drm/i915: Enable eDP DRRS on ilk/snb port A

2022-03-10 Thread Jani Nikula
On Thu, 10 Mar 2022, Ville Syrjala wrote: > From: Ville Syrjälä > > Nothing special about ivb+ here, if DRRS works on ivb+ port A > it should work just as well on ilk/snb. So let's enable > that. > > Signed-off-by: Ville Syrjälä Reviewed-by: Jani Nikula > --- >

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