== Series Details ==
Series: drm/i915: Fix workarounds on Gen2-3
URL : https://patchwork.freedesktop.org/series/111067/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12398_full -> Patchwork_111067v1_full
Summary
---
On 19-11-2022 00:07, Vivi, Rodrigo wrote:
On Sat, 2022-11-19 at 00:03 +0530, Badal Nilawar wrote:
From: Vinay Belgaumkar
By defaut idle messaging is disabled for GSC CS so to unblock RC6
entry on media tile idle messaging need to be enabled.
v2:
- Fix review comments (Vinay)
- Set GSC
== Series Details ==
Series: drm/i915/dvo: DVO init fixes/cleanps
URL : https://patchwork.freedesktop.org/series/111066/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12398_full -> Patchwork_111066v1_full
Summary
---
== Series Details ==
Series: drm/i915: Fix timeout handling when retiring requests (rev2)
URL : https://patchwork.freedesktop.org/series/110964/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12398_full -> Patchwork_110964v2_full
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Add missing checks for
cdclk crawling (rev2)
URL : https://patchwork.freedesktop.org/series/111045/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12403 -> Patchwork_111045v2
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Add missing checks for
cdclk crawling (rev2)
URL : https://patchwork.freedesktop.org/series/111045/
State : warning
== Summary ==
Error: make htmldocs had i915 warnings
./drivers/gpu/drm/i915/gt/intel_gt_mcr.c:739:
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Add missing checks for
cdclk crawling (rev2)
URL : https://patchwork.freedesktop.org/series/111045/
State : warning
== Summary ==
Error: dim checkpatch failed
2934471a6919 drm/i915/display: Add missing checks for cdclk
== Series Details ==
Series: drm/i915/display: Add missing CDCLK Squash support for MTL
URL : https://patchwork.freedesktop.org/series/111087/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12403 -> Patchwork_111087v1
On Thu, Oct 27, 2022 at 03:13:15PM -0700, Taylor, Clinton A wrote:
> Replace internal with discrete of dgfx platforms.
I think you meant 'integrated' rather than 'internal' here?
Is there any value in trying to give a rough family name in the product
description for discrete platforms? E.g.,
On Sat, 2022-11-12 at 23:57 -0800, Niranjana Vishwanathapura wrote:
> DRM_I915_GEM_VM_BIND/UNBIND ioctls allows UMD to bind/unbind GEM
> buffer objects (BOs) or sections of a BOs at specified GPU virtual
> addresses on a specified address space (VM). Multiple mappings can map
> to the same
On Tue, Nov 15, 2022 at 08:34:54PM +0530, Aravind Iddamsetty wrote:
> On XE_LPM+ platforms the media engines are carved out into a separate
> GT but have a common GGTMMADR address range which essentially makes
> the GGTT address space to be shared between media and render GT. As a
> result any
== Series Details ==
Series: drm/i915: Remove non-existent pipes from bigjoiner pipe mask
URL : https://patchwork.freedesktop.org/series/111086/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12402 -> Patchwork_111086v1
On Fri, Nov 18, 2022 at 01:20:45PM -0800, Lucas De Marchi wrote:
> On Thu, Nov 17, 2022 at 09:33:58AM -0800, Matt Roper wrote:
> > The GT MCR code currently relies on uncore->lock to avoid race
> > conditions on the steering control register during MCR operations. The
> > *_fw() versions of MCR
On Fri, 18 Nov 2022 10:37:37 -0800, Vivi, Rodrigo wrote:
>
> On Sat, 2022-11-19 at 00:03 +0530, Badal Nilawar wrote:
> > From: Vinay Belgaumkar
> >
> > By defaut idle messaging is disabled for GSC CS so to unblock RC6
> > entry on media tile idle messaging need to be enabled.
> >
> > v2:
> > -
Hi Dave and Daniel,
Here goes the final pull request from drm-intel-next targeting 6.2.
Manly more display clean-ups and the removal of the force_probe
protection on DG2.
drm-intel-next-2022-11-18:
GVT Changes:
- gvt-next stuff mostly with refactor for the new MDEV interface.
i915 Changes:
-
On Thu, Nov 17, 2022 at 09:33:58AM -0800, Matt Roper wrote:
The GT MCR code currently relies on uncore->lock to avoid race
conditions on the steering control register during MCR operations. The
*_fw() versions of MCR operations expect the caller to already hold
uncore->lock, while the non-fw
== Series Details ==
Series: drm/i915/mtl: Enable Idle Messaging for GSC CS (rev2)
URL : https://patchwork.freedesktop.org/series/111011/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12401 -> Patchwork_111011v2
Summary
On Fri, Nov 18, 2022 at 09:19:45AM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/gt: Manage uncore->lock while waiting on MCR register
> URL : https://patchwork.freedesktop.org/series/111033/
> State : failure
>
> == Summary ==
>
> CI Bug Log - changes from
On Tue, Nov 08, 2022 at 04:13:28PM -0800, Matt Roper wrote:
> DG2 has been very usable for a while now, and all of the uapi changes
> related to fundamental platform usage have been finalized. Recent CI
> results have also been healthy, so we're ready to drop the force_probe
> requirement and
On 09/11/2022 00:13, Matt Roper wrote:
DG2 has been very usable for a while now, and all of the uapi changes
related to fundamental platform usage have been finalized. Recent CI
results have also been healthy, so we're ready to drop the force_probe
requirement and enable the platform by
On Fri, Nov 18, 2022 at 11:52:49AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> In 3653727560d0 ("drm/i915: Simplify internal helper function signature")
> I broke the old platforms by not noticing engine workaround init does not
> initialize the list on old platforms. Fix it by
On 11/18/2022 11:42 AM, Janusz Krzysztofik wrote:
Users of intel_gt_retire_requests_timeout() expect 0 return value on
success. However, we have no protection from passing back 0 potentially
returned by a call to dma_fence_wait_timeout() when it succedes right
after its timeout has expired.
On Fri, Nov 18, 2022 at 11:00:08AM -0800, Anusha Srivatsa wrote:
MTL supports both squash and crawl.
Cc: Clint Taylor
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c
== Series Details ==
Series: Add module oriented dmesg output
URL : https://patchwork.freedesktop.org/series/111050/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12397_full -> Patchwork_111050v1_full
Summary
---
MTL supports both squash and crawl.
Cc: Clint Taylor
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/i915_pci.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/i915_pci.c b/drivers/gpu/drm/i915/i915_pci.c
index cf3b28d71d2b..d82f118809e9
From: Ville Syrjälä
bigjoiner_pipes() doesn't consider that:
- RKL only has three pipes
- some pipes may be fused off
This means that intel_atomic_check_bigjoiner() won't reject
all configurations that would need a non-existent pipe.
Instead we just keep on rolling witout actually having
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Monday, November 14, 2022 9:08 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 20/20] drm/i915: Do state check for color
> management changes
>
> From: Ville Syrjälä
>
> In order to
On Sat, 2022-11-19 at 00:03 +0530, Badal Nilawar wrote:
> From: Vinay Belgaumkar
>
> By defaut idle messaging is disabled for GSC CS so to unblock RC6
> entry on media tile idle messaging need to be enabled.
>
> v2:
> - Fix review comments (Vinay)
> - Set GSC idle hysteresis as per spec
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Monday, November 14, 2022 9:08 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 18/20] drm/i915: Use gamma LUT for RGB limited
> range compression
>
> From: Ville Syrjälä
>
> On ilk+
From: Vinay Belgaumkar
By defaut idle messaging is disabled for GSC CS so to unblock RC6
entry on media tile idle messaging need to be enabled.
v2:
- Fix review comments (Vinay)
- Set GSC idle hysteresis as per spec (Badal)
v3:
- Fix review comments (Rodrigo)
Bspec: 71496
Cc: Daniele
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Monday, November 14, 2022 9:07 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 17/20] drm/i915: Use hw degamma LUT for sw
> gamma on glk with YCbCr output
>
> From: Ville Syrjälä
>
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Monday, November 14, 2022 9:07 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 16/20] drm/i915: Rework legacy LUT handling
>
> From: Ville Syrjälä
>
> Currently
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Monday, November 14, 2022 9:07 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 15/20] drm/i915: Finish the LUT state checker
>
> From: Ville Syrjälä
>
> We have full readout now for
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Monday, November 14, 2022 9:07 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 14/20] drm/i915: Make .read_luts() mandatory
>
> From: Ville Syrjälä
>
> Every platform now implemnts
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Monday, November 14, 2022 9:07 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 13/20] drm/i915: Prep for C8 palette readout
>
> From: Ville Syrjälä
>
> Add the approproate c8_planes
On Fri, Nov 18, 2022 at 11:52:49AM +, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> In 3653727560d0 ("drm/i915: Simplify internal helper function signature")
> I broke the old platforms by not noticing engine workaround init does not
> initialize the list on old platforms. Fix it by
== Series Details ==
Series: series starting with [1/3] drm/i915/display: Add missing checks for
cdclk crawling
URL : https://patchwork.freedesktop.org/series/111045/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12396_full -> Patchwork_111045v1_full
Hello!
This is an experimental semi-automated report about issues detected by
Coverity from a scan of next-20221118 as part of the linux-next scan project:
https://scan.coverity.com/projects/linux-next-weekly-scan
You're getting this email because you were associated with the identified
lines
On Fri, Nov 18, 2022 at 02:34:42PM +, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/rpl-p: Add stepping info
> URL : https://patchwork.freedesktop.org/series/111041/
> State : success
>
> == Summary ==
>
> CI Bug Log - changes from CI_DRM_12396_full ->
With parallel submission it should be easy to get a fence array as the
output fence. Try importing this into dma-buf reservation object, to see
if anything explodes.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/7532
Signed-off-by: Matthew Auld
Cc: Andrzej Hajda
Cc: Nirmoy Das
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/dg2: Introduce Wa_18018764978
URL : https://patchwork.freedesktop.org/series/111042/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12396_full -> Patchwork_111042v1_full
Hi,
I'm getting this on latest Linus master with gcc (SUSE Linux) 7.5.0:
DESCEND objtool
CALLscripts/checksyscalls.sh
CC [M] drivers/gpu/drm/i915/gt/uc/intel_guc_submission.o
In file included from :0:0:
In function ‘__guc_context_policy_add_priority.isra.45’,
inlined from
>
>
> On 11/3/2022 3:41 AM, Winkler, Tomas wrote:
> >> Starting on MTL, the GSC FW is loaded at runtime and will be managed
> >> directly by i915. This means we now have a naming clash around the
> >> GSC, as we have 2 different aspects of it that we need to handle: the
> >> HECI interfaces we
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/migrate: Account for the
reserved_space
URL : https://patchwork.freedesktop.org/series/111076/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12398 -> Patchwork_111076v1
On Fri, Nov 18, 2022 at 09:32:37AM -0500, Rodrigo Vivi wrote:
> On Fri, Nov 18, 2022 at 09:35:41AM +0530, Nilawar, Badal wrote:
> >
> >
> > On 18-11-2022 03:44, Rodrigo Vivi wrote:
> > > On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote:
> > > > From: Vinay Belgaumkar
> > > >
> > >
On Thu, Nov 17, 2022 at 02:24:47PM -0800, Matt Atwood wrote:
> Wa_18019271663 applies to all DG2 steppings and skus.
>
> Bspec: 66622
>
> Signed-off-by: Matt Atwood
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 7 ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 +++
> 2 files
== Series Details ==
Series: drm/i915/rpl-p: Add stepping info
URL : https://patchwork.freedesktop.org/series/111041/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12396_full -> Patchwork_111041v1_full
Summary
---
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/migrate: Account for the
reserved_space
URL : https://patchwork.freedesktop.org/series/111076/
State : warning
== Summary ==
Error: dim checkpatch failed
4cce983fec4a drm/i915/migrate: Account for the reserved_space
-:33:
On Fri, Nov 18, 2022 at 09:35:41AM +0530, Nilawar, Badal wrote:
>
>
> On 18-11-2022 03:44, Rodrigo Vivi wrote:
> > On Tue, Nov 15, 2022 at 07:14:40PM +0530, Badal Nilawar wrote:
> > > From: Vinay Belgaumkar
> > >
> > > By defaut idle mesaging is disabled for GSC CS so to unblock RC6
> > >
On Thu, Nov 17, 2022 at 02:24:46PM -0800, Matt Atwood wrote:
> Wa_18018764978 applies to specific steppings of DG2 (G10 C0+,
> G11 and G12 A0+).
>
> Bspec: 66622
>
> Signed-off-by: Matt Atwood
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +++
>
== Series Details ==
Series: drm/i915: Fix timeout handling when retiring requests (rev2)
URL : https://patchwork.freedesktop.org/series/110964/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12398 -> Patchwork_110964v2
On 11/18/2022 1:48 PM, Matthew Auld wrote:
From: Chris Wilson
If the ring is nearly full when calling into emit_pte(), we might
incorrectly trample the reserved_space when constructing the packet to
emit the PTEs. This then triggers the GEM_BUG_ON(rq->reserved_space >
ring->space) when later
Simple regression test to check that we don't trample the
rq->reserved_space when returning from emit_pte(), if the ring is nearly
full.
v2: make spinner_kill() static
References: https://gitlab.freedesktop.org/drm/intel/-/issues/7535
References:
From: Chris Wilson
If the ring is nearly full when calling into emit_pte(), we might
incorrectly trample the reserved_space when constructing the packet to
emit the PTEs. This then triggers the GEM_BUG_ON(rq->reserved_space >
ring->space) when later submitting the request, since the request
== Series Details ==
Series: series starting with [v2,1/2] drm/i915/mtl: Fix dram info readout
URL : https://patchwork.freedesktop.org/series/111039/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12396_full -> Patchwork_111039v1_full
== Series Details ==
Series: series starting with [1/2] drm/i915/migrate: Account for the
reserved_space
URL : https://patchwork.freedesktop.org/series/111072/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
CC [M]
From: Chris Wilson
If the ring is nearly full when calling into emit_pte(), we might
incorrectly trample the reserved_space when constructing the packet to
emit the PTEs. This then triggers the GEM_BUG_ON(rq->reserved_space >
ring->space) when later submitting the request, since the request
Simple regression test to check that we don't trample the
rq->reserved_space when returning from emit_pte(), if the ring is nearly
full.
References: https://gitlab.freedesktop.org/drm/intel/-/issues/7535
References: https://gitlab.freedesktop.org/drm/intel/-/issues/6889
Signed-off-by: Matthew
== Series Details ==
Series: drm/i915: Fix workarounds on Gen2-3
URL : https://patchwork.freedesktop.org/series/111067/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12398 -> Patchwork_111067v1
Summary
---
== Series Details ==
Series: series starting with [1/2] drm/i915/mtl: limit second scaler vertical
scaling in ver >= 14
URL : https://patchwork.freedesktop.org/series/111069/
State : failure
== Summary ==
Error: make failed
CALLscripts/checksyscalls.sh
DESCEND objtool
CC [M]
== Series Details ==
Series: Fix live busy stats selftest failure (rev3)
URL : https://patchwork.freedesktop.org/series/110557/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12396_full -> Patchwork_110557v3_full
Summary
== Series Details ==
Series: drm/i915: Fix workarounds on Gen2-3
URL : https://patchwork.freedesktop.org/series/111067/
State : warning
== Summary ==
Error: dim checkpatch failed
dc0ad34ead34 drm/i915: Fix workarounds on Gen2-3
-:9: ERROR:GIT_COMMIT_ID: Please use git commit description style
== Series Details ==
Series: drm/i915/dvo: DVO init fixes/cleanps
URL : https://patchwork.freedesktop.org/series/111066/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_12398 -> Patchwork_111066v1
Summary
---
From: Animesh Manna
As part of die area reduction max input source modified to 4096
for MTL so modified range check logic of scaler.
Signed-off-by: José Roberto de Souza
Signed-off-by: Animesh Manna
Reviewed-by: Manasi Navare
---
drivers/gpu/drm/i915/display/skl_scaler.c | 31
In newer hardware versions (i.e. display version >= 14), the second
scaler doesn't support vertical scaling.
The current implementation of the scaling limits is simplified and
only occurs when the planes are created, so we don't know which scaler
is being used.
In order to handle separate
From: Tvrtko Ursulin
In 3653727560d0 ("drm/i915: Simplify internal helper function signature")
I broke the old platforms by not noticing engine workaround init does not
initialize the list on old platforms. Fix it by always initializing which
already does the right thing by mostly not doing
On Wed, 16 Nov 2022, Khaled Almahallawy wrote:
> Bspecs has updated recently to remove the restriction to disable
> DDI/Transcoder before setting PHY test pattern. This update is to
> address PHY compliance test failures observed on a port with LTTPR.
> The issue is that when Transc. is disabled,
== Series Details ==
Series: drm/i915/dvo: DVO init fixes/cleanps
URL : https://patchwork.freedesktop.org/series/111066/
State : warning
== Summary ==
Error: dim checkpatch failed
31ec571cb014 drm/i915/dvo: Remove unused panel_wants_dither
c9da1e495ad7 drm/i915/dvo: Don't leak connector state
On Fri, 18 Nov 2022, Ville Syrjala wrote:
> From: Ville Syrjälä
>
> The DVO encoder init code is meesy. Try to clean it
> up a bit, and fix a few buglets while at it.
On the series,
Reviewed-by: Jani Nikula
>
> Ville Syrjälä (9):
> drm/i915/dvo: Remove unused panel_wants_dither
>
== Series Details ==
Series: drm/i915: Fix timeout handling when retiring requests (rev2)
URL : https://patchwork.freedesktop.org/series/110964/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12398 -> Patchwork_110964v2
From: Ville Syrjälä
The loop over intel_dvo_devices[] makes intel_dvo_init()
an ugly mess. Pull the i2c device probe out to a separate
function so that we can get rid of the loop and flatten
the code.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dvo.c | 229
From: Ville Syrjälä
Introduce intel_dvo_connector_type() as a counterpart to
intel_dvo_encoder_type(), mainly to declutter intel_dvo_init()
a bit.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dvo.c | 32 ++--
1 file changed, 19 insertions(+), 13
From: Ville Syrjälä
Reorder the drm_encoder_init() vs. encoder->port
assignment so that we don't need the extra 'port'
variable.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dvo.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git
From: Ville Syrjälä
We call drm_encoder_init() before determining the correct
encoder type, thus we always end up with DRM_MODE_ENCODER_NONE.
Determine the correct encoder type earlier.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dvo.c | 20
1 file
From: Ville Syrjälä
Follow the modern style and rename most 'dev_priv' variables
to 'i915'.
intel_dvo_init_dev() is the sole exception since it needs the
magic 'dev_priv' variable for the DPLL register macros.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dvo.c | 53
From: Ville Syrjälä
Convert the lonely DRM_DEBUG_KMS() to the per-device variant.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dvo.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dvo.c
From: Ville Syrjälä
Remove the pointless intel_ namespace from our encoder/connector
variables.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dvo.c | 91
1 file changed, 45 insertions(+), 46 deletions(-)
diff --git
From: Ville Syrjälä
If we can't initialize the DVO encoder also free the connector
state allocated by intel_connector_alloc().
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dvo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
From: Ville Syrjälä
intel_dvo.panel_wants_dither is only set but never used.
We can't do dithering on the gmch side anyway since the
dithering logic is part of the integrated LVDS port and
not available for other output types.
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
The DVO encoder init code is meesy. Try to clean it
up a bit, and fix a few buglets while at it.
Ville Syrjälä (9):
drm/i915/dvo: Remove unused panel_wants_dither
drm/i915/dvo: Don't leak connector state on DVO init failure
drm/i915/dvo: Actually initialize the DVO
On Thu, 17 Nov 2022, john.c.harri...@intel.com wrote:
> From: John Harrison
>
> When trying to analyse bug reports from CI, customers, etc. it can be
> difficult to work out exactly what is happening on which GT in a
> multi-GT system. So add GT oriented debug/error message wrappers. If
> used
Users of intel_gt_retire_requests_timeout() expect 0 return value on
success. However, we have no protection from passing back 0 potentially
returned by a call to dma_fence_wait_timeout() when it succedes right
after its timeout has expired.
Replace 0 with -ETIME before potentially using the
Commit b97060a99b01 ("drm/i915/guc: Update intel_gt_wait_for_idle to work
with GuC") extended the API of intel_gt_retire_requests_timeout() with an
extra argument 'remaining_timeout', intended for passing back unconsumed
portion of requested timeout when 0 (success) is returned. However, when
Fixes for issues discovered via code review while working on
https://gitlab.freedesktop.org/drm/intel/issues/7349.
v2:
PATCH 1: fix the issue on the caller side, not the provider,
reword commit message and description.
PATCH 2: move the added lines down so flush_submission() is not
== Series Details ==
Series: drm/i915/mtl: Skip doubling channel numbers for LPDDR4/LPDDDR5
URL : https://patchwork.freedesktop.org/series/111036/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12396_full -> Patchwork_111036v1_full
On Thu, Nov 17, 2022 at 05:01:08PM -0700, Nathan Chancellor wrote:
> On Fri, Nov 18, 2022 at 09:06:36AM +1100, Stephen Rothwell wrote:
> > Hi Nathan,
> >
> > On Thu, 17 Nov 2022 10:29:33 -0700 Nathan Chancellor
> > wrote:
> > >
> > > This resolution is not quite right, as pointed out by clang:
== Series Details ==
Series: drm/i915/gt: Manage uncore->lock while waiting on MCR register
URL : https://patchwork.freedesktop.org/series/111033/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_12396_full -> Patchwork_111033v1_full
Hi Dave & Daniel,
Here goes the last drm-intel-gt-next feature pull req for v6.2.
We have a couple of important fixes around memory management (TTM
and userptr), then demoting GuC kernel contexts to normal priority and
Meteorlake enabling.
Beyond that it's smaller fixes to code structure and
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Monday, November 14, 2022 9:07 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 07/20] drm/i915: s/gamma/post_csc_lut/
>
> From: Ville Syrjälä
>
> Rename a the LUT state check
> -Original Message-
> From: Intel-gfx On Behalf Of Ville
> Syrjala
> Sent: Monday, November 14, 2022 9:07 PM
> To: intel-gfx@lists.freedesktop.org
> Subject: [Intel-gfx] [PATCH v3 06/20] drm/i915: Fix adl+ degamma LUT size
>
> From: Ville Syrjälä
>
> The degamma LUT is interpolated
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