[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [CI,1/2] drm/i915: limit double GT reset to pre-MTL

2023-03-23 Thread Patchwork
== Series Details == Series: series starting with [CI,1/2] drm/i915: limit double GT reset to pre-MTL URL : https://patchwork.freedesktop.org/series/115572/ State : success == Summary == CI Bug Log - changes from CI_DRM_12907 -> Patchwork_115572v1

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/pxp: limit drm-errors or warning on firmware API failures (rev4)

2023-03-23 Thread Patchwork
== Series Details == Series: drm/i915/pxp: limit drm-errors or warning on firmware API failures (rev4) URL : https://patchwork.freedesktop.org/series/113680/ State : success == Summary == CI Bug Log - changes from CI_DRM_12905_full -> Patchwork_113680v4_full

Re: [Intel-gfx] [PATCH v6 4/8] drm/i915/pxp: Add GSC-CS backend to send GSC fw messages

2023-03-23 Thread Teres Alexis, Alan Previn
Hi Daniele - thanks for reviewing this - i will fix all of code in accordance to the review comments you provided with some exceptions / alternatives: On Fri, 2023-03-03 at 17:07 -0800, Ceraolo Spurio, Daniele wrote: > > On 2/27/2023 6:21 PM, Alan Previn wrote: > > Add GSC engine based method

[Intel-gfx] ✓ Fi.CI.BAT: success for Add OAM support for MTL

2023-03-23 Thread Patchwork
== Series Details == Series: Add OAM support for MTL URL : https://patchwork.freedesktop.org/series/115570/ State : success == Summary == CI Bug Log - changes from CI_DRM_12907 -> Patchwork_115570v1 Summary --- **SUCCESS** No

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add OAM support for MTL

2023-03-23 Thread Patchwork
== Series Details == Series: Add OAM support for MTL URL : https://patchwork.freedesktop.org/series/115570/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH v5] drm/i915/pxp: limit drm-errors or warning on firmware API failures

2023-03-23 Thread Ceraolo Spurio, Daniele
On 3/23/2023 11:41 AM, Alan Previn wrote: MESA driver is creating protected context on every driver handle creation to query caps bits for app. So when running CI tests, they are observing hundreds of drm_errors when enabling PXP in .config but using SOC fusing or BIOS configuration that

[Intel-gfx] [CI 2/2] drm/i915/gsc: implement wa 14015076503

2023-03-23 Thread Daniele Ceraolo Spurio
The WA states that we need to alert the GSC FW before doing a GSC engine reset and then wait for 200ms. The GuC owns engine reset, so on the i915 side we only need to apply this for full GT reset. Given that we do full GT resets in the resume paths to cleanup the HW state and that a long wait in

[Intel-gfx] [CI 1/2] drm/i915: limit double GT reset to pre-MTL

2023-03-23 Thread Daniele Ceraolo Spurio
Commit 3db9d590557d ("drm/i915/gt: Reset twice") modified the code to always hit the GDRST register twice when doing a reset, with the reported aim to fix invalid post-reset engine state on some platforms (Jasperlake being the only one actually mentioned). This is a problem on MTL, due to the

[Intel-gfx] [PATCH 09/11] drm/i915/perf: Add support for OA media units

2023-03-23 Thread Umesh Nerlige Ramappa
MTL introduces additional OA units dedicated to media use cases. Add support for programming these OA units by passing the media engine class and instance parameters. UMD specific changes for GPUvis support: https://patchwork.freedesktop.org/patch/522827/?series=114023

[Intel-gfx] [PATCH 10/11] drm/i915/perf: Pass i915 object to perf revision helper

2023-03-23 Thread Umesh Nerlige Ramappa
In some cases, perf revision may rely on specific steppings of a platform. To determine the platform, pass i915 object to the perf revision helper. Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_getparam.c | 2 +- drivers/gpu/drm/i915/i915_perf.c

[Intel-gfx] [PATCH 08/11] drm/i915/perf: Add engine class instance parameters to perf

2023-03-23 Thread Umesh Nerlige Ramappa
One or more engines map to a specific OA unit. All reports from these engines are captured in the OA buffer managed by this OA unit. Current i915 OA implementation supports only the OAG unit. OAG primarily caters to render engine, so i915 OA uses render as the default engine in the OA

[Intel-gfx] [PATCH 02/11] drm/i915/mtl: Synchronize i915/BIOS on C6 enabling

2023-03-23 Thread Umesh Nerlige Ramappa
From: Vinay Belgaumkar If BIOS enables/disables C6, i915 should do the same. Also, retain this value across driver reloads. This is needed only for MTL as of now due to an existing bug in OA which needs C6 disabled for it to function. BIOS behavior is also different across platforms in terms of

[Intel-gfx] [PATCH 05/11] drm/i915/perf: Fail modprobe if i915_perf_init fails on OOM

2023-03-23 Thread Umesh Nerlige Ramappa
i915_perf_init can fail due to OOM. Fail driver init if i915_perf_init fails. v2: (Jani) - Reorder patch in the series Signed-off-by: Umesh Nerlige Ramappa Reviewed-by: Ashutosh Dixit --- drivers/gpu/drm/i915/i915_driver.c | 4 +++- drivers/gpu/drm/i915/i915_perf.c | 8 ++--

[Intel-gfx] [PATCH 07/11] drm/i915/perf: Handle non-power-of-2 reports

2023-03-23 Thread Umesh Nerlige Ramappa
Some of the newer OA formats are not powers of 2. For those formats, adjust the hw_tail accordingly when checking for new reports. v2: (Ashutosh) - Switch to OA_TAKEN for diff calculation - Use OA_BUFFER_SIZE instead of the vma size - Update comments Signed-off-by: Umesh Nerlige Ramappa

[Intel-gfx] [PATCH 03/11] drm/i915/perf: Validate OA sseu config outside switch

2023-03-23 Thread Umesh Nerlige Ramappa
Once OA supports media engine class:instance, the engine can only be validated outside the switch since class and instance parameters are separate entities. Since OA sseu config depends on engine class:instance, validate OA sseu config outside the switch. v2: (Ashutosh) - Clarify commit message -

[Intel-gfx] [PATCH 00/11] Add OAM support for MTL

2023-03-23 Thread Umesh Nerlige Ramappa
The OAM unit captures OA reports specific to the media engines. Add support to program the OAM unit on media tile on MTL. The OAM unit is selected by passing the class:instance of a media engine to perf parameters. Corresponding UMD changes are posted to the igt-dev repo as part of supporting the

[Intel-gfx] [PATCH 06/11] drm/i915/perf: Parse 64bit report header formats correctly

2023-03-23 Thread Umesh Nerlige Ramappa
Now that OA formats come in flavor of 64 bit reports, the report header has 64 bit report-id, timestamp, context-id and gpu-ticks fields. When filtering these reports, use the right width for these fields. Note that upper dword of context id is reserved, so squash lower dword only. v2:

[Intel-gfx] [PATCH 11/11] drm/i915/perf: Wa_14017512683: Disable OAM if media C6 is enabled in BIOS

2023-03-23 Thread Umesh Nerlige Ramappa
OAM does not work with media C6 enabled on some steppings of MTL. Disable OAM if we detect that media C6 was enabled in bios. v2: (Ashutosh) - Remove drm_notice from the driver load path - Log a drm_err when opening an OAM stream on affected steppings v3: - Initialize the engine group even if

[Intel-gfx] [PATCH 01/11] drm/i915/perf: Drop wakeref on GuC RC error

2023-03-23 Thread Umesh Nerlige Ramappa
From: Chris Wilson If we fail to adjust the GuC run-control on opening the perf stream, make sure we unwind the wakeref just taken. v2: Retain old goto label names (Ashutosh) v3: Drop bitfield boolean Fixes: 01e742746785 ("drm/i915/guc: Support OA when Wa_16011777198 is enabled")

[Intel-gfx] [PATCH 04/11] drm/i915/perf: Group engines into respective OA groups

2023-03-23 Thread Umesh Nerlige Ramappa
Now that we may have multiple OA units in a single GT as well as on separate GTs, create an engine group that maps to a single OA unit. v2: (Jani) - Drop warning on ENOMEM - Reorder patch in the series v3: (Ashutosh) - Remove unused members from perf structs - Update comments - Update

Re: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Improvements to GuC load failure handling (rev3)

2023-03-23 Thread John Harrison
On 3/22/2023 19:40, Patchwork wrote: == Series Details == Series: Improvements to GuC load failure handling (rev3) URL : https://patchwork.freedesktop.org/series/114168/ State : warning == Summary == Error: dim checkpatch failed b4df7f16c846 drm/i915/guc: Improve GuC load error reporting

Re: [Intel-gfx] ✗ Fi.CI.BAT: failure for Improvements to GuC load failure handling (rev3)

2023-03-23 Thread John Harrison
On 3/22/2023 19:52, Patchwork wrote: Project List - Patchwork *Patch Details* *Series:* Improvements to GuC load failure handling (rev3) *URL:* https://patchwork.freedesktop.org/series/114168/ *State:*failure *Details:*

[Intel-gfx] [PULL] drm-intel-next

2023-03-23 Thread Rodrigo Vivi
Hi Daniel, Here goes drm-intel-next-2023-03-23: Core Changes: - drm: Add SDP Error Detection Configuration Register (Arun) Driver Changes: - Meteor Lake enabling and fixes (RK, Jose, Madhumitha) - Lock the fbdev obj before vma pin (Tejas) - DSC fixes (Stanislav) - Fixes and clean-up on opregion

[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915/tc: Align the ADLP TypeC sequences with bspec

2023-03-23 Thread Patchwork
== Series Details == Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec URL : https://patchwork.freedesktop.org/series/115556/ State : success == Summary == CI Bug Log - changes from CI_DRM_12905_full -> Patchwork_115556v1_full

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/pxp: limit drm-errors or warning on firmware API failures (rev4)

2023-03-23 Thread Patchwork
== Series Details == Series: drm/i915/pxp: limit drm-errors or warning on firmware API failures (rev4) URL : https://patchwork.freedesktop.org/series/113680/ State : success == Summary == CI Bug Log - changes from CI_DRM_12905 -> Patchwork_113680v4

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/pxp: limit drm-errors or warning on firmware API failures (rev4)

2023-03-23 Thread Patchwork
== Series Details == Series: drm/i915/pxp: limit drm-errors or warning on firmware API failures (rev4) URL : https://patchwork.freedesktop.org/series/113680/ State : warning == Summary == Error: dim checkpatch failed 38ee87043677 drm/i915/pxp: limit drm-errors or warning on firmware API

[Intel-gfx] [PATCH v5] drm/i915/pxp: limit drm-errors or warning on firmware API failures

2023-03-23 Thread Alan Previn
MESA driver is creating protected context on every driver handle creation to query caps bits for app. So when running CI tests, they are observing hundreds of drm_errors when enabling PXP in .config but using SOC fusing or BIOS configuration that cannot support PXP sessions. The fixes tag

Re: [Intel-gfx] [PATCH v3] drm/i915/pxp: limit drm-errors or warning on firmware API failures

2023-03-23 Thread Teres Alexis, Alan Previn
On Thu, 2023-03-23 at 08:35 +, Tvrtko Ursulin wrote: On 23/03/2023 00:27, Teres Alexis, Alan Previn wrote: On Fri, 2023-03-17 at 13:37 +0200, Tamminen, Eero T wrote: Hi, On 16.3.2023 10.50, Tvrtko Ursulin wrote: [ 11.674183] i915 :00:02.0: PXP init-arb-session-15 failed due to

Re: [Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks that the required power is on

2023-03-23 Thread Imre Deak
On Thu, Mar 23, 2023 at 04:33:54PM +0200, Jani Nikula wrote: > On Thu, 23 Mar 2023, Imre Deak wrote: > > Add an assert to each TC PHY hook that their required power domain is > > enabled. > > > > While at it add a comment describing the domains used on each platform > > and TC mode. > > > >

Re: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform

2023-03-23 Thread kernel test robot
Hi Imre, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-tip/drm-tip] url: https://github.com/intel-lab-lkp/linux/commits/Imre-Deak/drm-i915-tc-Group-the-TC-PHY-setup-query-functions-per-platform/20230323-222328 base: git://anongit.freedesktop.org

Re: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform

2023-03-23 Thread kernel test robot
Hi Imre, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-tip/drm-tip] url: https://github.com/intel-lab-lkp/linux/commits/Imre-Deak/drm-i915-tc-Group-the-TC-PHY-setup-query-functions-per-platform/20230323-222328 base: git://anongit.freedesktop.org

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/tc: Align the ADLP TypeC sequences with bspec

2023-03-23 Thread Patchwork
== Series Details == Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec URL : https://patchwork.freedesktop.org/series/115556/ State : success == Summary == CI Bug Log - changes from CI_DRM_12905 -> Patchwork_115556v1 Summary

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec

2023-03-23 Thread Patchwork
== Series Details == Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec URL : https://patchwork.freedesktop.org/series/115556/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/tc: Align the ADLP TypeC sequences with bspec

2023-03-23 Thread Patchwork
== Series Details == Series: drm/i915/tc: Align the ADLP TypeC sequences with bspec URL : https://patchwork.freedesktop.org/series/115556/ State : warning == Summary == Error: dim checkpatch failed 89d7c50eaa7c drm/i915/tc: Group the TC PHY setup/query functions per platform dd719e0596ed

[Intel-gfx] ✓ Fi.CI.IGT: success for Correction to QGV related register addresses (rev3)

2023-03-23 Thread Patchwork
== Series Details == Series: Correction to QGV related register addresses (rev3) URL : https://patchwork.freedesktop.org/series/115473/ State : success == Summary == CI Bug Log - changes from CI_DRM_12904_full -> Patchwork_115473v3_full

Re: [Intel-gfx] [PATCH 6/7] vfio: Accpet device file from vfio PCI hot reset path

2023-03-23 Thread Jason Gunthorpe
On Thu, Mar 23, 2023 at 10:14:31AM +, Liu, Yi L wrote: > > From: Jason Gunthorpe > > Sent: Tuesday, March 21, 2023 3:08 AM > > > > On Thu, Mar 16, 2023 at 05:41:55AM -0700, Yi Liu wrote: > > > This extends both vfio_file_is_valid() and vfio_file_has_dev() to accept > > > device file from the

Re: [Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks that the required power is on

2023-03-23 Thread Jani Nikula
On Thu, 23 Mar 2023, Imre Deak wrote: > Add an assert to each TC PHY hook that their required power domain is > enabled. > > While at it add a comment describing the domains used on each platform > and TC mode. > > Signed-off-by: Imre Deak > --- > drivers/gpu/drm/i915/display/intel_tc.c | 61

Re: [Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform

2023-03-23 Thread Jani Nikula
On Thu, 23 Mar 2023, Imre Deak wrote: > Arrange the TC PHY HW state setup/query functions into platform > specific and generic groups. This prepares for upcoming patches adding > generic TC PHY handlers and platform specific hooks for these, > replacing the corresponding if ladders. > > No

[Intel-gfx] [PATCH 27/29] drm/i915: Disable DPLLs before disconnecting the TC PHY

2023-03-23 Thread Imre Deak
Bspec requires disabling the DPLLs on TC ports before disconnecting the port's PHY. Add a post_pll_disable encoder hook and move the call to disconnect the port's PHY from the post_disable hook to the new hook. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_ddi.c | 15

[Intel-gfx] [PATCH 13/29] drm/i915/tc: Add TC PHY hooks to connect/disconnect the PHY

2023-03-23 Thread Imre Deak
Add TC PHY hooks to connect/disconnect the PHY. A follow-up patch will add the ADLP specific hooks for these. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git

[Intel-gfx] [PATCH 18/29] drm/i915/tc: Drop tc_cold_block()/unblock()'s power domain parameter

2023-03-23 Thread Imre Deak
Simplify tc_cold_block()/unblock() by dropping their power domain parameter. The power domain depends on the current TC mode, which - after the previous patch - can't change while the PHY is connected, holding a TC-cold-off power domain reference. Based on this the domain can be deducted from the

[Intel-gfx] [PATCH 16/29] drm/i915/tc: Block/unblock TC-cold in the PHY connect/disconnect hooks

2023-03-23 Thread Imre Deak
Move blocking/unblocking the TC-cold power state to the platform specific PHY connect / disconnect hooks. This allows for adjusting the connect/disconnect sequence as required for each platform. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 43 -

[Intel-gfx] [PATCH 29/29] drm/i915: Remove the encoder update_prepare()/complete() hooks

2023-03-23 Thread Imre Deak
The encoder update_prepare()/complete() hooks were added to hold a TC port link reference for all outputs in the atomic state around the whole modeset enable sequence - thus locking the ports' TC mode - and set the TBT/DP-alt PLL type corresponding to the current TC mode. Since nothing depends on

[Intel-gfx] [PATCH 19/29] drm/i915/tc: Add TC PHY hook to get the TC-cold blocking power domain

2023-03-23 Thread Imre Deak
Instead of the corresponding if ladder, add a TC PHY hook to get the platform and TC mode specific power domain used for blocking the TC-cold power state. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 73 - 1 file changed, 59 insertions(+), 14

[Intel-gfx] [PATCH 14/29] drm/i915/tc: Fix up the legacy VBT flag only in disconnected mode

2023-03-23 Thread Imre Deak
A follow-up patch simplifies the tc_cold_block()/unblock() functions, dropping the power domain parameter. For this it must be ensured that the power domain - which depends on the actual TC mode and so the VBT legacy port flag - can't change while the PHY is in a connected state and accordingly

[Intel-gfx] [PATCH 20/29] drm/i915/tc: Add asserts in TC PHY hooks that the required power is on

2023-03-23 Thread Imre Deak
Add an assert to each TC PHY hook that their required power domain is enabled. While at it add a comment describing the domains used on each platform and TC mode. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 61 + 1 file changed, 61

[Intel-gfx] [PATCH 21/29] drm/i915/tc: Add TC PHY hook to init the PHY

2023-03-23 Thread Imre Deak
Add a hook for platform specific PHY initialization. Move the detection of modular FIAs to the TGL handler, skipping this on ADLP+ where the FIAs are always modular, not requiring a detection. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 96 ++--

[Intel-gfx] [PATCH 15/29] drm/i915/tc: Check TC mode instead of the VBT legacy flag

2023-03-23 Thread Imre Deak
After the previous patch the TC mode in the connect/disconnect functions is always in sync with the VBT legacy port flag, so for consistency with the rest of the function check the TC mode instead of the VBT flag. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 15

[Intel-gfx] [PATCH 17/29] drm/i915/tc: Remove redundant wakeref=0 check from unblock_tc_cold()

2023-03-23 Thread Imre Deak
After the previous patch unblock_tc_cold() will not be called in a disconnected mode, so the wakeref passed to it will be always non-zero. Remove the redundant check. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 8 1 file changed, 8 deletions(-) diff --git

[Intel-gfx] [PATCH 28/29] drm/i915: Remove TC PHY disconnect workaround

2023-03-23 Thread Imre Deak
After the previous patch the workaround for a TC PHY hang issue is not required any more, remove it. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 8 1 file changed, 8 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c

[Intel-gfx] [PATCH 25/29] drm/i915/adlp/tc: Align the connect/disconnect PHY sequence with bspec

2023-03-23 Thread Imre Deak
Bspec has updated the TC connect/disconnect sequences, add the required platform hooks for these. The difference wrt. the old sequence is the order of taking the PHY ownership - while holding a port power reference this requires - and blocking the TC-cold power state. Bspec: 49294

[Intel-gfx] [PATCH 23/29] drm/i915/tc: Get power ref for reading the HPD live status register

2023-03-23 Thread Imre Deak
Enable the power required for the HPD live status register access instead of depending on the caller blocking the TC-cold power state (during HW readout and connector probing). A follow up patch will remove connecting/disconnecting the PHY around connector probing, so querying the HPD status can

[Intel-gfx] [PATCH 26/29] drm/i915: Move shared DPLL disabling into CRTC disable hook

2023-03-23 Thread Imre Deak
The spec requires disabling the PLL on TC ports before disconnecting the port's PHY. Prepare for that by moving the PLL disabling to the CRTC disable hook, while disconnecting the PHY will be moved to the post_pll_disable() encoder hook in the next patch. Signed-off-by: Imre Deak ---

[Intel-gfx] [PATCH 24/29] drm/i915/tc: Don't connect the PHY in intel_tc_port_connected()

2023-03-23 Thread Imre Deak
Connecting the PHY for connector probing - also blocking TC-cold - isn't required and has some overhead. Taking only the mutex is sufficient, so do that. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 11 --- 1 file changed, 8 insertions(+), 3 deletions(-) diff

[Intel-gfx] [PATCH 22/29] drm/i915/adlp/tc: Use the DE HPD ISR register for hotplug detection

2023-03-23 Thread Imre Deak
The spec says to use the CPU ISR registers for DP-alt/TBT HPD detection on ADLP, so do that instead of using the related IOM/TCSS registers. Bspec: 55480, 55482, 49212, 49305 Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 21 + 1 file changed, 9

[Intel-gfx] [PATCH 06/29] drm/i915/tc: Check for TC PHY explicitly in intel_tc_port_fia_max_lane_count()

2023-03-23 Thread Imre Deak
Check explicitly if the port passed to intel_tc_port_fia_max_lane_count() has a TC PHY, instead of relying on the default TC mode value set for non-TC PHY ports. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff

[Intel-gfx] [PATCH 10/29] drm/i915/tc: Add TC PHY hook to read out the PHY HW state

2023-03-23 Thread Imre Deak
Add a TC PHY hook to read out the PHY HW state on each platform, move the common parts to the generic helper. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 34 + 1 file changed, 24 insertions(+), 10 deletions(-) diff --git

[Intel-gfx] [PATCH 09/29] drm/i915/tc: Add TC PHY hooks to get the PHY ready/owned state

2023-03-23 Thread Imre Deak
Add TC PHY hooks to get the PHY ready/owned state on each platform, replacing the corresponding if ladder. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 20 1 file changed, 8 insertions(+), 12 deletions(-) diff --git

[Intel-gfx] [PATCH 07/29] drm/i915/tc: Move the intel_tc_port struct declaration to intel_tc.c

2023-03-23 Thread Imre Deak
Move the intel_tc_port struct to intel_tc.c for better isolation. This requires allocating the struct dynamically. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_ddi.c | 7 +-- .../drm/i915/display/intel_display_types.h| 4 +- drivers/gpu/drm/i915/display/intel_tc.c

[Intel-gfx] [PATCH 12/29] drm/i915/tc: Factor out tc_phy_verify_legacy_or_dp_alt_mode()

2023-03-23 Thread Imre Deak
Factor out a function verifying the PHY connected state in legacy or DP-alt mode. This is common to all platforms, which can be reused in platform specific connect hooks added in follow-up patches. No functional changes. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 47

[Intel-gfx] [PATCH 08/29] drm/i915/tc: Add TC PHY hook to get the PHY HPD live status

2023-03-23 Thread Imre Deak
Add a table of TC PHY hooks which can be used to call platform specific TC PHY handlers, replacing the corresponding if ladders. Add the hook to retrieve the PHY's HPD live status. Move the common part fixing up the VBT legacy port flag to the generic helper. Signed-off-by: Imre Deak ---

[Intel-gfx] [PATCH 05/29] drm/i915/tc: Move TC port fields to a new intel_tc_port struct

2023-03-23 Thread Imre Deak
Move the TC port specific fields from intel_digital_port to a new intel_tc_port struct. Pass an intel_tc_port pointer to all static functions in intel_tc.c keeping dig_port accessible for these via a pointer stored in the new struct. The next patch will allocate the intel_tc_port dynamically,

[Intel-gfx] [PATCH 11/29] drm/i915/tc: Add generic TC PHY connect/disconnect handlers

2023-03-23 Thread Imre Deak
Add generic handlers to connect/disconnect a PHY. Setting the TC mode to the target mode deducted from the HPD state and - if connecting to this mode fails - falling back to connecting to the default (TBT) mode are common to all platforms; move the logic for this from the ICL specific connect /

[Intel-gfx] [PATCH 01/29] drm/i915/tc: Group the TC PHY setup/query functions per platform

2023-03-23 Thread Imre Deak
Arrange the TC PHY HW state setup/query functions into platform specific and generic groups. This prepares for upcoming patches adding generic TC PHY handlers and platform specific hooks for these, replacing the corresponding if ladders. No functional changes. Signed-off-by: Imre Deak ---

[Intel-gfx] [PATCH 02/29] drm/i915/tc: Use the adlp prefix for ADLP TC PHY functions

2023-03-23 Thread Imre Deak
Use the usual adlp prefix for all ADLP specific TC PHY functions. Other ADL platforms don't support TC. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git

[Intel-gfx] [PATCH 04/29] drm/i915/tc: Use the tc_phy prefix for all TC PHY functions

2023-03-23 Thread Imre Deak
For consistency use the tc_phy prefix for all TC PHY functions. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 30 - 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_tc.c

[Intel-gfx] [PATCH 03/29] drm/i915/tc: Rename tc_phy_status_complete() to tc_phy_is_ready()

2023-03-23 Thread Imre Deak
For consistency rename tc_phy_status_complete() to tc_phy_is_ready() following the terminology of new platforms. Signed-off-by: Imre Deak --- drivers/gpu/drm/i915/display/intel_tc.c | 24 1 file changed, 12 insertions(+), 12 deletions(-) diff --git

[Intel-gfx] [PATCH 00/29] drm/i915/tc: Align the ADLP TypeC sequences with bspec

2023-03-23 Thread Imre Deak
This patchset updates the ADLP TypeC PHY connect/disconnect sequences that changed in Bspec. The change in the power domains used and order of enabling these wrt. taking the PHY ownership domains requires moving these sequences to platform specific hooks; the first part of the patchset adds these

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [1/1] drm/i915: Add per-tile rc6 enable/disable

2023-03-23 Thread Patchwork
== Series Details == Series: series starting with [1/1] drm/i915: Add per-tile rc6 enable/disable URL : https://patchwork.freedesktop.org/series/115543/ State : success == Summary == CI Bug Log - changes from CI_DRM_12904_full -> Patchwork_115543v1_full

Re: [Intel-gfx] [PATCH] drm/i915/selftests: Drop igt_cs_tlb

2023-03-23 Thread Andi Shyti
Hi, On Mon, Mar 20, 2023 at 08:21:17PM +0100, Andi Shyti wrote: > From: Jonathan Cavitt > > The gt_tlb live selftest has the same code coverage as the > igt_cs_tlb subtest of gtt, except it is better at detecting > TLB bugs. Furthermore, while igt_cs_tlb is hitting some > unforeseen issues,

[Intel-gfx] ✓ Fi.CI.BAT: success for Correction to QGV related register addresses (rev3)

2023-03-23 Thread Patchwork
== Series Details == Series: Correction to QGV related register addresses (rev3) URL : https://patchwork.freedesktop.org/series/115473/ State : success == Summary == CI Bug Log - changes from CI_DRM_12904 -> Patchwork_115473v3 Summary

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Correction to QGV related register addresses (rev3)

2023-03-23 Thread Patchwork
== Series Details == Series: Correction to QGV related register addresses (rev3) URL : https://patchwork.freedesktop.org/series/115473/ State : warning == Summary == Error: dim checkpatch failed a781f15196ee drm/i915/reg: fix QGV points register access offsets -:24: WARNING:LONG_LINE: line

Re: [Intel-gfx] [PATCH v6 12/24] vfio/pci: Allow passing zero-length fd array in VFIO_DEVICE_PCI_HOT_RESET

2023-03-23 Thread Jason Gunthorpe
On Thu, Mar 23, 2023 at 03:15:20AM +, Liu, Yi L wrote: > > From: Jason Gunthorpe > > Sent: Wednesday, March 22, 2023 9:43 PM > > > > On Wed, Mar 22, 2023 at 01:33:09PM +, Liu, Yi L wrote: > > > > > Thanks. So this new _INFO only reports a limited scope instead of > > > the full list of

[Intel-gfx] ✓ Fi.CI.IGT: success for series starting with [v2,1/3] drm/i915: Add a function to mmap framebuffer obj

2023-03-23 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Add a function to mmap framebuffer obj URL : https://patchwork.freedesktop.org/series/115542/ State : success == Summary == CI Bug Log - changes from CI_DRM_12903_full -> Patchwork_115542v1_full

Re: [Intel-gfx] [PATCH v2 1/2] drm/i915/reg: fix QGV points register access offsets

2023-03-23 Thread Govindapillai, Vinod
On Wed, 2023-03-22 at 16:36 +0200, Ville Syrjälä wrote: > On Wed, Mar 22, 2023 at 04:20:50PM +0200, Vinod Govindapillai wrote: > > Wrong offsets are calculated to read QGV point registers. Fix it > > to read from the correct registers. > > > > v2: Avoid magic number and better handling the second

[Intel-gfx] [PATCH v3 1/2] drm/i915/reg: fix QGV points register access offsets

2023-03-23 Thread Vinod Govindapillai
Wrong offsets are calculated to read QGV point registers. Fix it to read from the correct registers. Bspec: 64602 Reviewed-by: Stanislav Lisovskiy Signed-off-by: Vinod Govindapillai --- drivers/gpu/drm/i915/i915_reg.h | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git

[Intel-gfx] [PATCH v3 2/2] drm/i915/reg: use the correct register to access SAGV block time

2023-03-23 Thread Vinod Govindapillai
Wrong register address is used to read the SAG block time. Fix the register address according to the bspec. Bspec: 64608 Signed-off-by: Vinod Govindapillai Reviewed-by: Stanislav Lisovskiy --- drivers/gpu/drm/i915/i915_reg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH v3 0/2] Correction to QGV related register addresses

2023-03-23 Thread Vinod Govindapillai
Wrong offsets are calculated to read QGV points from mem ss. Also a wrong register address is used to get the sagv block time. Fix these two issues. Vinod Govindapillai (2): drm/i915/reg: fix QGV points register access offsets drm/i915/reg: use the correct register to access SAGV block time

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/1] drm/i915: Add per-tile rc6 enable/disable

2023-03-23 Thread Patchwork
== Series Details == Series: series starting with [1/1] drm/i915: Add per-tile rc6 enable/disable URL : https://patchwork.freedesktop.org/series/115543/ State : success == Summary == CI Bug Log - changes from CI_DRM_12904 -> Patchwork_115543v1

Re: [Intel-gfx] [PATCH 3/7] vfio/pci: Allow passing zero-length fd array in VFIO_DEVICE_PCI_HOT_RESET

2023-03-23 Thread Jason Gunthorpe
On Thu, Mar 23, 2023 at 10:21:48AM +, Liu, Yi L wrote: > > It would also be a nice touch to include a new vfio_pci_hot_reset_info > > that returns the dev_id's of the other devices in the reset group > > instead of a BDF. It would be alot easier for userspace to work with. > > Yeah, just as

Re: [Intel-gfx] [PATCH] drm/i915/gem: Flush lmem contents after construction

2023-03-23 Thread Das, Nirmoy
On 3/16/2023 5:59 PM, Nirmoy Das wrote: From: Chris Wilson i915_gem_object_create_lmem_from_data() lacks the flush of the data written to lmem to ensure the object is marked as dirty and the writes flushed to the backing store. Once created, we can immediately release the obj->mm.mapping

[Intel-gfx] [PULL] drm-misc-next

2023-03-23 Thread Maarten Lankhorst
Hi Dave, Daniel, Lots of small commits with cleanup and fixes this time around, nothing major otherwise. Cheers, ~Maarten drm-misc-next-2023-03-23: drm-misc-next for v6.4-rc1: Core Changes: - Add unit test for xrgb to mono. - Assorted small fixes to format helper selftests. - Assorted

[Intel-gfx] [PULL] drm-intel-fixes

2023-03-23 Thread Jani Nikula
Hi Dave & Daniel - Otherwise a fairly regular fixes pull, except for two things: First, I have not gotten CI results on this. I don't know what gives. Second, I missed adding the hwmon revert to the tag. I accidentally picked up the commit for the previous pull, and it shouldn't have been

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [v2,1/3] drm/i915: Add a function to mmap framebuffer obj

2023-03-23 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Add a function to mmap framebuffer obj URL : https://patchwork.freedesktop.org/series/115542/ State : success == Summary == CI Bug Log - changes from CI_DRM_12903 -> Patchwork_115542v1

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Add per-tile rc6 enable/disable

2023-03-23 Thread Tvrtko Ursulin
On 23/03/2023 10:12, Badal Nilawar wrote: From: Don Hiatt Add the ability to enable/disable rc6 on a per tile basis. Some words on justification? To enable rc6 on a tile: echo 1 > /sys/class/drm/card0/gt/gtX/rc6_enable To disable rc6 on a tile: echo 0 >

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [v2,1/3] drm/i915: Add a function to mmap framebuffer obj

2023-03-23 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Add a function to mmap framebuffer obj URL : https://patchwork.freedesktop.org/series/115542/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [v2,1/3] drm/i915: Add a function to mmap framebuffer obj

2023-03-23 Thread Patchwork
== Series Details == Series: series starting with [v2,1/3] drm/i915: Add a function to mmap framebuffer obj URL : https://patchwork.freedesktop.org/series/115542/ State : warning == Summary == Error: dim checkpatch failed 75005488af6b drm/i915: Add a function to mmap framebuffer obj -:132:

Re: [Intel-gfx] [PATCH 3/7] vfio/pci: Allow passing zero-length fd array in VFIO_DEVICE_PCI_HOT_RESET

2023-03-23 Thread Liu, Yi L
> From: Jason Gunthorpe > Sent: Tuesday, March 21, 2023 3:03 AM > On Thu, Mar 16, 2023 at 05:41:52AM -0700, Yi Liu wrote: > > as an alternative method for ownership check when iommufd is used. In > > this case all opened devices in the affected dev_set are verified to > > be bound to a same valid

Re: [Intel-gfx] [PATCH 6/7] vfio: Accpet device file from vfio PCI hot reset path

2023-03-23 Thread Liu, Yi L
> From: Jason Gunthorpe > Sent: Tuesday, March 21, 2023 3:08 AM > > On Thu, Mar 16, 2023 at 05:41:55AM -0700, Yi Liu wrote: > > This extends both vfio_file_is_valid() and vfio_file_has_dev() to accept > > device file from the vfio PCI hot reset. > > > > Signed-off-by: Yi Liu > > --- > >

[Intel-gfx] [PATCH 1/1] drm/i915: Add per-tile rc6 enable/disable

2023-03-23 Thread Badal Nilawar
From: Don Hiatt Add the ability to enable/disable rc6 on a per tile basis. To enable rc6 on a tile: echo 1 > /sys/class/drm/card0/gt/gtX/rc6_enable To disable rc6 on a tile: echo 0 > /sys/class/drm/card0/gt/gtX/rc6_enable To display the rc6 state of a tile: cat

[Intel-gfx] [PATCH v2 3/3] drm/i915/display: Implement fb_mmap callback function

2023-03-23 Thread Nirmoy Das
If stolen memory allocation fails for fbdev, the driver will fallback to system memory. Calculation of smem_start is wrong for such framebuffer objs if the platform comes with no gmadr or no aperture. Solve this by adding fb_mmap callback which will use GTT if aperture is available otherwise will

[Intel-gfx] [PATCH 2/3] drm/i915/display: Add helper func to get intel_fbdev from drm_fb_helper

2023-03-23 Thread Nirmoy Das
Add a helper function to retrieve struct intel_fbdev from struct drm_fb_helper. Cc: Matthew Auld Cc: Andi Shyti Cc: Ville Syrjälä Cc: Jani Nikula Cc: Imre Deak Signed-off-by: Nirmoy Das Reviewed-by: Jani Nikula Reviewed-by: Andi Shyti Reviewed-by: Andrzej Hajda ---

[Intel-gfx] [PATCH v2 1/3] drm/i915: Add a function to mmap framebuffer obj

2023-03-23 Thread Nirmoy Das
Implement i915_gem_fb_mmap() to enable fb_ops.fb_mmap() callback for i915's framebuffer objects. v2: add a comment why i915_gem_object_get() needed(Andi). Cc: Matthew Auld Cc: Andi Shyti Cc: Ville Syrjälä Cc: Jani Nikula Cc: Imre Deak Signed-off-by: Nirmoy Das Reviewed-by: Andi Shyti

Re: [Intel-gfx] [PATCH v2 25/27] KVM: x86/mmu: Drop @slot param from exported/external page-track APIs

2023-03-23 Thread Yan Zhao
On Fri, Mar 17, 2023 at 04:28:56PM +0800, Yan Zhao wrote: > On Fri, Mar 10, 2023 at 04:22:56PM -0800, Sean Christopherson wrote: > ... > > +int kvm_write_track_add_gfn(struct kvm *kvm, gfn_t gfn) > > +{ > > + struct kvm_memory_slot *slot; > > + int idx; > > + > > + idx =

[Intel-gfx] 2023 X.Org Board of Directors Elections timeline extended, request for nominations

2023-03-23 Thread Ricardo Garcia
We are seeking nominations for candidates for election to the X.org Foundation Board of Directors. However, as we presently do not have enough nominations to start the election - the decision has been made to extend the timeline by 2 weeks. Note this is a fairly regular part of the elections

Re: [Intel-gfx] [PATCH v3] drm/i915/pxp: limit drm-errors or warning on firmware API failures

2023-03-23 Thread Tvrtko Ursulin
On 23/03/2023 00:27, Teres Alexis, Alan Previn wrote: On Fri, 2023-03-17 at 13:37 +0200, Tamminen, Eero T wrote: Hi, On 16.3.2023 10.50, Tvrtko Ursulin wrote: [   11.674183] i915 :00:02.0: PXP init-arb-session-15 failed due to BIOS/SOC:0x101a:ERR_PLATFORM_CONFIG ... Alan - is this

[Intel-gfx] [PULL] drm-misc-fixes

2023-03-23 Thread Thomas Zimmermann
Hi Dave and Daniel, here's the weekly PR for drm-misc-fixes. Best regards Thomas drm-misc-fixes-2023-03-23: Short summary of fixes pull: * fixes for bind and probing error handling * panel-orientation fixes for Lenovo Book X90F The following changes since commit

Re: [Intel-gfx] [PATCH v2: 1/3] drm/i915: Add a function to mmap framebuffer obj

2023-03-23 Thread Das, Nirmoy
On 3/20/2023 3:02 PM, Andrzej Hajda wrote: On 20.03.2023 11:09, Nirmoy Das wrote: Implement i915_gem_fb_mmap() to enable fb_ops.fb_mmap() callback for i915's framebuffer objects. v2: add a comment why i915_gem_object_get() needed(Andi). Cc: Matthew Auld Cc: Andi Shyti Cc: Ville Syrjälä

Re: [Intel-gfx] [PATCH v6 06/10] drm/i915/hdcp: Retain hdcp_capable return codes

2023-03-23 Thread Kandpal, Suraj
> -Original Message- > From: Kandpal, Suraj > Sent: Friday, March 10, 2023 1:55 PM > To: Mark Yacoub ; quic_khs...@quicinc.com; > linux-arm-...@vger.kernel.org; dri-de...@lists.freedesktop.org; > freedr...@lists.freedesktop.org; devicet...@vger.kernel.org; linux- >

Re: [Intel-gfx] [PATCH v13 0/6] Enable HDCP2.x via GSC CS

2023-03-23 Thread Shankar, Uma
> -Original Message- > From: Kandpal, Suraj > Sent: Thursday, March 16, 2023 2:59 PM > To: intel-gfx@lists.freedesktop.org > Cc: Nautiyal, Ankit K ; Shankar, Uma > ; Kandpal, Suraj > Subject: [PATCH v13 0/6] Enable HDCP2.x via GSC CS > > These patches enable HDCP2.x on machines MTL

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