[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries (rev2)

== Series Details == Series: series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries (rev2) URL : https://patchwork.freedesktop.org/series/126268/ State : success == Summary == CI Bug Log - changes from CI_DRM_13865 -> Patchwork_126268v2

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries (rev2)

== Series Details == Series: series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries (rev2) URL : https://patchwork.freedesktop.org/series/126268/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked

[Intel-gfx] [drm-intel:drm-intel-gt-next 6/6] drivers/gpu/drm/i915/i915_drm_client.c:92:9: sparse: sparse: incompatible types in comparison expression (different address spaces):

tree: git://anongit.freedesktop.org/drm-intel drm-intel-gt-next head: 968853033d8aa4dbb80fbafa6f5d9b6a0ea21272 commit: 968853033d8aa4dbb80fbafa6f5d9b6a0ea21272 [6/6] drm/i915: Implement fdinfo memory stats printing config: x86_64-randconfig-122-2023

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/quirk: Add quirk for devices with incorrect PWM frequency (rev2)

== Series Details == Series: drm/i915/quirk: Add quirk for devices with incorrect PWM frequency (rev2) URL : https://patchwork.freedesktop.org/series/125243/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13864 -> Patchwork_125243v2

[Intel-gfx] ✗ Fi.CI.BAT: failure for Remove custom dumb_map_offset implementations in i915 driver (rev2)

== Series Details == Series: Remove custom dumb_map_offset implementations in i915 driver (rev2) URL : https://patchwork.freedesktop.org/series/126264/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13863 -> Patchwork_126264v2

Re: [Intel-gfx] [PULL] drm-misc-fixes

On Wed, Nov 08, 2023 at 02:18:28PM +0100, Maarten Lankhorst wrote: > Hi Dave, Daniel, > > drm-misc-next-fixes is empty, have a pull request for drm-misc-fixes. > > Cheers, > ~Maarten > > drm-misc-fixes-2023-11-08: > drm-misc-fixes for v6.7-rc1: > > - drm-misc-fixes from 2023-11-02 + a single

[Intel-gfx] ✗ Fi.CI.BAT: failure for series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries

== Series Details == Series: series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries URL : https://patchwork.freedesktop.org/series/126268/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13863 -> Patchwork_126268v1

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries

== Series Details == Series: series starting with [1/2] MAINTAINERS: update drm/i915 W: and B: entries URL : https://patchwork.freedesktop.org/series/126268/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✓ Fi.CI.BAT: success for Add DSC fractional bpp support (rev10)

== Series Details == Series: Add DSC fractional bpp support (rev10) URL : https://patchwork.freedesktop.org/series/111391/ State : success == Summary == CI Bug Log - changes from CI_DRM_13863 -> Patchwork_111391v10 Summary ---

[Intel-gfx] [PATCH v2] drm/i915/quirk: Add quirk for devices with incorrect PWM frequency

Cyernet T10C has a bad default PWM frequency causing the display to strobe when the brightness is less than 100%. Create a new quirk to use the value from the BIOS rather than the default register value. Signed-off-by: Allen Ballway --- V1 -> V2: Fix style issues.

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for Add DSC fractional bpp support (rev10)

== Series Details == Series: Add DSC fractional bpp support (rev10) URL : https://patchwork.freedesktop.org/series/111391/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for Add DSC fractional bpp support (rev10)

== Series Details == Series: Add DSC fractional bpp support (rev10) URL : https://patchwork.freedesktop.org/series/111391/ State : warning == Summary == Error: dim checkpatch failed 83db4cff drm/display/dp: Add helper function to get DSC bpp precision f72f3f2aa067 drm/i915/display: Store

[Intel-gfx] [PATCH v2] Remove custom dumb_map_offset implementations in i915 driver

Making i915 use drm_gem_create_mmap_offset() instead of its custom implementations for associating GEM object with a fake offset. Signed-off-by: Dipam Turkar --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 21 - drivers/gpu/drm/i915/gem/i915_gem_mman.h | 4

Re: [Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

Hi Dipam, kernel test robot noticed the following build warnings: [auto build test WARNING on drm-tip/drm-tip] url: https://github.com/intel-lab-lkp/linux/commits/Dipam-Turkar/Remove-custom-dumb_map_offset-implementations-in-i915-driver/20231110-185942 base: git://anongit.freedesktop.org

Re: [Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

Hi Dipam, kernel test robot noticed the following build errors: [auto build test ERROR on drm-tip/drm-tip] url: https://github.com/intel-lab-lkp/linux/commits/Dipam-Turkar/Remove-custom-dumb_map_offset-implementations-in-i915-driver/20231110-185942 base: git://anongit.freedesktop.org/drm

[Intel-gfx] [drm-intel:drm-intel-gt-next 1/6] drivers/gpu/drm/i915/i915_drm_client.h:81:1: warning: no return statement in function returning non-void

tree: git://anongit.freedesktop.org/drm-intel drm-intel-gt-next head: 968853033d8aa4dbb80fbafa6f5d9b6a0ea21272 commit: e4ae85e364fc652ea15d85b0f3a6da304c9b5ce7 [1/6] drm/i915: Add ability for tracking buffer objects per client config: x86_64-buildonly-randconfig-001-20231110 (https

Re: [Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

Hi Dipam, kernel test robot noticed the following build errors: [auto build test ERROR on drm-tip/drm-tip] url: https://github.com/intel-lab-lkp/linux/commits/Dipam-Turkar/Remove-custom-dumb_map_offset-implementations-in-i915-driver/20231110-185942 base: git://anongit.freedesktop.org/drm

Re: [Intel-gfx] Getting black screen with stable kernel 6.6

Hi, Please report with these instructions: https://drm.pages.freedesktop.org/intel-docs/how-to-file-i915-bugs.html > -Original Message- > From: Intel-gfx On Behalf Of VDRU > VDRU > Sent: Friday, November 10, 2023 4:59 PM > To: intel-gfx@lists.freedesktop.org > Subject: [Intel-gfx]

Re: [Intel-gfx] [PULL] drm-intel-next-fixes

On Wed, Nov 08, 2023 at 04:04:14PM +0200, Jani Nikula wrote: > > Hi Dave & Daniel - > > I see Dave already sent the pull request for v6.7-rc1 fixes, but here's > some more. > > drm-intel-next-fixes-2023-11-08: > drm/i915 fixes for v6.7-rc1: > - Fix null dereference when perf interface is not

Re: [Intel-gfx] [PATCH 1/2] MAINTAINERS: update drm/i915 W: and B: entries

On Fri, Nov 10, 2023 at 01:48:06PM +0200, Jani Nikula wrote: > The 01.org page has ceased to exist, and the relevant documentation is > now hosted at https://drm.pages.freedesktop.org/intel-docs/ > > Cc: Joonas Lahtinen > Cc: Rodrigo Vivi > Cc: Tvrtko Ursulin > Signed-off-by: Jani Nikula

Re: [Intel-gfx] [PATCH 2/2] drm/i915: update in-source bug filing URLs

On Fri, Nov 10, 2023 at 01:48:07PM +0200, Jani Nikula wrote: > The bug filing documentation has been moved from the gitlab wiki to > gitlab pages at https://drm.pages.freedesktop.org/intel-docs/. > > Cc: Joonas Lahtinen > Cc: Rodrigo Vivi > Cc: Tvrtko Ursulin > Signed-off-by: Jani Nikula

[Intel-gfx] Getting black screen with stable kernel 6.6

Hi, I've been using kernel 6.5.10 on Debian Sid without issue. I just tried kernel 6.6, (and consequently 6.6.1) but only get a black screen. The system doesn't run a desktop environment but runs as a Kodi client using GBM for display output. The system is a Beelink Mini S12 Pro (12th gen Alder

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/xe2lpd: remove FBC restriction if PSR2 is enabled

== Series Details == Series: drm/i915/xe2lpd: remove FBC restriction if PSR2 is enabled URL : https://patchwork.freedesktop.org/series/126256/ State : success == Summary == CI Bug Log - changes from CI_DRM_13860 -> Patchwork_126256v1

[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/display: Remove dead code around intel_atomic_helper->free_list

== Series Details == Series: drm/i915/display: Remove dead code around intel_atomic_helper->free_list URL : https://patchwork.freedesktop.org/series/126250/ State : success == Summary == CI Bug Log - changes from CI_DRM_13859 -> Patchwork_126250v1

Re: [Intel-gfx] [PATCH] drm/i915/display: Remove dead code around intel_atomic_helper->free_list

On Fri, 10 Nov 2023, Jouni Högander wrote: > After switching to directly using dma_fence instead of i915_sw_fence we > have left some dead code around intel_atomic_helper->free_list. Remove that > dead code. Yay, Reviewed-by: Jani Nikula > > Signed-off-by: Jouni Högander > --- >

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/display: Remove dead code around intel_atomic_helper->free_list

== Series Details == Series: drm/i915/display: Remove dead code around intel_atomic_helper->free_list URL : https://patchwork.freedesktop.org/series/126250/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

Re: [Intel-gfx] [PATCH] drm/i915/gsc: Assign a uabi class number to the GSC CS

On 09/11/2023 23:53, Daniele Ceraolo Spurio wrote: The GSC CS is not exposed to the user, so we skipped assigning a uabi class number for it. However, the trace logs use the uabi class and instance to identify the engine, so leaving uabi class unset makes the GSC CS show up as the RCS in those

Re: [Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [CI,1/6] drm/i915: Add ability for tracking buffer objects per client (rev5)

On 09/11/2023 23:54, Patchwork wrote: *Patch Details* *Series:* series starting with [CI,1/6] drm/i915: Add ability for tracking buffer objects per client (rev5) *URL:* https://patchwork.freedesktop.org/series/126064/ *State:*

Re: [Intel-gfx] [PATCH v3 1/1] drm/i915/xe2lpd: implement WA for underruns while enabling FBC

> -Original Message- > From: Intel-gfx On Behalf Of Vinod > Govindapillai > Sent: Thursday, November 9, 2023 12:25 AM > To: intel-gfx@lists.freedesktop.org > Cc: Syrjala, Ville > Subject: [Intel-gfx] [PATCH v3 1/1] drm/i915/xe2lpd: implement WA for > underruns while enabling FBC > >

[Intel-gfx] [PATCH 2/2] drm/i915: update in-source bug filing URLs

The bug filing documentation has been moved from the gitlab wiki to gitlab pages at https://drm.pages.freedesktop.org/intel-docs/. Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Tvrtko Ursulin Signed-off-by: Jani Nikula --- drivers/gpu/drm/i915/Kconfig | 2 +-

[Intel-gfx] [PATCH 1/2] MAINTAINERS: update drm/i915 W: and B: entries

The 01.org page has ceased to exist, and the relevant documentation is now hosted at https://drm.pages.freedesktop.org/intel-docs/ Cc: Joonas Lahtinen Cc: Rodrigo Vivi Cc: Tvrtko Ursulin Signed-off-by: Jani Nikula --- MAINTAINERS | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: abstract plane protection check (rev3)

== Series Details == Series: series starting with [1/2] drm/i915: abstract plane protection check (rev3) URL : https://patchwork.freedesktop.org/series/126205/ State : success == Summary == CI Bug Log - changes from CI_DRM_13859 -> Patchwork_126205v3

Re: [Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

On 10/11/2023 10:58, Dipam Turkar wrote: Making i915 use drm_gem_create_mmap_offset() instead of its custom implementations for associating GEM object with a fake offset. Does it compile? Regards, Tvrtko Signed-off-by: Dipam Turkar --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 192

[Intel-gfx] [PATCH] Remove custom dumb_map_offset implementations in i915 driver

Making i915 use drm_gem_create_mmap_offset() instead of its custom implementations for associating GEM object with a fake offset. Signed-off-by: Dipam Turkar --- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 192 --- drivers/gpu/drm/i915/gem/i915_gem_mman.h | 4 -

[Intel-gfx] [PATCH 11/11] drm/i915/dp_mst: Add support for forcing dsc fractional bpp via debugfs

If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff compressed bpp is fractional. Continue if the computed compressed bpp turns out to be a integer. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 14 +++--- 1 file changed, 11

[Intel-gfx] [PATCH 10/11] drm/i916/dp_mst: Iterate over the DSC bpps as per DSC precision support

Currently we iterate over the bpp_x16 in step of 16. Use DSC fractional bpp precision supported by the sink to compute the appropriate steps to iterate over the bpps. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 9 - 1 file changed, 8 insertions(+), 1

[Intel-gfx] [PATCH 09/11] drm/i915/dp_mst: Use precision of 1/16 for computing bpp

Modify the functions to deal with bpps with 1/16 precision. This will make way for cases when DSC with fractional bpp is used. For bpp without DSC, there is no change, as we still use whole numbers. Signed-off-by: Ankit Nautiyal --- drivers/gpu/drm/i915/display/intel_dp_mst.c | 56

[Intel-gfx] [PATCH 08/11] drm/i915/dsc: Allow DSC only with fractional bpp when forced from debugfs

From: Swati Sharma If force_dsc_fractional_bpp_en is set through debugfs allow DSC iff compressed bpp is fractional. Continue if the computed compressed bpp turns out to be a integer. v2: -Use helpers for fractional, integral bits of bits_per_pixel. (Suraj) -Fix comment (Suraj) Signed-off-by:

[Intel-gfx] [PATCH 07/11] drm/i915/dsc: Add debugfs entry to validate DSC fractional bpp

From: Swati Sharma DSC_Sink_BPP_Precision entry is added to i915_dsc_fec_support_show to depict sink's precision. Also, new debugfs entry is created to enforce fractional bpp. If Force_DSC_Fractional_BPP_en is set then while iterating over output bpp with fractional step size we will continue if

[Intel-gfx] [PATCH 05/11] drm/i915/dsc/mtl: Add support for fractional bpp

From: Vandita Kulkarni Consider the fractional bpp while reading the qp values. v2: Use helpers for fractional, integral bits of bits_per_pixel. (Suraj) Signed-off-by: Vandita Kulkarni Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal Reviewed-by: Sui Jingfeng ---

[Intel-gfx] [PATCH 06/11] drm/i915/dp: Iterate over output bpp with fractional step size

This patch adds support to iterate over compressed output bpp as per the fractional step, supported by DP sink. v2: -Avoid ending up with compressed bpp, same as pipe bpp. (Stan) Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal Reviewed-by: Sui Jingfeng ---

[Intel-gfx] [PATCH 04/11] drm/i915/audio: Consider fractional vdsc bpp while computing tu_data

MTL+ supports fractional compressed bits_per_pixel, with precision of 1/16. This compressed bpp is stored in U6.4 format. Accommodate the precision during calculation of transfer unit data for hblank_early calculation. v2: -Fix tu_data calculation while dealing with U6.4 format. (Stan) v3: -Use

[Intel-gfx] [PATCH 03/11] drm/i915/display: Consider fractional vdsc bpp while computing m_n values

MTL+ supports fractional compressed bits_per_pixel, with precision of 1/16. This compressed bpp is stored in U6.4 format. Accommodate this precision while computing m_n values. v1: Replace the computation of 'data_clock' with 'data_clock = DIV_ROUND_UP(data_clock, 16).' (Sui Jingfeng). v2:

[Intel-gfx] [PATCH 02/11] drm/i915/display: Store compressed bpp in U6.4 format

DSC parameter bits_per_pixel is stored in U6.4 format. The 4 bits represent the fractional part of the bpp. Currently we use compressed_bpp member of dsc structure to store only the integral part of the bits_per_pixel. To store the full bits_per_pixel along with the fractional part, compressed_bpp

[Intel-gfx] [PATCH 01/11] drm/display/dp: Add helper function to get DSC bpp precision

Add helper to get the DSC bits_per_pixel precision for the DP sink. Signed-off-by: Ankit Nautiyal Reviewed-by: Suraj Kandpal Reviewed-by: Sui Jingfeng Acked-by: Maxime Ripard --- drivers/gpu/drm/display/drm_dp_helper.c | 27 + include/drm/display/drm_dp_helper.h |

[Intel-gfx] [PATCH 00/11] Add DSC fractional bpp support

This patch series adds support for DSC fractional compressed bpp for MTL+. The series starts with some fixes, followed by patches that lay groundwork to iterate over valid compressed bpps to select the 'best' compressed bpp with optimal link configuration (taken from upstream series:

Re: [Intel-gfx] [PATCH v9 1/6] drm/panelreplay: dpcd register definition for panelreplay

> -Original Message- > From: Nikula, Jani > Sent: Thursday, November 9, 2023 6:37 PM > To: Manna, Animesh ; intel- > g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org > Cc: Manna, Animesh ; Hogander, Jouni > ; Murthy, Arun R > Subject: Re: [PATCH v9 1/6] drm/panelreplay: dpcd

[Intel-gfx] [PATCH v1 1/1] drm/i915/xe2lpd: remove the FBC restriction if PSR2 is enabled

In earlier versions, FBC was restricted if PSR2 is enabled. From xe2lpd onwards no such restrictions are needed anymore. HSD: 14014305387 Signed-off-by: Vinod Govindapillai --- drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git

[Intel-gfx] [PATCH v1 0/1] drm/i915/xe2lpd: remove FBC restriction if PSR2 is enabled

FBC restriction when PSR2 is enabled can be removed in xe2lpd Vinod Govindapillai (1): drm/i915/xe2lpd: remove the FBC restriction if PSR2 is enabled drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.34.1

[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/dsb: DSB code refactoring (rev6)

== Series Details == Series: drm/i915/dsb: DSB code refactoring (rev6) URL : https://patchwork.freedesktop.org/series/124141/ State : failure == Summary == CI Bug Log - changes from CI_DRM_13859 -> Patchwork_124141v6 Summary ---

[Intel-gfx] [PATCH] drm/i915/display: Remove dead code around intel_atomic_helper->free_list

After switching to directly using dma_fence instead of i915_sw_fence we have left some dead code around intel_atomic_helper->free_list. Remove that dead code. Signed-off-by: Jouni Högander --- drivers/gpu/drm/i915/display/intel_display.c | 20 ---

[Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915/dsb: DSB code refactoring (rev6)

== Series Details == Series: drm/i915/dsb: DSB code refactoring (rev6) URL : https://patchwork.freedesktop.org/series/124141/ State : warning == Summary == Error: dim sparse failed Sparse version: v0.6.2 Fast mode used, each commit won't be checked separately.

[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915/dsb: DSB code refactoring (rev6)

== Series Details == Series: drm/i915/dsb: DSB code refactoring (rev6) URL : https://patchwork.freedesktop.org/series/124141/ State : warning == Summary == Error: dim checkpatch failed 90ae7c5b3904 drm/i915/dsb: DSB code refactoring Traceback (most recent call last): File