Re: [Intel-gfx] [PATCH i-g-t 3/3] debugger: No longer rely on compatability define in intel_bufmgr.h

if (scratch_bo == NULL) { fprintf(stderr, "Couldn't flink buffer\n"); abort(); The series looks good to me, but keep in mind that we never actually made this work after Sandybridge, and even there, nobody ever ran it but me :-) Reviewe

Re: [Intel-gfx] Question about CCS modifier on GLK

On 17-12-17 22:45:13, Gabriel Krisman Bertazi wrote: Hi Ben and list folks, I've been investigating some CI failures with the kms_ccs testcase in the GLK hardware. The original bug is linked below, but there are other more basic tests failing when trying CCS on pipe C.

Re: [Intel-gfx] [PATCH] i915: Reject CCS modifiers for pipe C on Geminilake

on GLK for pipe C (see bug 104096). A relevant discussion is archived at: https://lists.freedesktop.org/archives/intel-gfx/2017-December/150646.html Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=104096 Signed-off-by: Gabriel Krisman Bertazi <kris...@collabora.co.uk> Cc: Ben Widaw

Re: [Intel-gfx] [PATCH i-g-t v5 6/6] tests/kms_ccs: Test case for wrong aux buffer stride size

.co.uk> [snip] Reviewed-by: Ben Widawsky <b...@bwidawsk.net> ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH v3] drm/i915: Remove unsafe i915.enable_rc6

On 17-11-01 18:09:47, Joonas Lahtinen wrote: + Kimmo and Paul On Wed, 2017-11-01 at 07:43 -0700, Ben Widawsky wrote: On 17-11-01 14:07:28, Joonas Lahtinen wrote: > On Mon, 2017-10-30 at 10:48 -0700, Rodrigo Vivi wrote: > > On Mon, Oct 30, 2017 at 01:00:51PM +, David Weineh

Re: [Intel-gfx] [PATCH v3] drm/i915: Remove unsafe i915.enable_rc6

willing to forego power savings. The real problem I see is that we don't test without rc6 in our setup, which indeed makes it unsafe. As such, I see the other option here going back to the ability to toggle rc6 after load (either module parameter, or make it sysfs), and actually run some subset of our workloads with RC6. I suspect people will poop on that suggestion, but I figured I'd mention. -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH i-g-t v4 6/6] tests/kms_ccs: Test case for wrong aux buffer stride size

On 17-09-27 15:34:19, Gabriel Krisman Bertazi wrote: Two scenarios tested: - unaligned stride - Stride too small Signed-off-by: Gabriel Krisman Bertazi Jason, could you provide your opinion on this? I've always felt the kernel interface shouldn't be validating

Re: [Intel-gfx] [PATCH i-g-t v4 5/6] tests/kms_ccs: Test case where CCS is on a different BO

On 17-09-27 15:34:18, Gabriel Krisman Bertazi wrote: Signed-off-by: Gabriel Krisman Bertazi Did someone recommend this test? While we have some hardware limitations on current generations that make it difficult to use multiple BOs, it's certainly not impossible, and

Re: [Intel-gfx] [PATCH i-g-t v4 4/6] tests/kms_ccs: Test case where the CCS buffer was not provided

On 17-09-27 15:34:17, Gabriel Krisman Bertazi wrote: Signed-off-by: Gabriel Krisman Bertazi --- tests/kms_ccs.c | 37 +++-- 1 file changed, 27 insertions(+), 10 deletions(-) diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c index

Re: [Intel-gfx] [PATCH i-g-t v4 3/6] tests/kms_ccs: Prevent segfault if pipe is not supported

-basic: CRASH (0.004s) Signed-off-by: Gabriel Krisman Bertazi <kris...@collabora.co.uk> 1-3 so far are Reviewed-by: Ben Widawsky <b...@bwidawsk.net> --- tests/kms_ccs.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/kms_ccs.c b/tests/kms_ccs.c index 775c6999699f..73025a1

Re: [Intel-gfx] [RFC 10/11] drm/i915: Export engine stats API to other users

iginal discussion -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [PATCH 03/12] drm/i915: Switch over to the LLC/eLLC hotspot avoidance hash mode for CCS

gnment for all compressed resources even though there are still plenty of stale comments in the spec suggesting that we do. We do need to make sure every hardware unit that deals with the compressed data uses the same hash mode. Cc: Ben Widawsky <b...@bwidawsk.net> Cc: Jason Ekstrand <ja...

Re: [Intel-gfx] [RFC 10/11] drm/i915: Export engine stats API to other users

rtko.ursu...@intel.com> Cc: Ben Widawsky <benjamin.widaw...@intel.com> Cc: Ben Widawsky <b...@bwidawsk.net> Acked-by: Ben Widawsky <benjamin.widaw...@intel.com> Acked-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_engine_cs.c | 3 +++ 1 file changed, 3 ins

Re: [Intel-gfx] [PATCH v9 1/5] drm/i915: Factor out setup_private_pat()

inen <joonas.lahti...@linux.intel.com> Signed-off-by: Zhi Wang <zhi.a.w...@intel.com> Reviewed-by: Ben Widawsky <benjamin.widaw...@intel.com> --- drivers/gpu/drm/i915/i915_gem_gtt.c | 20 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/drivers/gpu/drm/i9

Re: [Intel-gfx] [PATCH i-g-t] intel_l3_parity: More helpful output in case of errors

they can only be reached by expanding the tool and forgetting to handle new parameters, with an error message printed. CC: Ben Widawsky <benjamin.widaw...@intel.com> Signed-off-by: Petri Latvala <petri.latv...@intel.com> --- tools/intel_l3_parity.c | 12 +--- 1 file changed,

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Fail addfb ioctl if color and CCS buffers overlap

On 17-08-31 16:52:15, Gabriel Krisman Bertazi wrote: With this patch the new testcase igt@kms_ccs@pipe-X-invalid-ccs-offset succeeds. Signed-off-by: Gabriel Krisman Bertazi --- drivers/gpu/drm/i915/intel_display.c | 5 + 1 file changed, 5 insertions(+) diff --git

Re: [Intel-gfx] [PATCH 1/2] drm: Fix example comment of format modifier blob

ormats = 0x7c * */ __u64 formats; -- hex(0x1f << 98) '0x7c' Reviewed-by: Ben Widawsky <b...@bwidawsk.net> ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freed

Re: [Intel-gfx] [PATCH 02/12] drm/i915: Skip fence alignemnt check for the CCS plane

check for the aux plane. Cc: Ben Widawsky <b...@bwidawsk.net> Cc: Jason Ekstrand <ja...@jlekstrand.net> Cc: Daniel Stone <dani...@collabora.com> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com> --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion

Re: [Intel-gfx] [PATCH 03/12] drm/i915: Switch over to the LLC/eLLC hotspot avoidance hash mode for CCS

a uses the same hash mode. Cc: Ben Widawsky <b...@bwidawsk.net> Cc: Jason Ekstrand <ja...@jlekstrand.net> Cc: Daniel Stone <dani...@collabora.com> Signed-off-by: Ville Syrjälä <ville.syrj...@linux.intel.com> --- drivers/gpu/drm/i915/i915_reg.h| 8 +++- drivers/gpu/d

Re: [Intel-gfx] [PATCH 05/12] drm/i915: Nuke a pointless unreachable()

This was specifically requested by Emil. On 17-08-24 22:10:53, Ville Syrjälä wrote: From: Ville Syrjälä <ville.syrj...@linux.intel.com> The unreachable() is very much unreachable and the compiler knows that, so there's no point in having it. Cc: Ben Widawsky <b...@bwidawsk.net&g

Re: [Intel-gfx] [PATCH] i915, drm/fourcc: Improve the CCS modifier documentation

y know how it works yet. Trying to fully describe it is premature. Signed-off-by: Jason Ekstrand <ja...@jlekstrand.net> Cc: Ben Widawsky <b...@bwidawsk.net> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> --- include/uapi/drm/drm_fourcc.h | 35 ++- 1

Re: [Intel-gfx] [PATCH] tests/kms_ccs: Fix the color/ccs surface generation

documented in the PRM. By keeping everything CCS cache-line aligned, our chances of generating correct data for an arbitrary-size surface are much higher. Signed-off-by: Jason Ekstrand <jason.ekstr...@intel.com> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Cc: Ben Widawsky <

Re: [Intel-gfx] [PATCH 6/6] [v4] drm/i915: Add support for CCS modifiers

On 17-08-03 12:00:56, Daniel Stone wrote: Hi, On 1 August 2017 at 17:58, Ben Widawsky <b...@bwidawsk.net> wrote: @@ -1240,6 +1253,19 @@ intel_sprite_plane_create(struct drm_i915_private *dev_priv, plane_formats = skl_plane_formats; num_plane_f

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Add support for CCS modifiers

On 17-08-03 10:08:51, Daniel Vetter wrote: On Wed, Aug 2, 2017 at 5:43 PM, Ben Widawsky <b...@bwidawsk.net> wrote: On 17-08-02 12:14:15, Daniel Vetter wrote: On Tue, Aug 01, 2017 at 09:14:50AM -0700, Ben Widawsky wrote: On 17-07-31 10:29:55, Daniel Vetter wrote: > On Sat, Jul 29, 2

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Add support for CCS modifiers

On 17-08-02 12:14:15, Daniel Vetter wrote: On Tue, Aug 01, 2017 at 09:14:50AM -0700, Ben Widawsky wrote: On 17-07-31 10:29:55, Daniel Vetter wrote: > On Sat, Jul 29, 2017 at 09:25:50AM -0700, Ben Widawsky wrote: > > On 17-07-29 13:53:10, Daniel Stone wrote: > > > Hi Ben, >

Re: [Intel-gfx] [PATCH 6/6] [v4] drm/i915: Add support for CCS modifiers

On 17-08-01 15:43:50, Kenneth Graunke wrote: On Tuesday, August 1, 2017 9:58:17 AM PDT Ben Widawsky wrote: v2: - Support sprite plane. - Support pipe C/D limitation on GEN9. v3: - Rename structure (Ville) - Handle GLK (Ville) v4: - Fix PIPE_C check, introduced in v2 (Daniel

Re: [Intel-gfx] [PATCH 0/4] Userptr bo slab use optimization

Vulkan is critically dependent on userptr, but I don't believe we create many usrptr BOs as the implementation and API reduce the number of BOs in general. I don't see any reason not to do any of this though. Series is Acked-by: Ben Widawsky <b...@bwidawsk.net> As an introduction, t

[Intel-gfx] [PATCH 6/6] [v4] drm/i915: Add support for CCS modifiers

lanet.net> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_display.c | 30 +++--- drivers/gpu/drm/i915/intel_sprite.c | 28 +++- 2 files changed, 54 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/

[Intel-gfx] [PATCH 5/6] [v10] drm/i915: Add format modifiers for Intel

gmail.com> Reviewed-by: Emil Velikov <emil.l.veli...@gmail.com> (v8) Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_display.c | 127 +-- drivers/gpu/drm/i915/intel_drv.h | 1 - drivers/gpu/drm/i9

[Intel-gfx] [PATCH 4/6] [v5] drm: Create a format/modifier blob

(Ville) Make BUILD_BUG_ON for blob header size Cc: Rob Clark <robdcl...@gmail.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> Reviewed-by: Daniel Stone <dani...@collabora.com> (v2) Reviewed-by: Liviu Dudau <li...@du

[Intel-gfx] [PATCH 2/6] drm/i915: Add render decompression support

etter <dan...@ffwll.ch> * Ben Widawsky <b...@bwidawsk.net> v2: Deal with display workarounds 0390, 0531, 1125 (Paulo) v3: Pretend CCS tiles are regular 128 byte wide Y tiles (Jason) Put the AUX register defines to the correct place Fix up the slightly bo

[Intel-gfx] [PATCH 3/6] [v7] drm: Plumb modifiers through plane init

ent adjustments (Liviu) v5: Some new platforms added due to rebase v6: Add some missed plane inits (or maybe they're new - who knows at this point) (Daniel) v7: Add sun8i (Daniel) Signed-off-by: Ben Widawsky <b...@bwidawsk.net> Reviewed-by: Daniel Stone <dani...@collabora.com> (v2) Reviewed-

[Intel-gfx] [PATCH 1/6] drm/i915: Implement .get_format_info() hook for CCS

paring the pointers. But that does sound a bit wasteful space wise. v2: Drop the 'dev' argument from the hook v3: Include the description of the CCS surface layout v4: Pretend CCS tiles are regular 128 byte wide Y tiles (Jason) Cc: Daniel Vetter <dan...@ffwll.ch> Cc: Ben

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Add support for CCS modifiers

On 17-07-31 10:29:55, Daniel Vetter wrote: On Sat, Jul 29, 2017 at 09:25:50AM -0700, Ben Widawsky wrote: On 17-07-29 13:53:10, Daniel Stone wrote: > Hi Ben, > > On 26 July 2017 at 19:08, Ben Widawsky <b...@bwidawsk.net> wrote: > > + } else if (INT

Re: [Intel-gfx] [PATCH 6/6] drm/i915: Add support for CCS modifiers

On 17-07-29 13:53:10, Daniel Stone wrote: Hi Ben, On 26 July 2017 at 19:08, Ben Widawsky <b...@bwidawsk.net> wrote: + } else if (INTEL_GEN(dev_priv) >= 9) { intel_primary_formats = skl_primary_formats; num_formats = ARRAY_SIZE(skl_primar

[Intel-gfx] [PATCH 5/6] drm/i915: Add format modifiers for Intel

<emil.l.veli...@gmail.com> (v8) Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_display.c | 127 +-- drivers/gpu/drm/i915/intel_drv.h | 1 - drivers/gpu/drm/i915/intel_sprite.c | 141 +

[Intel-gfx] [PATCH 4/6] drm: Create a format/modifier blob

(Ville) Make BUILD_BUG_ON for blob header size Cc: Rob Clark <robdcl...@gmail.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> Reviewed-by: Daniel Stone <dani...@collabora.com> (v2) Reviewed-by: Liviu Dudau <li...@du

[Intel-gfx] [PATCH 6/6] drm/i915: Add support for CCS modifiers

v2: Support sprite plane. Support pipe C/D limitation on GEN9. v3: Rename structure (Ville) Handle GLK (Ville) This requires rebase on the correct Ville patches Cc: Daniel Stone <dani...@collabora.com> Cc: Kristian Høgsberg <k...@bitplanet.net> Signed-off-by: Ben Widawsky <b.

[Intel-gfx] [PATCH 2/6] drm/i915: Add render decompression support

etter <dan...@ffwll.ch> * Ben Widawsky <b...@bwidawsk.net> v2: Deal with display workarounds 0390, 0531, 1125 (Paulo) v3: Pretend CCS tiles are regular 128 byte wide Y tiles (Jason) Put the AUX register defines to the correct place Fix up the slightly bo

[Intel-gfx] [PATCH 3/6] drm: Plumb modifiers through plane init

ent adjustments (Liviu) v5: Some new platforms added due to rebase v6: Add some missed plane inits (or maybe they're new - who knows at this point) (Daniel) v7: Add sun8i (Daniel) Signed-off-by: Ben Widawsky <b...@bwidawsk.net> Reviewed-by: Daniel Stone <dani...@collabora.com> (v2) Reviewed-

[Intel-gfx] [PATCH 1/6] drm/i915: Implement .get_format_info() hook for CCS

paring the pointers. But that does sound a bit wasteful space wise. v2: Drop the 'dev' argument from the hook v3: Include the description of the CCS surface layout v4: Pretend CCS tiles are regular 128 byte wide Y tiles (Jason) Cc: Daniel Vetter <dan...@ffwll.ch> Cc: Ben

Re: [Intel-gfx] [RFC 12/14] drm/i915: Interface for controling engine stats collection

included, so we could perhaps leave room for per-engine. -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [RFC 07/14] drm/i915/pmu: Add fake regs

perf_event_overflow(event, , NULL); + perf_event_overflow(event, , regs); period = max_t(u64, 1, event->hw.sample_period); hrtimer_forward_now(hrtimer, ns_to_ktime(period)); -- 2.9.4 -- Ben Widawsky, Intel Open Source Technology Center _

Re: [Intel-gfx] [RFC 04/14] drm/i915/pmu: Decouple uAPI engine ids

= ARRAY_SIZE(user_engine_map))) { + /* Do nothing */ + } else { + engine = user_engine_map[engine]; + val = i915->engine[engine]->pmu_sample[sample]; + } } else switch (event->attr.config) { case I91

Re: [Intel-gfx] [RFC 01/14] RFC drm/i915: Expose a PMU interface for perf queries

PMU_REQUESTED_FREQUENCY 33 This one seems less than useful. +#define I915_PMU_ENERGY 34 +#define I915_PMU_INTERRUPTS 35 + +#define I915_PMU_RC6_RESIDENCY 40 +#define I915_PMU_RC6p_RESIDENCY41 +#define I915_PMU_RC6pp_RESIDENCY 42 + /* Each region is a minimum of 16k, and ther

[Intel-gfx] [PATCH 3/4] drm/i915: Add format modifiers for Intel

<emil.l.veli...@gmail.com> (v8) Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_display.c | 127 +-- drivers/gpu/drm/i915/intel_drv.h | 1 - drivers/gpu/drm/i915/intel_sprite.c | 141 +

[Intel-gfx] [PATCH 4/4] drm/i915: Add support for CCS modifiers

v2: Support sprite plane. Support pipe C/D limitation on GEN9. v3: Rename structure (Ville) Handle GLK (Ville) This requires rebase on the correct Ville patches Cc: Daniel Stone <dani...@collabora.com> Cc: Kristian Høgsberg <k...@bitplanet.net> Signed-off-by: Ben Widawsky <b.

[Intel-gfx] [PATCH 2/4] drm: Create a format/modifier blob

(Ville) Make BUILD_BUG_ON for blob header size Cc: Rob Clark <robdcl...@gmail.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> Reviewed-by: Daniel Stone <dani...@collabora.com> (v2) Reviewed-by: Liviu Dudau <li...@du

[Intel-gfx] [PATCH 0/4] [v2] Blobifiers (FKA GET_PLANE2)

. This interface will allow clients to create buffers for scanout with a good set of modifiers, and later import those buffers (through EGL already, and Vulkan WSI later) into a graphics runtime. EGL/WSI will provide similar interfaces for rendering - modifiers which can be used for rendering. Ben Widawsky (4

[Intel-gfx] [PATCH 1/4] drm: Plumb modifiers through plane init

ent adjustments (Liviu) v5: Some new platforms added due to rebase v6: Add some missed plane inits (or maybe they're new - who knows at this point) (Daniel) Signed-off-by: Ben Widawsky <b...@bwidawsk.net> Reviewed-by: Daniel Stone <dani...@collabora.com> (v2) Reviewed-by: Liviu Dudau <l

Re: [Intel-gfx] [PATCH 4/4] drm/i915: Add support for CCS modifiers

On 17-06-29 23:02:08, Ville Syrjälä wrote: On Fri, Jun 23, 2017 at 09:45:44AM -0700, Ben Widawsky wrote: v2: Support sprite plane. Support pipe C/D limitation on GEN9. This requires rebase on the correct Ville patches Cc: Daniel Stone <dani...@collabora.com> Cc: Kristian Høgsb

Re: [Intel-gfx] [PATCH 3/3] intel: Make driver aware of MOCS table version

On 17-07-07 09:28:08, Jason Ekstrand wrote: On Thu, Jul 6, 2017 at 4:27 PM, Ben Widawsky <b...@bwidawsk.net> wrote: We don't yet have optimal MOCS settings, but we have enough to know how to at least determine when we might have non-optimal settings within our driver. Signed-off-b

Re: [Intel-gfx] [PATCH 2/4] drm: Create a format/modifier blob

On 17-07-14 22:10:15, Ville Syrjälä wrote: On Fri, Jul 14, 2017 at 11:41:49AM -0700, Ben Widawsky wrote: On 17-06-29 22:49:44, Ville Syrjälä wrote: [snip] > >... but here it's ALIGN(formats_offset+formats_size). I think we should >be aligning the same thing in both cases,

Re: [Intel-gfx] Skylake / (EE) modeset(0): present flip failed loop

Marc, please file a bug on freedesktop.org. We expect the modesetting driver to work well and if it's not, it should have a bug associated with it. Sorry for your frustration. On 17-07-17 12:22:00, Marc MERLIN wrote: Ok, there must be a problem, sent 5 messages to the list with clear details

Re: [Intel-gfx] [PATCH 2/4] drm: Create a format/modifier blob

what you want. BUILD_BUG_ON sounds good to me regardless. [snip] -- Ben Widawsky, Intel Open Source Technology Center ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Re: [Intel-gfx] [Mesa-dev] [PATCH 1/1] drm/i915: Version the MOCS settings

On 17-07-07 09:23:26, Jason Ekstrand wrote: On Fri, Jul 7, 2017 at 3:34 AM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: Quoting Ben Widawsky (2017-07-07 00:27:01) > drivers/gpu/drm/i915/i915_drv.c | 3 +++ > drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i91

Re: [Intel-gfx] [PATCH 1/1] drm/i915: Version the MOCS settings

On 17-07-07 11:34:48, Chris Wilson wrote: Quoting Ben Widawsky (2017-07-07 00:27:01) drivers/gpu/drm/i915/i915_drv.c | 3 +++ drivers/gpu/drm/i915/i915_drv.h | 2 ++ drivers/gpu/drm/i915/i915_pci.c | 13 + include/uapi/drm/i915_drm.h | 8 4 files changed, 22

Re: [Intel-gfx] [PATCH] drm/i915/cnl: Gen10 render context size.

On 17-07-06 14:06:24, Vivi, Rodrigo wrote: No change on render context size is required for Gen10. So this patch doesn't change the default behaviour, but only avoid the missing_case message. Cc: Ben Widawsky <benjamin.widaw...@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.v...@

[Intel-gfx] [PATCH 0/3] MOCS versioning

b5bc24e988 Author: Ben Widawsky <benjamin.widaw...@intel.com> Date: Fri Apr 8 10:21:16 2016 -0700 i965: Use PTE mocs Signed-off-by: Ben Widawsky <benjamin.widaw...@intel.com> diff --git a/src/mesa/drivers/dri/i965/brw_mocs.c b/src/mesa/drivers/dri/i965/brw_mocs.c index

[Intel-gfx] [PATCH 1/1] drm/i915: Version the MOCS settings

From: Ben Widawsky <benjamin.widaw...@intel.com> Starting with GEN9, Memory Object Control State (MOCS) becomes an index into a table as opposed to the direct programming within the command. The table has 62 usable entries (ie 6 bits can represent all settings), and each buffer type may u

[Intel-gfx] [PATCH 3/3] intel: Make driver aware of MOCS table version

We don't yet have optimal MOCS settings, but we have enough to know how to at least determine when we might have non-optimal settings within our driver. Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- src/intel/vulkan/anv_device.c | 12 src/intel/vulkan/anv_pri

[Intel-gfx] [PATCH 2/3] intel: Merge latest i915 uapi

Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- src/intel/drm/i915_drm.h | 8 1 file changed, 8 insertions(+) diff --git a/src/intel/drm/i915_drm.h b/src/intel/drm/i915_drm.h index c26bf7c125..69e38ce89f 100644 --- a/src/intel/drm/i915_drm.h +++ b/src/intel/drm/i915_drm.h @@

[Intel-gfx] [PATCH 3/4] drm/i915: Add format modifiers for Intel

com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_display.c | 136 +-- drivers/gpu/drm/i915/intel_sprite.c | 82 - 2 files changed, 211 insertions(+), 7 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_

[Intel-gfx] [PATCH 4/4] drm/i915: Add support for CCS modifiers

v2: Support sprite plane. Support pipe C/D limitation on GEN9. This requires rebase on the correct Ville patches Cc: Daniel Stone <dani...@collabora.com> Cc: Kristian Høgsberg <k...@bitplanet.net> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/in

[Intel-gfx] [PATCH 2/4] drm: Create a format/modifier blob

viu) * Fix data types (Ben) * Make the blob part of uapi (Daniel) v3: Remove unused ret field. Change i, and j to unsigned int (Emil) v4: Use plane->modifier_count instead of recounting (Daniel) Cc: Rob Clark <robdcl...@gmail.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com>

[Intel-gfx] [PATCH v4 0/4] Blobifiers (FKA GET_PLANE2)

of things came up and it took a while to spin this rev. Nothing was missing intentionally. [1] The bitmask is used to show the connection between which modifiers are supported by which formats. Ben Widawsky (4): drm: Plumb modifiers through plane init drm: Create a format/modifier blob drm

[Intel-gfx] [PATCH 1/4] drm: Plumb modifiers through plane init

ent adjustments (Liviu) v5: Some new platforms added due to rebase v6: Add some missed plane inits (or maybe they're new - who knows at this point) (Daniel) Signed-off-by: Ben Widawsky <b...@bwidawsk.net> Reviewed-by: Daniel Stone <dani...@collabora.com> (v2) Reviewed-by: Liviu Dudau <l

Re: [Intel-gfx] [PATCH] i965/CFL: Add PCI Ids for Coffee Lake.

On 17-06-22 10:42:45, Srivatsa, Anusha wrote: Coffee Lake has a gen9 graphics following KBL. From 3D perspective, CFL is a clone of KBL/SKL features. v2: Change commit message, correct alignment v3: Update IDs. v4: Initialize l3_banks, correct nomenclature Cc: Anuj Phogat

Re: [Intel-gfx] [PATCH v5 3/3] drm/i915: Add format modifiers for Intel

On 17-05-17 01:20:50, Emil Velikov wrote: Hi Ben, A couple of small questions/suggestions that I hope you find useful. Please don't block any of this work based on my comments. On 16 May 2017 at 22:31, Ben Widawsky <b...@bwidawsk.net> wrote: +stati

Re: [Intel-gfx] [PATCH v2 2/3] drm: Create a format/modifier blob

On 17-05-17 01:06:16, Emil Velikov wrote: Hi Ben, On 16 May 2017 at 22:31, Ben Widawsky <b...@bwidawsk.net> wrote: Updated blob layout (Rob, Daniel, Kristian, xerpi) v2: * Removed __packed, and alignment (.+) * Fix indent in drm_format_modifier fields (Liviu) * Remove duplicated modifie

Re: [Intel-gfx] [PATCH v3 1/3] drm: Plumb modifiers through plane init

On 17-05-17 11:17:57, Liviu Dudau wrote: On Tue, May 16, 2017 at 02:31:24PM -0700, Ben Widawsky wrote: This is the plumbing for supporting fb modifiers on planes. Modifiers have already been introduced to some extent, but this series will extend this to allow querying modifiers per plane. Based

Re: [Intel-gfx] [PATCH 2/3] drm: Create a format/modifier blob

On 17-05-17 13:31:44, Daniel Vetter wrote: On Tue, May 16, 2017 at 02:19:12PM -0700, Ben Widawsky wrote: On 17-05-03 17:08:27, Daniel Vetter wrote: > On Tue, May 02, 2017 at 10:14:27PM -0700, Ben Widawsky wrote: > > +struct drm_format_modifier_blob { > > +#define FORMAT

[Intel-gfx] [PATCH v5 3/3] drm/i915: Add format modifiers for Intel

yrj...@linux.intel.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_display.c | 131 +-- drivers/gpu/drm/i915/intel_sprite.c | 76 +++- 2 files changed, 20

[Intel-gfx] [PATCH v3 1/3] drm: Plumb modifiers through plane init

viu.du...@arm.com> Reviewed-by: Daniel Stone <dani...@collabora.com> (v2) Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/arc/arcpgu_crtc.c | 1 + drivers/gpu/drm/arm/hdlcd_crtc.c| 1 + drivers/gpu/drm/arm/malidp_planes.c |

[Intel-gfx] [PATCH v2 2/3] drm: Create a format/modifier blob

viu) * Fix data types (Ben) * Make the blob part of uapi (Daniel) Cc: Rob Clark <robdcl...@gmail.com> Cc: Daniel Stone <dani...@collabora.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com> Cc: Liviu Dudau <li...@dudau.co.uk> Signed-off-by: Ben Widawsky <b...@bwidawsk.

Re: [Intel-gfx] [PATCH 2/3] drm: Create a format/modifier blob

On 17-05-03 17:08:27, Daniel Vetter wrote: On Tue, May 02, 2017 at 10:14:27PM -0700, Ben Widawsky wrote: Updated blob layout (Rob, Daniel, Kristian, xerpi) Cc: Rob Clark <robdcl...@gmail.com> Cc: Daniel Stone <dani...@collabora.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.

Re: [Intel-gfx] [PATCH 2/3] drm: Create a format/modifier blob

On 17-05-03 14:15:15, Liviu Dudau wrote: On Tue, May 02, 2017 at 10:14:27PM -0700, Ben Widawsky wrote: Updated blob layout (Rob, Daniel, Kristian, xerpi) Cc: Rob Clark <robdcl...@gmail.com> Cc: Daniel Stone <dani...@collabora.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.

Re: [Intel-gfx] [PATCH 1/3] drm: Plumb modifiers through plane init

On 17-05-10 18:24:52, Liviu Dudau wrote: On Wed, May 10, 2017 at 09:34:40AM -0700, Ben Widawsky wrote: On 17-05-03 18:30:07, Liviu Dudau wrote: > On Wed, May 03, 2017 at 06:45:05PM +0200, Daniel Vetter wrote: > > On Wed, May 03, 2017 at 03:52:23PM +0100, Liviu Dudau wrote: > > &

Re: [Intel-gfx] [PATCH 1/3] drm: Plumb modifiers through plane init

f producing AFBC data, so there might be another driver in the making that will be open source. Best regards, Liviu But besides that, it works perfectly fine for arm render compression format too. -Daniel -- Daniel Vetter Software Engineer, Intel Corporation http://blog.ffwll.ch -- So are

Re: [Intel-gfx] [PATCH 1/3] drm: Plumb modifiers through plane init

On 17-05-03 14:45:26, Daniel Stone wrote: Hi Liviu, On 3 May 2017 at 11:34, Liviu Dudau <liviu.du...@arm.com> wrote: On Tue, May 02, 2017 at 10:14:26PM -0700, Ben Widawsky wrote: v2: A minor addition from Daniel You are *really* pushing your luck by not Cc-ing *any* of the maint

[Intel-gfx] [PATCH 3/3] drm/i915: Add format modifiers for Intel

yrj...@linux.intel.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_display.c | 131 +-- drivers/gpu/drm/i915/intel_sprite.c | 76 +++- 2 files changed, 20

[Intel-gfx] [PATCH 2/3] drm: Create a format/modifier blob

Updated blob layout (Rob, Daniel, Kristian, xerpi) Cc: Rob Clark <robdcl...@gmail.com> Cc: Daniel Stone <dani...@collabora.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/drm_mode_config.c |

[Intel-gfx] [PATCH 1/3] drm: Plumb modifiers through plane init

v2: A minor addition from Daniel Cc: Daniel Stone <dani...@collabora.com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/arc/arcpgu_crtc.c | 1 + drivers/gpu/drm/arm/hdlcd_crtc.c| 1 + drivers/gpu/drm/arm/malidp_planes.c

Re: [Intel-gfx] [PATCH 21/67] drm/i915/cnl: Update the context size

On 17-04-06 14:53:50, Ceraolo Spurio, Daniele wrote: On 06/04/17 12:15, Rodrigo Vivi wrote: From: Ben Widawsky <benjamin.widaw...@intel.com> The docs are not yet correct, so I cannot provide a reference to it. In the current docs, the size is actually smaller than SKL. This seems un

[Intel-gfx] [PATCH 3/3] [v5] drm/i915: Add format modifiers for Intel

yrj...@linux.intel.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_display.c | 132 +-- drivers/gpu/drm/i915/intel_sprite.c | 76 +++- 2 files changed, 20

[Intel-gfx] [PATCH] squash! drm/i915: Add format modifiers for Intel

make sprite and cursor have separate functions --- Ville, I think this addresses most of your comments. I'm guessing you're going to ask for separate gen sprite plane functions, but I think this looks pretty decent as is. --- drivers/gpu/drm/i915/intel_display.c | 26 --

Re: [Intel-gfx] [PATCH 3/3] drm/i915: Add format modifiers for Intel

On 17-03-29 23:17:13, Ville Syrjälä wrote: On Fri, Mar 24, 2017 at 02:29:50PM -0700, Ben Widawsky wrote: This was based on a patch originally by Kristian. It has been modified pretty heavily to use the new callbacks from the previous patch. v2: - Add LINEAR and Yf modifiers to list (Ville

[Intel-gfx] [PATCH 1/3] drm/i915: Use LINEAR modifier instead of NONE

They're the same, so use the one which makes more sense. Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/intel_display.c | 28 ++-- 1 file changed, 14 insertions(+), 14 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drive

[Intel-gfx] [PATCH 2/3] drm: Add new DRM_IOCTL_MODE_GETPLANE2

ntel.com> Cc: Daniel Stone <dan...@fooishbar.org> Cc: "Kristian H. Kristensen" <hoegsb...@gmail.com> References: https://patchwork.kernel.org/patch/9482393/ Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/arc/arcpgu_crtc.c

[Intel-gfx] [PATCH 3/3] drm/i915: Add format modifiers for Intel

) v3: - Handle cursor formats (Ville) - Put handling for LINEAR in the mod_support functions (Ville) Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Cc: Kristian H. Kristensen <hoegsb...@gmail.com> Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/i915/int

Re: [Intel-gfx] [PATCH 2/5] drm: Remove fb hsub/vsub alignment requirement

upport. So let's just lift the restriction. Let's start to round up when computing the color plane dimesions so that we'll not end up with too low an estimate for the memory requirements and whatnot. Cc: Ben Widawsky <b...@bwidawsk.net> Cc: Jason Ekstrand <ja...@jlekstrand.net> Si

Re: [Intel-gfx] [01/15] drm/i915: Copy user requested buffers into the error state

On 17-03-21 16:23:05, Tahvanainen, Jari wrote: See below [Jari]... -Original Message- From: Ben Widawsky [mailto:b...@bwidawsk.net] Sent: Tuesday, March 21, 2017 5:38 PM To: Tahvanainen, Jari <jari.tahvanai...@intel.com> Cc: Chris Wilson <ch...@chris-wilson.co.uk>

Re: [Intel-gfx] [01/15] drm/i915: Copy user requested buffers into the error state

: Chris Wilson [mailto:ch...@chris-wilson.co.uk] Sent: Thursday, March 16, 2017 3:20 PM To: intel-gfx@lists.freedesktop.org Cc: Ben Widawsky <b...@bwidawsk.net> Subject: [01/15] drm/i915: Copy user requested buffers into the error state Introduce a new execobject.flag (EXEC_OBJECT_CAPTURE) that use

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Add render decompression support

On 17-03-01 12:51:17, Ville Syrjälä wrote: On Tue, Feb 28, 2017 at 03:20:38PM -0800, Ben Widawsky wrote: On 17-02-28 12:18:39, Jason Ekstrand wrote: >I've said it before but reading through Ben's patches again make me want to >be peskier about it. I would really like the UABI to

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Add render decompression support

. Also not all planes will be capable of scanning out compressed surfaces, and eg. 90/270 degree rotation is not supported in combination with decompression either. This patch may contain work from at least the following people: * Vandana Kannan <vandana.kan...@intel.com> * Daniel Vetter <

Re: [Intel-gfx] [PATCH v2 9/9] drm/i915: Add render decompression support

. Also not all planes will be capable of scanning out compressed surfaces, and eg. 90/270 degree rotation is not supported in combination with decompression either. This patch may contain work from at least the following people: * Vandana Kannan <vandana.kan...@intel.com> * Daniel Vetter <

Re: [Intel-gfx] [PATCH 01/15] drm/i915: Copy user requested buffers into the error state

discretion, the contents of the error state. although compressed, are allocated with GFP_ATOMIC (i.e. limited) and kept for all eternity (until the error state is destroyed). Based on an earlier patch by Ben Widawsky <b...@bwidawsk.net> Signed-off-by: Chris Wilson <ch...@chris-wilson.co.uk

Re: [Intel-gfx] [PATCH 8/9] drm/i915: Implement .get_format_info() hook for CCS

it wasteful space wise. > > v2: Drop the 'dev' argument from the hook > v3: Include the description of the CCS surface layout > > Cc: Vandana Kannan <vandana.kan...@intel.com> > Cc: Daniel Vetter <dan...@ffwll.ch> > Cc: Ben Widawsky <b...@bwidawsk.net> >

Re: [Intel-gfx] [PATCH] drm/i915: Force uncached PPAT for debugging purposes.

suspect on this table let's provide a mechanism to disable these cache leves on this private table (PPAT). Cc: Ben Widawsky <benjamin.widaw...@intel.com> Cc: Daniele Ceraolo Spurio <daniele.ceraolospu...@intel.com> Signed-off-by: Rodrigo Vivi <rodrigo.v...@intel.com> I think t

[Intel-gfx] [PATCH 1/3] [v3] drm: Add new DRM_IOCTL_MODE_GETPLANE2

n...@fooishbar.org> Cc: "Kristian H. Kristensen" <hoegsb...@gmail.com> References: https://patchwork.kernel.org/patch/9482393/ Signed-off-by: Ben Widawsky <b...@bwidawsk.net> --- drivers/gpu/drm/arc/arcpgu_crtc.c | 1 + drivers/gpu/drm/arm/hdlcd_crtc.c

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