[Intel-gfx] [PATCH 2/3] pwm: lpss: Add intel-gfx as consumer device in lookup table

...@linux.intel.com Tested-by: Lluís Batlle i Rossell <vi...@viric.name> Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/pwm/pwm-lpss-platform.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/pwm/pwm-lpss-platform.c b/drivers/pwm/pwm-lpss-platform.c i

[Intel-gfx] [PATCH 3/3] drm/i915: Add support for LPSS PWM on devices that support it

v2: Add bugzilla links Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=96571 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90075 Cc: cbroo...@gmail.com Cc: jani.nik...@linux.intel.com Tested-by: Lluís Batlle i Rossell <vi...@viric.name> Signed-off-by: Shobhit Kumar <s

[Intel-gfx] [PATCH 0/3] Reviving the PWM_LPSS patches yet again

be again tested with latest drm-tip. Module ordering problem remains still and for testing we should for now enable LPSS_PWM as in built with i915 as module. Regards Shobhit Shobhit Kumar (3): drm/i915: Encapsulate the pwm_device in a pwm_info structure pwm: lpss: Add intel-gfx as consumer device

[Intel-gfx] [PATCH 1/3] drm/i915: Encapsulate the pwm_device in a pwm_info structure

/show_bug.cgi?id=96571 Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=90075 Cc: cbroo...@gmail.com Cc: jani.nik...@linux.intel.com Tested-by: Lluís Batlle i Rossell <vi...@viric.name> Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/intel_drv.h | 8

Re: [Intel-gfx] [PATCH] drm/i915: Return -EPROBE_DEFER if we cannot get GPIO or PWM in dsi_init

On Sat, Jul 16, 2016 at 3:12 AM, Stephen J <stephenj...@gmail.com> wrote: > On Fri, Jul 15, 2016 at 3:08 AM, Shobhit Kumar <ku...@shobhit.info> wrote: >> >> On Fri, Jul 15, 2016 at 2:33 PM, Shobhit Kumar <shobhit.ku...@intel.com> >> wrote: >> > On

Re: [Intel-gfx] [PATCH] drm/i915: Return -EPROBE_DEFER if we cannot get GPIO or PWM in dsi_init

On Fri, Jul 15, 2016 at 2:33 PM, Shobhit Kumar <shobhit.ku...@intel.com> wrote: > On devices that have MIPI DSI panel control and PWM control comming from > CRC PMIC, we need the gpio and pwm exported from the intel_soc_pmic > driver. Defer probing for later in case we fail to ge

[Intel-gfx] [PATCH] drm/i915: Return -EPROBE_DEFER if we cannot get GPIO or PWM in dsi_init

missed out Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/i915_drv.c | 4 drivers/gpu/drm/i915/i915_drv.h | 2 +- drivers/gpu/drm/i915/intel_display.c | 25 +++-- drivers/gpu/drm/i915/intel_drv.h | 2 +- drivers/g

Re: [Intel-gfx] [RFC v2] drm/i915/chv: Clip cursor for CHV pipe C HW Cursor pos < 0

On Wed, Jun 29, 2016 at 6:24 PM, Shobhit Kumar <shobhit.ku...@linux.intel.com> wrote: > > From: Shobhit Kumar <shobhit.ku...@intel.com> > > CHV pipe C hits underrun when we get negative crtc_x values of cursor. > To avoid this we clip and shift the cursor image by nega

Re: [Intel-gfx] [RFC v2] drm/i915/chv: Clip cursor for CHV pipe C HW Cursor pos < 0

On 06/29/2016 06:24 PM, Shobhit Kumar wrote: From: Shobhit Kumar <shobhit.ku...@intel.com> CHV pipe C hits underrun when we get negative crtc_x values of cursor. To avoid this we clip and shift the cursor image by negative crtc_x value. v2: Make a copy of cursor plane state and alloca

Re: [Intel-gfx] [RFC v2] drm/i915/chv: Clip cursor for CHV pipe C HW Cursor pos < 0

On 06/29/2016 06:24 PM, Shobhit Kumar wrote: From: Shobhit Kumar <shobhit.ku...@intel.com> CHV pipe C hits underrun when we get negative crtc_x values of cursor. To avoid this we clip and shift the cursor image by negative crtc_x value. v2: Make a copy of cursor plane state and alloca

[Intel-gfx] [RFC v2] drm/i915/chv: Clip cursor for CHV pipe C HW Cursor pos < 0

From: Shobhit Kumar <shobhit.ku...@intel.com> CHV pipe C hits underrun when we get negative crtc_x values of cursor. To avoid this we clip and shift the cursor image by negative crtc_x value. v2: Make a copy of cursor plane state and allocate new gem object and fb for clipped cursor a

Re: [Intel-gfx] [RFC] drm/i915/chv: Clip cursor for CHV pipe C HW Cursor pos < 0

Daniel, On 06/28/2016 05:57 PM, Shobhit Kumar wrote: From: Shobhit Kumar <shobhit.ku...@intel.com> CHV pipe C hits underrun when we get negative crtc_x values of cursor. To avoid this we clip and shift the cursor image by negative crtc_x value. v2: Make a copy of cursor plane

[Intel-gfx] [RFC] drm/i915/chv: Clip cursor for CHV pipe C HW Cursor pos < 0

From: Shobhit Kumar <shobhit.ku...@intel.com> CHV pipe C hits underrun when we get negative crtc_x values of cursor. To avoid this we clip and shift the cursor image by negative crtc_x value. v2: Make a copy of cursor plane state and allocate new gem object and fb for clipped cursor a

Re: [Intel-gfx] [PATCH 2/2] drm/i915: Crop cursor image for CHV pipe C cursor issue

On Mon, Jun 13, 2016 at 7:52 PM, Daniel Vetter wrote: > On Fri, Jun 10, 2016 at 03:14:36PM +0530, Agrawal, Akshu wrote: >> On 6/8/2016 2:10 PM, Daniel Vetter wrote: >> > On Wed, Jun 08, 2016 at 01:57:44PM +0530, Akshu Agrawal wrote: >> > > CHV pipe C hits underrun when we get -ve

Re: [Intel-gfx] [PATCH v5 45/46] drm: i915: switch to the atomic PWM API

should be replaced by pwm_apply_state(). Signed-off-by: Boris Brezillon <boris.brezil...@free-electrons.com> Reviewed-by: Jani Nikula <jani.nik...@intel.com> Cc: Shobhit, any additional comments? Looks good to me. Reviewed-by: Shobhit Kumar <shobhit.ku...@intel.com> --

[Intel-gfx] [v2 3/6] drm/i915/skl+: calculate plane pixel rate

From: "Kumar, Mahesh" Don't use pipe pixel rate for plane pixel rate. Calculate plane pixel according to formula adjusted plane_pixel_rate = adjusted pipe_pixel_rate * downscale ammount downscale amount = max[1, src_h/dst_h] * max[1, src_w/dst_w] if 90/270 rotation use

[Intel-gfx] [v2 2/6] drm/i915/skl+: calculate ddb minimum allocation

From: "Kumar, Mahesh" don't always use 8 ddb as minimum, instead calculate using proper algorithm. v2: optimizations as per Matt's comments. Cc: matthew.d.ro...@intel.com Signed-off-by: Kumar, Mahesh --- drivers/gpu/drm/i915/intel_pm.c | 50

[Intel-gfx] [v2 4/6] drm/i915/skl+: Use scaling amount for plane data rate calculation

From: "Kumar, Mahesh" if downscaling is enabled plane data rate increases according to scaling amount. take scaling amount under consideration while calculating plane data rate v2: Address Matt's comments, where data rate was overridden because of missing else. Cc:

[Intel-gfx] [v2 1/6] drm/i915/skl+: Use plane size for relative data rate calculation

From: "Kumar, Mahesh" Use plane size for relative data rate calculation. don't always use pipe source width & height. adjust height & width according to rotation. use plane size for watermark calculations also. v2: Address Matt's comments. Use

[Intel-gfx] [v2 5/6] drm/i915: Add support to parse DMI table and get platform memory info

Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/i915_dma.c | 47 + drivers/gpu/drm/i915/i915_drv.h | 6 ++ 2 files changed, 53 insertions(+) diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915

[Intel-gfx] [v2 6/6] drm/i915/skl: WA for watermark calculation based on Arbitrated Display BW

ing enabled, double the scan lines v2: Update the commit message to explain the WA (shobhit) v3: - Address Damien's comment, use DIV_ROUND_UP_ULL macro - Check both mem_speed and mem_channel to be valid before applying WA(shobhit) Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> Sig

Re: [Intel-gfx] [PATCH 0/7] Misc WM fixes and Arbitrated Display Bandwidth WA for SKL

On Fri, Jan 15, 2016 at 10:32 AM, Kumar, Shobhit < shobhit.ku...@linux.intel.com> wrote: > On 01/15/2016 07:18 AM, Matt Roper wrote: > >> On Thu, Jan 14, 2016 at 05:32:41PM +0530, Shobhit Kumar wrote: >> >>> Hi, >>> This series add a set of upda

[Intel-gfx] [PATCH] drm/i915: Retry few time if gpiod_get fails during intel_dsi_init

enable) and PWM both are exported by same intel_soc_pmic driver, just retrying for the driver to load in intel_dsi_init is sufficient. By the time we come to setup_backlight, pwm would have been exported as well. Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/dr

[Intel-gfx] [PATCH 1/7] drm/i915/skl+: Use proper bytes_per_pixel during WM calculation

From: "Kumar, Mahesh" Don't always use bytes_per_pixel using y_plane=0, instead use it according to pixel format. If NV12 use y_plane eqal to 1 Signed-off-by: Kumar, Mahesh --- drivers/gpu/drm/i915/intel_pm.c | 4 +++- 1 file changed, 3

[Intel-gfx] [PATCH 6/7] drm/i915: Add support to parse DMI table and get platform memory info

This is needed for WM computation workaround for arbitrated display bandwidth. Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/i915_dma.c | 19 +++ drivers/gpu/drm/i915/i915_drv.h | 6 ++ 2 files changed, 25 insertions(+) diff --git a/d

[Intel-gfx] [PATCH 4/7] drm/i915/skl+: calculate plane pixel rate.

From: "Kumar, Mahesh" Don't use pipe pixel rate for plane pixel rate. Calculate plane pixel according to formula adjusted plane_pixel_rate = adjusted pipe_pixel_rate * downscale ammount downscale amount = max[1, src_h/dst_h] * max[1, src_w/dst_w] if 90/270 rotation use

[Intel-gfx] [PATCH 0/7] Misc WM fixes and Arbitrated Display Bandwidth WA for SKL

by patches from Matt, or can be re-used if deemed necessary. Especially "drm/i915/skl+: Use fb size for relative data rate calculation" this already addresses some of Ville's comment on similar patch from Matt. Regards Shobhit Kumar, Mahesh (6): drm/i915/skl+: Use proper bytes_per_pixel

[Intel-gfx] [PATCH 5/7] drm/i915/skl+: Use scaling amount for plane data rate calculation

From: "Kumar, Mahesh" Signed-off-by: Kumar, Mahesh --- drivers/gpu/drm/i915/intel_pm.c | 12 +--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index

[Intel-gfx] [PATCH 2/7] drm/i915/skl+: Use fb size for relative data rate calculation

From: "Kumar, Mahesh" Use FB size for relative data rate calculation. don't always use pipe source width & height. adjust height & width according to rotation. Signed-off-by: Kumar, Mahesh --- drivers/gpu/drm/i915/intel_pm.c | 42

[Intel-gfx] [PATCH 3/7] drm/i915/skl+: calculate ddb minimum allocation

From: "Kumar, Mahesh" don't always use 8 ddb as minimum, instead calculate using proper algorithm. Signed-off-by: Kumar, Mahesh --- drivers/gpu/drm/i915/intel_pm.c | 57 +++-- 1 file changed, 55

[Intel-gfx] [PATCH 7/7] drm/i915/skl: WA for watermark calculation based on Arbitrated Display BW

ing enabled, double the scan lines v2: Update the commit message to explain the WA (shobhit) Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> Signed-off-by: Kumar, Mahesh <mahesh1.ku...@intel.com> --- drivers/gpu/drm/i915/i915_drv.h | 9 + drive

[Intel-gfx] [PATCH 1/3] drm/i915: Encapsulate the pwm_device in a pwm_info structure

pwm_info helps in encapsulating the PWM period_ns values and will form basis of adding new pwm devices which can then be genrically used by initializing proper pwm_info structure in the backlight setup call. Cc: cbroo...@gmail.com Cc: jani.nik...@linux.intel.com Signed-off-by: Shobhit Kumar

[Intel-gfx] [PATCH 0/3] LPSS PWM support for devices that support it

est the patches and see if they work at all for you. For testing Please enable - CONFIG_PWM_LPSS=y CONFIG_PWM_LPSS_PLATFORM=y Regards Shobhit Shobhit Kumar (3): drm/i915: Encapsulate the pwm_device in a pwm_info structure pwm: lpss: Add intel-gfx as consumer device in lookup table drm/i915:

[Intel-gfx] [PATCH 2/3] pwm: lpss: Add intel-gfx as consumer device in lookup table

Cc: cbroo...@gmail.com Cc: jani.nik...@linux.intel.com Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/pwm/pwm-lpss-platform.c | 8 1 file changed, 8 insertions(+) diff --git a/drivers/pwm/pwm-lpss-platform.c b/drivers/pwm/pwm-lpss-platform.c index 54433fc..9

[Intel-gfx] [PATCH 3/3] drm/i915: Add support for LPSS PWM on devices that support it

Cc: cbroo...@gmail.com Cc: jani.nik...@linux.intel.com Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/intel_panel.c | 16 +++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_panel.c b/drivers/gpu/dr

[Intel-gfx] [PATCH] drm/i915: Wait for PP cycle delay only if panel is in power off sequence

During resume, while turning the EDP panel power on, we need not wait blindly for panel_power_cycle_delay. Check if panel power down sequence in progress and then only wait. This improves our resume time significantly. Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/g

Re: [Intel-gfx] [PATCH] drm/i915: Wait for PP cycle delay only if panel is in power off sequence

On Wed, Dec 9, 2015 at 8:34 PM, Chris Wilson <ch...@chris-wilson.co.uk> wrote: > On Wed, Dec 09, 2015 at 08:07:10PM +0530, Shobhit Kumar wrote: >> On Wed, Dec 9, 2015 at 7:27 PM, Ville Syrjälä >> <ville.syrj...@linux.intel.com> wrote: >> > On Wed, Dec 09, 201

[Intel-gfx] [v3] drm/i915/skl: While sanitizing cdclock check the SWF18 as well

. Remaining are reserved (Siva) Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_display.c | 8 2 files changed, 11 insertions(+) diff --git a

[Intel-gfx] [v4] drm/i915/skl: While sanitizing cdclock check the SWF18 as well

. Remaining are reserved (Siva) v4: Use ILK_SWF macro for SWF register definitions. Taken from Ville's patch http://lists.freedesktop.org/archives/intel-gfx/2015-November/079480.html Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Signed-off-by: Shobhit Kumar <shobhit.ku...@

[Intel-gfx] [v2] drm/i915/skl: While sanitizing cdclock check the SWF18 as well

if SWF18 is set and then follow through with other DPLL and CDCLK verification. If not set then for sure we need to sanitize the cdclock. v2: Update the commit message for clarity (Siva) Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com>

[Intel-gfx] [PATCH] CDCLOCK Sanitization continued for SKL

directly from CDCLK_CTL (no pre-os display). That is not part of this patch. Shobhit Kumar (1): drm/i915/skl: While sanitizing cdclock check the SWF18 as well drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_display.c | 8 2 files changed, 11 insertions

[Intel-gfx] [PATCH] drm/i915/skl: While sanitizing cdclock check the SWF18 as well

with other DPLL and CDCLK verification. Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/i915_reg.h | 3 +++ drivers/gpu/drm/i915/intel_display.c | 8 2 files changed, 11 insertions(+)

[Intel-gfx] [v4] drm/i915/skl: If needed sanitize bios programmed cdclk

<imre.d...@intel.com> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 4 ++-- drivers/gpu/drm/i915/intel_display.c | 31 +++ drivers/gpu/drm/i915/in

[Intel-gfx] [v3] drm/i915/skl: If needed sanitize bios programmed cdclk

and what it is expected - Only do slk_init_cdclk if validation failed else reuse BIOS programmed value v3: Move the validation logic in a separate sanitize function (Ville) Cc: Imre Deak <imre.d...@intel.com> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Signed-off-by: S

[Intel-gfx] [v2] drm/i915/skl: Init cdclk in the driver rather than relying on pre-os

it is expected - Only do slk_init_cdclk if validation failed else reuse BIOS programmed value Cc: Imre Deak <imre.d...@intel.com> Cc: Ville Syrjälä <ville.syrj...@linux.intel.com> Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/in

[Intel-gfx] [PATCH] drm/i915/skl: Init cdclk in the driver rather than relying on pre-os

Mostly reuse what is programmed by pre-os, but in case there is no pre-os initialization, init the cdclk with the default value. Cc: Imre Deak <imre.d...@intel.com> Signed-off-by: Shobhit Kumar <shobhit.ku...@intel.com> --- drivers/gpu/drm/i915/intel_ddi.c | 6 ++ 1 fil

[Intel-gfx] [PATCH] mfd: Add GPIOLIB dependency if INTEL_SOC_PMIC is to be enabled

Author: Shobhit Kumar shobhit.ku...@intel.com Date: Fri Jun 26 14:32:05 2015 +0530 mfd: intel_soc_pmic_core: Add lookup table for Panel Control as GPIO signal On some Intel SoC platforms, the panel enable/disable signals are controlled by CRC PMIC. Add those

Re: [Intel-gfx] [v3 0/7] Crystalcove (CRC) PMIC based panel and pwm control

On Fri, Jul 10, 2015 at 6:36 PM, Shobhit Kumar ku...@shobhit.info wrote: On Mon, Jun 29, 2015 at 3:48 AM, Paul Gortmaker paul.gortma...@windriver.com wrote: [Re: [Intel-gfx] [v3 0/7] Crystalcove (CRC) PMIC based panel and pwm control] On 26/06/2015 (Fri 20:47) Ville Syrjälä wrote: On Fri

Re: [Intel-gfx] [v3 0/7] Crystalcove (CRC) PMIC based panel and pwm control

, 2015 at 02:32:03PM +0530, Shobhit Kumar wrote: Hi, Next update of the series reviewed at https://lkml.org/lkml/2015/6/22/155 Major changes are few review comments from Varka and Ville being addressed. Also except for intel-gfx patches, all patches reviesion history is moved out

Re: [Intel-gfx] [v3 0/7] Crystalcove (CRC) PMIC based panel and pwm control

On Fri, Jun 26, 2015 at 11:17 PM, Ville Syrjälä ville.syrj...@linux.intel.com wrote: On Fri, Jun 26, 2015 at 06:31:37PM +0200, Daniel Vetter wrote: On Fri, Jun 26, 2015 at 02:32:03PM +0530, Shobhit Kumar wrote: Hi, Next update of the series reviewed at https://lkml.org/lkml/2015/6/22/155

[Intel-gfx] [v3 7/7] drm/i915: Backlight control using CRC PMIC based PWM driver

: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Reviewed-by: Ville Syrjälä ville.syrj...@linux.intel.com Tested-by: Ville Syrjälä ville.syrj...@linux.intel.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpu/drm/i915/intel_drv.h | 4

[Intel-gfx] [v3 4/7] mfd: intel_soc_pmic_core: ADD PWM lookup table for CRC PMIC based PWM

Acked-by: Lee Jones lee.jo...@linaro.org Tested-by: Ville Syrjälä ville.syrj...@linux.intel.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- v2: Remove the lookup table on driver unload (Thierry) v3: Correct the subject line (Lee jones) drivers/mfd/intel_soc_pmic_core.c | 12

[Intel-gfx] [v3 0/7] Crystalcove (CRC) PMIC based panel and pwm control

. Regards Shobhit Shobhit Kumar (7): gpiolib: Add support for removing registered consumer lookup table mfd: intel_soc_pmic_core: Add lookup table for Panel Control as GPIO signal mfd: intel_soc_pmic_crc: Add PWM cell device for Crystalcove PMIC mfd: intel_soc_pmic_core: ADD PWM lookup

[Intel-gfx] [v3 3/7] mfd: intel_soc_pmic_crc: Add PWM cell device for Crystalcove PMIC

...@linux.intel.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- v2: Correct the subject line (Lee jones) drivers/mfd/intel_soc_pmic_crc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mfd/intel_soc_pmic_crc.c b/drivers/mfd/intel_soc_pmic_crc.c index 7436075..4a74948 100644

[Intel-gfx] [v3 1/7] gpiolib: Add support for removing registered consumer lookup table

Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Reviewed-by: Alexandre Courbot acour...@nvidia.com Reviewed-by: Linus Walleij linus.wall...@linaro.org Tested-by: Ville Syrjälä ville.syrj...@linux.intel.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- v2: Ccing maintainers

[Intel-gfx] [v3 2/7] mfd: intel_soc_pmic_core: Add lookup table for Panel Control as GPIO signal

...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Acked-by: Lee Jones lee.jo...@linaro.org Acked-by: Linus Walleij linus.wall...@linaro.org Tested-by: Ville Syrjälä ville.syrj...@linux.intel.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- v2: Make the lookup table static (Thierry

[Intel-gfx] [v3 5/7] pwm: crc: Add Crystalcove (CRC) PWM driver

linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Cc: Paul Bolle pebo...@tiscali.nl Cc: Paul Gortmaker paul.gortma...@windriver.com Tested-by: Ville Syrjälä ville.syrj...@linux.intel.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com

[Intel-gfx] [v3 6/7] drm/i915: Use the CRC gpio for panel enable/disable

-by: Jani Nikula jani.nik...@intel.com Tested-by: Ville Syrjälä ville.syrj...@linux.intel.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpu/drm/i915/intel_bios.h | 7 +++ drivers/gpu/drm/i915/intel_dsi.c | 32 ++-- drivers/gpu/drm/i915/intel_dsi.h

Re: [Intel-gfx] [v2 7/7] drm/i915: Backlight control using CRC PMIC based PWM driver

On Thu, Jun 25, 2015 at 6:17 PM, Ville Syrjälä ville.syrj...@linux.intel.com wrote: On Thu, Jun 25, 2015 at 05:38:50PM +0530, Shobhit Kumar wrote: On Thu, Jun 25, 2015 at 2:18 PM, Ville Syrjälä ville.syrj...@linux.intel.com wrote: On Mon, Jun 22, 2015 at 04:24:25PM +0530, Shobhit Kumar wrote

Re: [Intel-gfx] [v2 7/7] drm/i915: Backlight control using CRC PMIC based PWM driver

On Thu, Jun 25, 2015 at 2:18 PM, Ville Syrjälä ville.syrj...@linux.intel.com wrote: On Mon, Jun 22, 2015 at 04:24:25PM +0530, Shobhit Kumar wrote: Use the CRC PWM device in intel_panel.c and add new MIPI backlight specififc callbacks v2: Modify to use pwm_config callback v3: Addressed Jani's

Re: [Intel-gfx] [v2 4/7] mfd: intel_soc_pmic_core: ADD PWM lookup table for CRC PMIC based PWM

On Tue, Jun 23, 2015 at 12:49 PM, Lee Jones lee.jo...@linaro.org wrote: On Mon, 22 Jun 2015, Daniel Vetter wrote: On Mon, Jun 22, 2015 at 04:33:22PM +0530, Varka Bhadram wrote: Hi Shobhit Kumar, On 06/22/2015 04:24 PM, Shobhit Kumar wrote: On some BYT PLatform the PWM is controlled

Re: [Intel-gfx] [v2 5/7] pwm: crc: Add Crystalcove (CRC) PWM driver

On Mon, Jun 22, 2015 at 4:46 PM, Varka Bhadram varkabhad...@gmail.com wrote: Hi Shobhit Kumar, On 06/22/2015 04:24 PM, Shobhit Kumar wrote: The Crystalcove PMIC provides three PWM signals and this driver exports one of them on the BYT platform which is used to control backlight for DSI

[Intel-gfx] [v2 1/7] gpiolib: Add support for removing registered consumer lookup table

...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Reviewed-by: Alexandre Courbot acour...@nvidia.com Reviewed-by: Linus Walleij linus.wall...@linaro.org Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers

[Intel-gfx] [v2 2/7] mfd: intel_soc_pmic_core: Add lookup table for Panel Control as GPIO signal

-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/mfd/intel_soc_pmic_core.c | 17 + 1 file changed, 17 insertions(+) diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pmic_core.c index 7b50b6b..f3d918e 100644 --- a/drivers/mfd/intel_soc_pmic_core.c

[Intel-gfx] [v2 6/7] drm/i915: Use the CRC gpio for panel enable/disable

-by: Jani Nikula jani.nik...@intel.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpu/drm/i915/intel_bios.h | 7 +++ drivers/gpu/drm/i915/intel_dsi.c | 32 ++-- drivers/gpu/drm/i915/intel_dsi.h | 3 +++ 3 files changed, 40 insertions(+), 2

[Intel-gfx] [v2 5/7] pwm: crc: Add Crystalcove (CRC) PWM driver

: Paul Bolle pebo...@tiscali.nl Cc: Paul Gortmaker paul.gortma...@windriver.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/pwm/Kconfig | 7 +++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-crc.c | 155 ++ 3 files changed, 163

[Intel-gfx] [v2 3/7] mfd: intel_soc_pmic_crc: Add PWM cell device for Crystalcove PMIC

Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/mfd/intel_soc_pmic_crc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mfd/intel_soc_pmic_crc.c b/drivers/mfd/intel_soc_pmic_crc.c index 7436075..4a74948 100644 --- a/drivers/mfd/intel_soc_pmic_crc.c +++ b/drivers/mfd

[Intel-gfx] [v2 7/7] drm/i915: Backlight control using CRC PMIC based PWM driver

Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpu/drm/i915/intel_drv.h | 4 ++ drivers/gpu/drm/i915/intel_dsi.c | 6 +++ drivers/gpu/drm/i915/intel_panel.c | 95 -- 3 files changed, 100 insertions(+), 5 deletions(-) diff --git a/drivers

[Intel-gfx] [v2 4/7] mfd: intel_soc_pmic_core: ADD PWM lookup table for CRC PMIC based PWM

...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Acked-by: Lee Jones lee.jo...@linaro.org Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/mfd/intel_soc_pmic_core.c | 12 1 file changed, 12 insertions(+) diff --git

[Intel-gfx] [v2 0/7] Crystalcove (CRC) PMIC based panel and pwm control

/backlight/intel_backlight interface. Patches were also verified on android-x86 tree for AsusT100. Regards Shobhit Shobhit Kumar (7): gpiolib: Add support for removing registered consumer lookup table mfd: intel_soc_pmic_core: Add lookup table for Panel Control as GPIO signal mfd

Re: [Intel-gfx] [PATCH 6/8] drivers/pwm: Add Crystalcove (CRC) PWM driver

On Sat, Jun 20, 2015 at 11:34 PM, Paul Gortmaker paul.gortma...@windriver.com wrote: [Re: [Intel-gfx] [PATCH 6/8] drivers/pwm: Add Crystalcove (CRC) PWM driver] On 20/06/2015 (Sat 13:23) Paul Bolle wrote: [Added Paul Gortmaker.] Hi Shobhit, On Fri, 2015-06-19 at 12:16 +0530, Shobhit Kumar

Re: [Intel-gfx] [PATCH 6/8] drivers/pwm: Add Crystalcove (CRC) PWM driver

Hi Paul, On Fri, Jun 19, 2015 at 12:11 AM, Paul Bolle pebo...@tiscali.nl wrote: Hi Shobhit, On Thu, 2015-06-18 at 23:24 +0530, Shobhit Kumar wrote: On Fri, May 1, 2015 at 2:42 AM, Paul Bolle pebo...@tiscali.nl wrote: On Wed, 2015-04-29 at 19:30 +0530, Shobhit Kumar wrote: --- a/drivers

Re: [Intel-gfx] [PATCH 6/8] drivers/pwm: Add Crystalcove (CRC) PWM driver

On Fri, May 1, 2015 at 2:42 AM, Paul Bolle pebo...@tiscali.nl wrote: On Wed, 2015-04-29 at 19:30 +0530, Shobhit Kumar wrote: --- a/drivers/pwm/Kconfig +++ b/drivers/pwm/Kconfig +config PWM_CRC + bool Intel Crystalcove (CRC) PWM support + depends on X86 INTEL_SOC_PMIC + help

Re: [Intel-gfx] [PATCH 6/8] pwm: crc: Add Crystalcove (CRC) PWM driver

On Wed, May 20, 2015 at 8:39 PM, Shobhit Kumar ku...@shobhit.info wrote: On Thu, May 7, 2015 at 12:49 PM, Shobhit Kumar ku...@shobhit.info wrote: On Wed, May 6, 2015 at 5:44 PM, Thierry Reding thierry.red...@gmail.com wrote: On Tue, May 05, 2015 at 03:08:36PM +0530, Shobhit Kumar wrote

Re: [Intel-gfx] [PATCH 6/8] pwm: crc: Add Crystalcove (CRC) PWM driver

On Thu, May 7, 2015 at 12:49 PM, Shobhit Kumar ku...@shobhit.info wrote: On Wed, May 6, 2015 at 5:44 PM, Thierry Reding thierry.red...@gmail.com wrote: On Tue, May 05, 2015 at 03:08:36PM +0530, Shobhit Kumar wrote: The Crystalcove PMIC controls PWM signals and this driver exports that You

Re: [Intel-gfx] [PATCH 6/8] pwm: crc: Add Crystalcove (CRC) PWM driver

On Wed, May 6, 2015 at 5:44 PM, Thierry Reding thierry.red...@gmail.com wrote: On Tue, May 05, 2015 at 03:08:36PM +0530, Shobhit Kumar wrote: The Crystalcove PMIC controls PWM signals and this driver exports that You say signal_s_ here, but you only expose a single PWM device. Does the PMIC

Re: [Intel-gfx] [PATCH 6/8] pwm: crc: Add Crystalcove (CRC) PWM driver

On Wed, May 6, 2015 at 1:10 PM, Paul Bolle pebo...@tiscali.nl wrote: On Tue, 2015-05-05 at 15:08 +0530, Shobhit Kumar wrote: The Crystalcove PMIC controls PWM signals and this driver exports that capability as a PWM chip driver. This is platform device implementtaion of the drivers/mfd cell

[Intel-gfx] [PATCH 1/8] gpiolib: Add support for removing registered consumer lookup table

...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Reviewed-by: Alexandre Courbot acour...@nvidia.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpio/gpiolib.c | 13 + include/linux

[Intel-gfx] [PATCH 4/8] mfd: intel_soc_pmic_crc: Add PWM cell device for Crystalcove PMIC

Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/mfd/intel_soc_pmic_crc.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/mfd/intel_soc_pmic_crc.c b/drivers/mfd/intel_soc_pmic_crc.c index 4cc1b32..8839e25 100644 --- a/drivers/mfd/intel_soc_pmic_crc.c +++ b/drivers/mfd

[Intel-gfx] [PATCH 3/8] mfd: intel_soc_pmic_core: Add lookup table for Panel Control as GPIO signal

: Correct the subject line (Lee jones) CC: Samuel Ortiz sa...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Acked-by: Lee Jones lee.jo...@linaro.org Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com

[Intel-gfx] [PATCH 5/8] mfd: intel_soc_pmic_core: ADD PWM lookup table for CRC PMIC based PWM

...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Acked-by: Lee Jones lee.jo...@linaro.org Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/mfd/intel_soc_pmic_core.c | 12 1 file changed, 12 insertions(+) diff --git

Re: [Intel-gfx] [PATCH 5/8] drivers/mfd: ADD PWM lookup table for CRC PMIC based PWM

On 04/29/2015 07:54 PM, Lee Jones wrote: On Wed, 29 Apr 2015, Shobhit Kumar wrote: On some BYT PLatform the PWM is controlled using CRC PMIC. Add a lookup entry for the same to be used by the consumer (Intel GFX) v2: Remove the lookup table on driver unload (Thierry) CC: Samuel Ortiz sa

[Intel-gfx] [PATCH 2/8] pwm: core: Add support to remove registered consumer lookup tables

...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/pwm/core.c | 17 + include/linux/pwm.h | 5 + 2 files changed, 22 insertions(+) diff --git a/drivers/pwm/core.c b

[Intel-gfx] [PATCH 6/8] pwm: crc: Add Crystalcove (CRC) PWM driver

jones) CC: Samuel Ortiz sa...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/pwm/Kconfig | 7 +++ drivers/pwm/Makefile | 1 + drivers

Re: [Intel-gfx] [PATCH 3/8] drivers/mfd: Add lookup table for Panel Control as GPIO signal

On 04/29/2015 07:57 PM, Lee Jones wrote: On Wed, 29 Apr 2015, Shobhit Kumar wrote: On some Intel SoC platforms, the panel enable/disable signals are controlled by CRC PMIC. Add those control as a new GPIO in a lookup table for gpio-crystalcove chip during CRC driver load v2: Make

[Intel-gfx] [PATCH 7/8] drm/i915: Use the CRC gpio for panel enable/disable

(Ville) CC: Samuel Ortiz sa...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpu/drm/i915/intel_dsi.c | 32

[Intel-gfx] [PATCH 8/8] drm/i915: Backlight control using CRC PMIC based PWM driver

-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpu/drm/i915/intel_drv.h | 5 +++ drivers/gpu/drm/i915/intel_dsi.c | 6 +++ drivers/gpu/drm/i915/intel_panel.c | 92 +++--- 3 files changed, 98 insertions(+), 5 deletions(-) diff --git a/drivers/gpu

[Intel-gfx] [PATCH 4/8] drivers/mfd: Add PWM cell device for Crystalcove PMIC

Needed for PWM control suuported by the PMIC CC: Samuel Ortiz sa...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/mfd

[Intel-gfx] [PATCH 6/8] drivers/pwm: Add Crystalcove (CRC) PWM driver

...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/pwm/Kconfig | 7 +++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-crc.c | 171

[Intel-gfx] [PATCH 0/8] Crystalcove (CRC) PMIC based panel and pwm control

. This is now added in the generic panel backlight control infrastructure All these patches have been tested on AsusT100 and working fine using /sys/class/backlight/intel_backlight interface. Patches are also verified on android-x86 tree for AsusT100. Regards Shobhit Shobhit Kumar (8

[Intel-gfx] [PATCH 3/8] drivers/mfd: Add lookup table for Panel Control as GPIO signal

: Samuel Ortiz sa...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/mfd/intel_soc_pmic_core.c | 17 + 1 file changed, 17

[Intel-gfx] [PATCH 1/8] drivers/gpio/gpiolib: Add support for removing registered consumer lookup table

...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Reviewed-by: Alexandre Courbot acour...@nvidia.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpio/gpiolib.c | 13 + include/linux/gpio/machine.h | 1 + 2 files changed

[Intel-gfx] [PATCH 5/8] drivers/mfd: ADD PWM lookup table for CRC PMIC based PWM

...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/mfd/intel_soc_pmic_core.c | 12 1 file changed, 12 insertions(+) diff --git a/drivers/mfd/intel_soc_pmic_core.c b/drivers/mfd/intel_soc_pmic_core.c index f3d918e

[Intel-gfx] [PATCH 2/8] drivers/pwm/core: Add support to remove registered consumer lookup tables

...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/pwm/core.c | 17 + include/linux/pwm.h | 5 + 2 files changed, 22 insertions(+) diff --git a/drivers/pwm/core.c b/drivers/pwm/core.c index ba34c7d

[Intel-gfx] [RFC v6 6/8] drivers/pwm: Add Crystalcove (CRC) PWM driver

...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/pwm/Kconfig | 7 +++ drivers/pwm/Makefile | 1 + drivers/pwm/pwm-crc.c | 171

[Intel-gfx] [RFC v6 3/8] drivers/mfd: Add lookup table for Panel Control as GPIO signal

: Samuel Ortiz sa...@linux.intel.com Cc: Linus Walleij linus.wall...@linaro.org Cc: Alexandre Courbot gnu...@gmail.com Cc: Thierry Reding thierry.red...@gmail.com Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/mfd/intel_soc_pmic_core.c | 17 + 1 file changed, 17

[Intel-gfx] [RFC v6 8/8] drm/i915: Backlight control using CRC PMIC based PWM driver

-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpu/drm/i915/intel_drv.h | 5 +++ drivers/gpu/drm/i915/intel_dsi.c | 6 +++ drivers/gpu/drm/i915/intel_panel.c | 92 +++--- 3 files changed, 98 insertions(+), 5 deletions(-) diff --git a/drivers/gpu

[Intel-gfx] [RFC v6 0/8] Crystalcove (CRC) PMIC based panel and pwm control

in this case. That patch is for another day. Regards Shobhit Shobhit Kumar (8): drivers/gpio/gpiolib: Add support for removing registered consumer lookup table drivers/pwm/core: Add support to remove registered consumer lookup tables drivers/mfd: Add lookup table for Panel Control as GPIO

[Intel-gfx] [RFC v6 2/8] drivers/pwm/core: Add support to remove registered consumer lookup tables

In case some drivers are unloading, they can remove lookup tables which they would have registered during their load time to avoid redundant entries if loaded again Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/pwm/core.c | 17 + include/linux/pwm.h | 5

[Intel-gfx] [RFC v6 1/8] drivers/gpio/gpiolib: Add support for removing registered consumer lookup table

In case we unload and load a driver module again that is registering a lookup table, without this it will result in multiple entries. Provide an option to remove the lookup table on driver unload Signed-off-by: Shobhit Kumar shobhit.ku...@intel.com --- drivers/gpio/gpiolib.c | 13

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