The bspec has been updated with a new revision 0x1 that
translates to A1 GT stepping and C0 display stepping.
Bspec: 44477
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/intel_step.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpu/drm/i915/intel_step.c
b/drivers/gpu/drm
t;PCI/ASPM: Add pci_enable_link_state()")
Link: https://lore.kernel.org/linux-pci/zbjko%2fifuniws...@intel.com/
Signed-off-by: David E. Box
Signed-off-by: Swati Sharma
---
drivers/pci/controller/vmd.c | 2 +-
drivers/pci/pcie/aspm.c | 9 ++---
include/linux/pci.h | 5 +++--
drm_err(_priv->drm, "CPU pipe %c FIFO underrun\n",
pipe_name(pipe));
}
+ intel_fifo_underrun_inc_count(crtc, true);
intel_fbc_handle_fifo_underrun_irq(dev_priv);
}
--
~Swati Sharma
true;
ret = intel_dp_dsc_compute_params(_port->base, pipe_config);
if (ret < 0) {
--
~Swati Sharma
pe_audio.h
+++ b/drivers/gpu/drm/i915/display/intel_lpe_audio.h
@@ -8,15 +8,15 @@
#include
-enum pipe;
enum port;
+enum transcoder;
struct drm_i915_private;
int intel_lpe_audio_init(struct drm_i915_private *dev_priv); void
intel_lpe_audio_teardown(struct drm_i915_private *dev_priv); void
intel_lpe_audio_irq_handler(struct drm_i915_private *dev_priv); void
intel_lpe_audio_notify(struct drm_i915_private *dev_priv,
- enum pipe pipe, enum port port,
+ enum transcoder cpu_transcoder, enum port port,
const void *eld, int ls_clock, bool dp_output);
#endif /* __INTEL_LPE_AUDIO_H__ */
--
2.39.2
--
~Swati Sharma
Done. Thanks for the feedback. Next rev floated
https://patchwork.freedesktop.org/patch/522697/?series=113729=3
On 14-Feb-23 4:21 PM, Jani Nikula wrote:
On Tue, 14 Feb 2023, Swati Sharma wrote:
DSC_Output_Format_Sink_Support entry is added to i915_dsc_fec_support_show
to depict if sink
to intel_output_format_name() (Jani N)
-Return forced o/p format from intel_dp_output_format() (Jani N)
v3: -output_format_str[] to remain static (Jani N)
Signed-off-by: Swati Sharma
---
.../drm/i915/display/intel_crtc_state_dump.c | 4 +-
.../drm/i915/display/intel_crtc_state_dump.h | 2
to intel_output_format_name() (Jani N)
-Return forced o/p format from intel_dp_output_format() (Jani N)
Signed-off-by: Swati Sharma
---
.../drm/i915/display/intel_crtc_state_dump.c | 6 +-
.../drm/i915/display/intel_crtc_state_dump.h | 2 +
.../drm/i915/display/intel_display_debugfs.c | 77
Hi Jani,
Thanks for the reviews. Please find my replies inline.
On 07-Feb-23 2:05 PM, Jani Nikula wrote:
On Tue, 07 Feb 2023, Suraj Kandpal wrote:
From: Swati Sharma
DSC_Output_Format_Sink_Support entry is added to i915_dsc_fec_support_show
to depict if sink supports DSC output formats
From: Mohammed Khajapasha
Add a debugfs entry i915_fifo_underruns to indicate the count of
fifo underruns for each pipe.
Cc: Stanislav Lisovskiy
Signed-off-by: Mohammed Khajapasha
Signed-off-by: Swati Sharma
---
.../drm/i915/display/intel_display_debugfs.c | 28 ++
.../drm
From: Mohammed Khajapasha
Include pcode selftest for display to validate QGV points read.
Failure of this selftest indicates a bad firmware rather than regular
display issue.
Cc: Stanislav Lisovskiy
Cc: Matt Roper
Signed-off-by: Mohammed Khajapasha
Signed-off-by: Swati Sharma
---
drivers
Sharma
If force_dsc_ycbcr420_en is set through debugfs allow DSC iff
output_format is INTEL_OUTPUT_FORMAT_YCBCR420.
Squash this with the previous patch.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_dp.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu
and YCbCr420 output formats by the sink, our policy is to
try RGB first and fall back to YCbCr420, if mode cannot be shown
using RGB. So, to test other output formats like YCbCr420 or YCbCr444,
we need a debugfs entry (force_dsc_output_format) to force this
output format.
Signed-off-by: Swati Sharma
Thanks Jani/Manasi for the review comments.
Have addressed those in https://patchwork.freedesktop.org/patch/511033/
On 04-Nov-22 3:58 PM, Jani Nikula wrote:
On Thu, 03 Nov 2022, "Navare, Manasi" wrote:
On Thu, Nov 03, 2022 at 11:32:22AM +0530, Swati Sharma wrote:
Lets use RU
Use HAS_DSC(__i915) wrapper containing runtime info of has_dsc
member. Platforms supporting dsc has this flag enabled; no need of
DISPLAY_VER() check.
Also, simplified intel_dsc_source_support() based on above changes.
Suggested-by: Jani Nikula
Signed-off-by: Swati Sharma
---
drivers/gpu/drm
On 02-Nov-22 3:02 PM, Jani Nikula wrote:
On Wed, 02 Nov 2022, Swati Sharma wrote:
Hi Matt,
Yes. Though h/w supports DSC from gen10, DSC is enabled from gen11+ from
driver.
We can see "has_dsc" flag enabled in gen11+.
#define GEN11_FEATURES \
>---.__runtime.has_dsc
Lets use RUNTIME_INFO->has_dsc since platforms supporting dsc has this
flag enabled.
This is done based on the review comments received on
https://patchwork.freedesktop.org/patch/509393/
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_dp.c | 6 +++---
drivers/gpu/drm/i
amp;& cpu_transcoder != TRANSCODER_A)
return true;
So, we should align DISPLAY_VER check according to DSC enablement
from driver.
On 02-Nov-22 2:50 AM, Matt Roper wrote:
On Tue, Nov 01, 2022 at 01:29:27PM +0530, Swati Sharma wrote:
i915 driver supports DSC from DISPLAY_VE
i915 driver supports DSC from DISPLAY_VER >= 11. Fix it.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_dp.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm/i915/display/intel_dp.c
in
From: Suraj Kandpal
Implementation of VDSC for YCbCr420.
Signed-off-by: Suraj Kandpal
---
.../gpu/drm/i915/display/intel_qp_tables.c| 187 --
.../gpu/drm/i915/display/intel_qp_tables.h| 4 +-
drivers/gpu/drm/i915/display/intel_vdsc.c | 4 +-
3 files changed,
Removed extra newlines and did few styling fixes.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_display_debugfs.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
b/drivers/gpu/drm/i915/display
From: Suraj Kandpal
Now that we have laid the groundwork for YUV420 Enablement
we fill up native_420 field in vdsc_cfg and add appropriate
checks wherever required.
---v2
-adding native_422 field as 0 [Vandita]
-filling in second_line_bpg_offset, second_line_offset_adj
and nsl_bpg_offset in
From: Ankit Nautiyal
Go with DSC only if the given output_format is supported.
v2: Use drm helper to get DSC format support for sink.
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 28 +
1 file changed, 28 insertions(+)
diff --git
If force_dsc_ycbcr420_en is set through debugfs allow DSC iff
output_format is INTEL_OUTPUT_FORMAT_YCBCR420.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_dp.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_dp.c
b/drivers/gpu/drm
by the sink, our policy is to try RGB first
and fall back to YCbCr420, if mode cannot be shown using RGB.
So, to test YCbCr420, we need a debugfs entry (force_dsc_ycbcr420) to force this
output format; so that YCbCr420 code gets executed.
Signed-off-by: Swati Sharma
---
.../drm/i915/display
From: Suraj Kandpal
Adding new DSC register which are introducted MTL onwards
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/i915_reg.h | 28
1 file changed, 28 insertions(+)
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
/i915: Fill in native_420 field
Swati Sharma (3):
drm/i915/dsc: Add debugfs entry to validate DSC YCbCr420
drm/i915/dsc: Allow DSC only with YCbCr420 format when forced from
debugfs
drm/i915: Code styling fixes
drivers/gpu/drm/i915/display/icl_dsi.c| 2 -
.../drm/i915/display
From: Ankit Nautiyal
Add helper function to check if the DP sink supports DSC with the given
output format.
Signed-off-by: Ankit Nautiyal
---
include/drm/display/drm_dp_helper.h | 6 ++
1 file changed, 6 insertions(+)
diff --git a/include/drm/display/drm_dp_helper.h
This patch ideally should have been split into smaller functional
patches. Thoughts @jani nikula?
On 19-Sep-22 6:35 PM, Kandpal, Suraj wrote:
From: Suraj Kandpal
Adding support for writeback transcoder to start capturing frames using
interrupt mechanism
Signed-off-by: Suraj Kandpal
100644 drivers/gpu/drm/i915/display/intel_wd.h
--
~Swati Sharma
100644 drivers/gpu/drm/i915/display/intel_wd.c
create mode 100644 drivers/gpu/drm/i915/display/intel_wd.h
--
~Swati Sharma
Output dsc compressed bpp debufs entry is changed to
input bpc dsc to validate input bpc across various platforms.
Test-with: 20220831120849.28883-1-swati2.sha...@intel.com
Swati Sharma (1):
drm/i915/dsc: convert dsc debugfs entry from output_bpp to input_bpc
.../drm/i915/display
Convert dsc debugfs entry from output_bpp to input_bpc. The rationale
is to validate different input bpc across various platforms.
v2: -improved commit message (Jani N)
-styling fixes (Jani N)
Signed-off-by: Swati Sharma
---
.../drm/i915/display/intel_display_debugfs.c | 27
With this patch, converting DSC debugfs entry from output_bpp to input_bpc.
Corresponding changes are done in i-g-t to validate DSC with different
input bpc supported per platform.
Signed-off-by: Swati Sharma
---
.../drm/i915/display/intel_display_debugfs.c | 26 +--
.../drm
In this patch, output dsc compressed bpp debufs entry is changed to
input bpc dsc.
Also, corresponding changes done in kms_dsc i-g-t.
Test-with: 20220831120849.28883-1-swati2.sha...@intel.com
Swati Sharma (1):
drm/i915/display: convert dsc debugfs entry from output_bpp to
input_bpc
Add debug print statement to print scaler filter property
value. Since property can be set as either default or integer
scaler; its good if we can get debug print for the same in dmesg
log.
Cc: Juha-Pekka Heikkila
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display
tatus and
recovery")
Cc: Swati Sharma
Cc: Ankit Nautiyal
Cc: Uma Shankar (v2)
Cc: Jani Nikula
Cc: "Ville Syrj_l_"
Cc: Imre Deak
Cc: Manasi Navare
Cc: Uma Shankar
Cc: "Jos_ Roberto de Souza"
Cc: Sean Paul
Cc: # v5.12+
Link:
https://patchwork.freedesktop.org/patch
drm_dp_dpcd_read/write already has debug error message.
Drop redundant error messages which gives false
status even if correct value is read in drm_dp_dpcd_read().
Fixes: 9488a030ac91 ("drm/i915: Add support for enabling link status and
recovery")
Cc: Swati Sharma
Cc: Ankit Nautiya
drm_dp_dpcd_read/write already has debug error message.
Drop redundant error messages which gives false
status even if correct value is read in drm_dp_dpcd_read().
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_dp.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions
In this patch readout for AVI infoframes enclosed in GMP
DIP is implemented.
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c | 74 -
1 file changed, 72 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915
AVI IF, it
gives better control with source sending the infoframe by itself as
per HDMI/CTA spec. Minimum of version 3 need to be used for VIC >= 128
(i.e. for 8k mode as an example).
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_dp.c |
in source control mode.
Signed-off-by: Swati Sharma
Signed-off-by: Ankit Nautiyal
---
drivers/gpu/drm/i915/display/intel_hdmi.c | 8
drivers/gpu/drm/i915/display/intel_hdmi.h | 3 +++
2 files changed, 7 insertions(+), 4 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_hdmi.c
b
, found 0x0002)
Swati Sharma (3):
drm/i915: Export intel_hdmi_compute_avi_infoframe()
drm/i915: Sending AVI infoframe through GMP DIP
drm/i915: Implement readout for AVI infoframe SDP
drivers/gpu/drm/i915/display/intel_dp.c | 209 ++
drivers/gpu/drm/i915/display
of gamma cleanup
Signed-off-by: Swati Sharma
Reviewed-by: Mika Kahola
---
drivers/gpu/drm/i915/display/intel_color.c | 121 ++---
drivers/gpu/drm/i915/i915_reg.h| 6 +
2 files changed, 109 insertions(+), 18 deletions(-)
diff --git a/drivers/gpu/drm/i915/display
driver side.
Signed-off-by: Swati Sharma
Suggested-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_ddi.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 284219da7df8
are not
allocating the other instance. So, increase the log level to indicate there
could be an issue with driver/hardware.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_dsb.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/display
Only to print hw and sw lut values/channel.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index c7d0f37d8899..8f46c785f55a
()
[Ville]
-changed if-else to switch [Ville]
-removed intel_color_lut_entry_multi_equal() [Ville]
v7: -checkpatch warnings
v8: -rebased
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 113 +
drivers/gpu/drm/i915/i915_reg.h| 6 +
In this patch, enabled gamma state checker for ICL and TGL.
Limiting state checker only for super fine segment, since getting
incorrect readbacks for fine and coarse segments. Patch includes fix for
multiple colored screen during boot.
Swati Sharma (2):
[v8] drm/i915/color: Extract
Only to print hw and sw lut values/channel.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 926af86a75d5..5d84036d23ab
In this patch, enabled gamma state checker for ICL and TGL.
Limiting state checker only for super fine segment, since getting incorrect
readbacks for fine and coarse segments. Patch includes fix for multiple
colored screen during boot.
Swati Sharma (2):
[v7] drm/i915/color: Extract
()
[Ville]
-changed if-else to switch [Ville]
-removed intel_color_lut_entry_multi_equal() [Ville]
v7: -checkpatch warnings
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 113 +
drivers/gpu/drm/i915/i915_reg.h| 6 ++
2 files ch
()
[Ville]
-changed if-else to switch [Ville]
-removed intel_color_lut_entry_multi_equal() [Ville]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 114 +
drivers/gpu/drm/i915/i915_reg.h| 6 ++
2 files changed, 102 insertions(+), 18
In this patch, enabled gamma state checker for ICL and TGL.
Limiting state checker only for super fine segment, since getting incorrect
readbacks for fine and coarse segments. Patch includes fix for multiple
colored screen during boot.
Swati Sharma (2):
[v6] drm/i915/color: Extract
Only to print hw and sw lut values/channel.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 9f46d510aceb..3854f3fe965b
e, I guess
v4: -removed interpolated func for creating gamma lut values
-removed readouts of fine and coarse segments, failure to read PAL_PREC_DATA
correctly
v5: -added gamma_enable check inside read_luts()
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_col
Ville]
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111809
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=111885
Tested-by: Jani Saarinen
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 21 ++---
1 file changed, 18 insertions(+), 3 deletions(-)
diff
Only to print hw and sw lut values/channel.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 614e0ad386ca..6dd0bd3aca37
for ICL and TGL
Swati Sharma (4):
[v3] drm/i915/color: fix broken gamma state-checker during boot
[v2] drm/i915/color: move check of gamma_enable to specific
func/platform
[v5] drm/i915/color: Extract icl_read_luts()
FOR_TESTING_ONLY: Print rgb values of hw and sw blobs
drivers/gpu/drm/i915
Moved common code to check gamma_enable to specific funcs per platform
in bit_precision func. icl doesn't support that and chv has separate
enable knob for CGM LUT.
v2:
-Simplified chv_gamma_precision() [Ville]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 12
for ICL and TGL
Swati Sharma (4):
[v2] drm/i915/color: fix broken gamma state-checker during boot
drm/i915/color: move check of gamma_enable to specific func/platform
[v5] drm/i915/color: Extract icl_read_luts()
FOR_TESTING_ONLY: Print rgb values of hw and sw blobs
drivers/gpu/drm/i915/display
e, I guess
v4: -removed interpolated func for creating gamma lut values
-removed readouts of fine and coarse segments, failure to read PAL_PREC_DATA
correctly
v5: -added gamma_enable check inside read_luts()
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_col
Only to print hw and sw lut values/channel.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 168e9daae3de..2b8706dba746
Moved common code to check gamma_enable to specific funcs per platform
in bit_precision func. icl doesn't support that and chv has separate
enable knob for CGM LUT.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 23 +-
1 file changed, 18
ug.cgi?id=111885
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 27 +++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 9ab3490266
?id=111809
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_display.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_display.c
b/drivers/gpu/drm/i915/display/intel_display.c
index f1328c08f4ad..f89aa4bb9f42 100
This reverts commit 84af7649188194a74cdd6437235a5e3c86108f0f.
This is causing problems with the display, displays are all
bright colors.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 126 +++--
drivers/gpu/drm/i915/i915_reg.h| 6 -
2
Fixed few formatting issues in multi-segmented load_lut().
v3: -style nitting [Jani]
-balanced parentheses moved from patch 2 to 1 [Jani]
-subject prefix change [Jani]
-added commit message [Jani]
v4: -rearranged INDEX register write in ilk_read_luts()
Signed-off-by: Swati Sharma
2, details in commit message.
Swati Sharma (3):
drm/i915/color: Fix formatting issues
drm/i915/color: Extract icl_read_luts()
FOR_TESTING_ONLY: Print rgb values of hw and sw blobs
drivers/gpu/drm/i915/display/intel_color.c | 168 ++---
drivers/gpu/drm/i915/i915_reg.h
e, I guess
v4: -removed interpolated func for creating gamma lut values
-removed readouts of fine and coarse segments, failure to read PAL_PREC_DATA
correctly
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 126 +
drivers/gp
Only to print hw and sw lut values/channel.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 299ada5b..3508d6a 100644
Only to print hw and sw lut values/channel.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index ad548ce..a7a2fa0 100644
-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 216 +++--
drivers/gpu/drm/i915/i915_reg.h| 7 +
2 files changed, 208 insertions(+), 15 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display
Fixed few formatting issues in multi-segmented load_lut().
v3: -style nitting [Jani]
-balanced parentheses moved from patch 2 to 1 [Jani]
-subject prefix change [Jani]
-added commit message [Jani]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 34
2, details in commit message.
Swati Sharma (3):
drm/i915/color: Fix formatting issues
drm/i915/color: Extract icl_read_luts()
FOR_TESTING_ONLY: Print rgb values of hw and sw blobs
drivers/gpu/drm/i915/display/intel_color.c | 252 +
drivers/gpu/drm/i915/i915_reg.h
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 318308d..b1f0f7e 100644
--- a/drivers/gpu
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 0008011..4bf098f 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
In this patch series, added state checker to validate gamma lut values
for icelake+ platforms. It's extension of the
patch series https://patchwork.freedesktop.org/patch/328246/?series=58039
which enabled the basic infrastructure and state checker for
legacy platforms.
Swati Sharma (3):
drm
gamma has to come
up with some intermediate entries that aren't preserved
in hardware (Jani N)
-linear interpolation (Ville)
-moved common code to check gamma_enable to specific funcs,
since icl doesn't support that
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 15 ++-
1 file changed, 6 insertions(+), 9 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 318308d..b1f0f7e 100644
--- a/drivers/gpu
gamma has to come
up with some intermediate entries that aren't preserved
in hardware (Jani N)
-linear interpolation (Ville)
-moved common code to check gamma_enable to specific funcs,
since icl doesn't support that
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915
In this patch series, added state checker to validate gamma lut values
for icelake+ platforms. It's extension of the
patch series https://patchwork.freedesktop.org/patch/328246/?series=58039
which enabled the basic infrastructure and state checker for
legacy platforms.
Swati Sharma (2):
drm
last index rgb lut value from PIPEGCMAX to h/w blob [Jani]
Swati Sharma (3):
drm/i915/display: Add gamma precision function for CHV
drm/i915/display: Extract i965_read_luts()
drm/i915/display: Extract chv_read_luts()
drivers/gpu/drm/i915/display/intel_color.c | 118
chv_read_cgm_gamma_lut() to chv_read_cgm_gamma_lut()
[Ville, Uma]
Signed-off-by: Swati Sharma
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 43 ++
drivers/gpu/drm/i915/i915_reg.h| 3 +++
2 files changed, 46 insertions
]
-Renamed i965_read_gamma_lut_10p6() to i965_read_lut_10p6() [Ville, Uma]
v10: -Swapped ldw and udw while creating hw blob [Jani]
-Added last index rgb lut value from PIPEGCMAX to h/w blob [Jani]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 50
intel_color_get_gamma_bit_precision() is extended for
cherryview by adding chv_gamma_precision(), i965 will use existing
i9xx_gamma_precision() func only.
Signed-off-by: Swati Sharma
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 25 +++--
1 file
chv_read_cgm_gamma_lut() to chv_read_cgm_gamma_lut()
[Ville, Uma]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 43 ++
drivers/gpu/drm/i915/i915_reg.h| 3 +++
2 files changed, 46 insertions(+)
diff --git a/drivers/gpu
intel_color_get_gamma_bit_precision() is extended for
cherryview by adding chv_gamma_precision(), i965 will use existing
i9xx_gamma_precision() func only.
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 25 +++--
1 file changed, 19 insertions
In this patch series, added state checker to validate gamma lut values
for cherryview and i965 platforms. It's extension of the
patch series https://patchwork.freedesktop.org/patch/328246/?series=58039
which enabled the basic infrastructure and state checker for
few legacy platforms.
Swati
]
-Renamed i965_read_gamma_lut_10p6() to i965_read_lut_10p6() [Ville, Uma]
v10: -Swapped ldw and udw while creating hw blob [Jani]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 43 ++
drivers/gpu/drm/i915/i915_reg.h| 3 +++
2 files
() to glk_read_luts() [Ville]
-Added degamma validation [Ville]
v9: -80 character limit [Uma]
-Made read func para as const [Ville, Uma]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 51 --
drivers/gpu/drm/i915/i915_reg.h
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm/i915/display/intel_color.c
index 6d641e1..78608a5 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
more info [Uma]
-Added precision func for icl+ platform
v10: -Removed precision func for chv and icl+ platforms [Jani]
-Added gamma_enable check once [Jani]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 60 ++
drivers/gpu/drm
egmented gama mode for icl+ platforms [Uma]
v10: -Dropped multi segmented mode for icl+ platforms [Jani]
-Removed references of sw and hw state in compare code [Jani]
-Dropped inline from func [Jani]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/
]
Swati Sharma (8):
drm/i915/display: Add func to get gamma bit precision
drm/i915/display: Add debug log for color parameters
drm/i915/display: Add func to compare hw/sw gamma lut
drm/i915/display: Add macro to compare gamma hw/sw lut
drm/i915/display: Extract i9xx_read_luts()
drm/i915
-by: Swati Sharma
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 45 +-
drivers/gpu/drm/i915/i915_reg.h| 3 ++
2 files changed, 47 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c
b/drivers/gpu/drm
hin 75 characters [Uma]
-Use macro for 256 [Uma]
-Made read func para as const [Ville, Uma]
v10: -Made i9xx_read_luts() static [Jani]
Signed-off-by: Swati Sharma
Reviewed-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_color.c | 54 ++
drivers/gpu/drm/i
[Jani]
v8: -Added check for gamma mode before gamma lut entry comparison
[Jani]
-Split patch 3 into 4 patches
Signed-off-by: Swati Sharma
Reviewed-by: Uma Shankar
---
drivers/gpu/drm/i915/display/intel_display.c | 25 +
1 file changed, 25 insertions(+)
diff --git
Add debug log for color related parameters like gamma_mode, gamma_enable,
csc_enable, etc inside intel_dump_pipe_config().
v6: -Added debug log for color para in intel_dump_pipe_config [Jani]
v7: -Split patch 3 into 4 patches
v8: -Corrected alignment [Uma]
Signed-off-by: Swati Sharma
Reviewed
() to ilk_read_luts() [Ville]
v9: -80 character limit [Uma]
-Made read func para as const [Ville, Uma]
-Renamed ilk_read_gamma_lut() to ilk_read_lut_10() [Uma, Ville]
Signed-off-by: Swati Sharma
---
drivers/gpu/drm/i915/display/intel_color.c | 45 +-
drivers/gpu/drm
1 - 100 of 257 matches
Mail list logo
