Given that the hardware may be left in a random condition by the BIOS,
it is conceivable that we then attempt to clear the DP_PIPEB_SELECT bit
without us ever enabling/attaching the DP encoder to a pipe. Thus
causing a NULL deference when we attempt to wait for a vblank on that
crtc.
On Wed, 20 Apr 2011 16:42:08 +0100, Chris Wilson ch...@chris-wilson.co.uk
wrote:
Given that the hardware may be left in a random condition by the BIOS,
it is conceivable that we then attempt to clear the DP_PIPEB_SELECT bit
without us ever enabling/attaching the DP encoder to a pipe. Thus
On Wed, 20 Apr 2011 10:36:29 -0700, Keith Packard kei...@keithp.com wrote:
On Wed, 20 Apr 2011 16:42:08 +0100, Chris Wilson ch...@chris-wilson.co.uk
wrote:
Given that the hardware may be left in a random condition by the BIOS,
it is conceivable that we then attempt to clear the