On Thu, 12 May 2011 22:17:17 +0100, Chris Wilson ch...@chris-wilson.co.uk
wrote:
Toggle the Software Clear Interrupt bit which resets the controller to
clear any prior BUS_ERROR condition before we begin to use the
controller in earnest.
I don't have a new patch with corrected register
On Fri, 13 May 2011 10:32:25 +0100, Chris Wilson ch...@chris-wilson.co.uk
wrote:
It has been booting daily on several machines for a month. I agree it
wouldn't have worked, but the since we automatically fallback to GPIO
should it go south, the failures didn't stop the external monitors from
On Fri, 13 May 2011 08:01:51 -0700, Keith Packard kei...@keithp.com wrote:
On Fri, 13 May 2011 10:32:25 +0100, Chris Wilson ch...@chris-wilson.co.uk
wrote:
It has been booting daily on several machines for a month. I agree it
wouldn't have worked, but the since we automatically fallback
Toggle the Software Clear Interrupt bit which resets the controller to
clear any prior BUS_ERROR condition before we begin to use the
controller in earnest.
Suggested-by: Ben Widawsky b...@bwidawsk.net
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/intel_i2c.c |
On Thu, 12 May 2011 22:17:17 +0100, Chris Wilson ch...@chris-wilson.co.uk
wrote:
Toggle the Software Clear Interrupt bit which resets the controller to
clear any prior BUS_ERROR condition before we begin to use the
controller in earnest.
Looks reasonable, except for the bad register offsets
