Re: [Intel-gfx] [PATCH 12/16] drm/i915: Disable LP1+ watermarks while changing the number of active pipes

2014-06-09 Thread Ville Syrjälä
On Wed, Jun 04, 2014 at 03:24:13PM -0300, Paulo Zanoni wrote: 2014-05-22 11:48 GMT-03:00 ville.syrj...@linux.intel.com: From: Ville Syrjälä ville.syrj...@linux.intel.com When we switch between one active pipe and multiple active pipes, the display FIFO gets repartitioned. Disable the

Re: [Intel-gfx] [PATCH 12/16] drm/i915: Disable LP1+ watermarks while changing the number of active pipes

2014-06-04 Thread Paulo Zanoni
2014-05-22 11:48 GMT-03:00 ville.syrj...@linux.intel.com: From: Ville Syrjälä ville.syrj...@linux.intel.com When we switch between one active pipe and multiple active pipes, the display FIFO gets repartitioned. Disable the LP1+ waterwarks while that is happening to make sure we don't get any

[Intel-gfx] [PATCH 12/16] drm/i915: Disable LP1+ watermarks while changing the number of active pipes

2014-05-22 Thread ville . syrjala
From: Ville Syrjälä ville.syrj...@linux.intel.com When we switch between one active pipe and multiple active pipes, the display FIFO gets repartitioned. Disable the LP1+ waterwarks while that is happening to make sure we don't get any glitches on other active pipes while doing a modeset on