Instead of waiting for the display line value to settle, we can simply
wait for the pipe configuration register 'state' bit to turn off.
Contrarywise, disabling the plane will not cause the display line
value to stop changing, so instead we wait for the vblank interrupt
bit to get set. And, we
On Sun, 3 Oct 2010 00:33:06 -0700, Keith Packard kei...@keithp.com wrote:
Instead of waiting for the display line value to settle, we can simply
wait for the pipe configuration register 'state' bit to turn off.
Thanks Keith, series applied to -fixes.
-Chris
--
Chris Wilson, Intel Open Source
On Sun, 3 Oct 2010 00:33:06 -0700
Keith Packard kei...@keithp.com wrote:
Instead of waiting for the display line value to settle, we can simply
wait for the pipe configuration register 'state' bit to turn off.
Contrarywise, disabling the plane will not cause the display line
value to stop
On Sun, 3 Oct 2010 08:10:48 -0700, Jesse Barnes jbar...@virtuousgeek.org
wrote:
Do these fixes help with the DP issues you've been seeing, Keith?
Seems like the first one shouldn't change behavior since we ought to
time out on waiting on vblank in that case, and the timeout is the same
as
Keith Packard kei...@keithp.com wrote:
On Sun, 3 Oct 2010 08:10:48 -0700, Jesse Barnes jbar...@virtuousgeek.org
wrote:
Do these fixes help with the DP issues you've been seeing, Keith?
Seems like the first one shouldn't change behavior since we ought to
time out on waiting on vblank in
mode setting a tiny bit faster as well.
I've got a couple more changes to work on today:
1) re-train the monitor when it gets unplugged and then plugged back
in. Right now, if you kick the cable out, you're stuck fumbling
around in the dark trying to run 'xrandr' again.
don't you do
On Mon, 4 Oct 2010 06:33:01 +1000, Dave Airlie airl...@gmail.com wrote:
don't you do this already? both radeon/nouveau handle DP replug fine,
I thought Intel would have been where I stole the code from.
There was a one-line bug. Patch already posted.
--
keith.pack...@intel.com
