On Mon, Apr 29, 2013 at 01:02:55PM +0300, Jani Nikula wrote:
Enable asle pipestat earlier in i915/i965 irq postinstall to not need
irq_lock in i915_enable_asle_pipestat().
Signed-off-by: Jani Nikula jani.nik...@intel.com
Honestly I'm not too fond of too clever init sequence ordering - we
On Sat, Apr 27, 2013 at 12:51:33PM -0700, Ben Widawsky wrote:
On Fri, Apr 26, 2013 at 04:22:46PM +0300, ville.syrj...@linux.intel.com wrote:
From: Chris Wilson ch...@chris-wilson.co.uk
As we recompute the remaining timeout after waiting, there is a
potential for that timeout to be less
Hi Nick
Two things:
- Please always include a relevant mailing list, never only send a mail to
your maintainer.
- All hotplug detection related issues, which commonly result in gfx stalls
and busy kworkers should be in 3.10. You can grab the drm-next branch to
test the latest code.
If the module
From: Chris Wilson ch...@chris-wilson.co.uk
This replaceable mainboard only has a VGA-out, yet it claims to also
have a connected LVDS header.
Reported-by: annndd...@gmail.com
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=63860
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
dmi_check_system() matches the D510MO no LVDS quirk for D510MOV
too. Reverse quirk the quirk.
Signed-off-by: Jani Nikula jani.nik...@intel.com
---
drivers/gpu/drm/i915/intel_lvds.c | 15 ++-
1 file changed, 14 insertions(+), 1 deletion(-)
diff --git
Enabling PPGTT and also the need to track which context was guilty of
gpu hang (arb robustness enabling) have put pressure for struct i915_hw_context
to be more than just a placeholder for hw context state.
In order to track object lifetime properly in a multi peer usage, add reference
counting
Before module unload is called, gpu_idle() will switch
to default context. This will increment ref count of base
object as the default context is 'running' on module unload
time. Unreference the drm object so that when context
is freed, base object is freed as well.
Signed-off-by: Mika Kuoppala
Warn on missing locking in pipestat enable/disable, and fix calls that
would trigger this.
Signed-off-by: Jani Nikula jani.nik...@intel.com
---
Daniel, is this more to your liking?
I don't have a machine handy to actually test this right now...
---
drivers/gpu/drm/i915/i915_irq.c | 21
Hi all,
So I'm still blazing ahead with converting everything over to pipe_config. This
is (mostly) a tiny detour into sdvo TV support, which accidentally ended up
fixing a regression going back to the introduction of multi-function sdvo
support in 2.6.35.
Quick update on this pipe_config
If we ever leak a non-DP compliant port width through here, we have a
pretty serious issue. So just rip out all these WARNs - if we need
them it's probably better to have them at a central place where we
compute the dp lane count.
Also use the new DDI width macro for FDI mode.
Cc: Paulo Zanoni
We have a very nice infrastructure for this now!
Note that the multifunction sdvo support is pretty neatly broken: We
completely ignore userspace's request for which connector to wire up
with the encoder and just use whatever the last detect callback has
seen.
Not something I'll fix in this
TV-out uses the same reference clock as everyone else. The only
difference seems to be in the slightly different CB tuning limit.
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 11 +--
1 file changed, 1 insertion(+), 10 deletions(-)
diff
This seems to be an impressive piece of copypasta lore. I've
checked all docs and on most platforms these bits are all MBZ, with
the exception of the SDVO pixel multiplier on gen3. On gen4 that
moved to a special DPLL_MD registers.
No indication whatsoever that we actually need this for native
More ugly stuff gone for good! The big special case left now is
lvds (which is indeed really special).
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
drivers/gpu/drm/i915/intel_display.c | 28 +++-
1 file changed, 3 insertions(+), 25 deletions(-)
diff --git
We need to track this correctly. While at it shovel the boolean
to track whether the sdvo is in tv mode or not into pipe_config.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=36997
Tested-by: Pierre Assal pierre.as...@verint.com
Bugzilla:
Somehow this has been forgotten in
commit 1974cad0ee4ce84e5cb792e49c4f0d9421e0312c
Author: Daniel Vetter daniel.vet...@ffwll.ch
Date: Mon Nov 26 17:22:09 2012 +0100
drm/i915: move is_dual_link_lvds to intel_lvds.c
Signed-off-by: Daniel Vetter daniel.vet...@ffwll.ch
---
On Tue, Apr 30, 2013 at 02:01:45PM +0200, Daniel Vetter wrote:
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -223,6 +222,10 @@ struct intel_crtc_config {
/* Controls for the clock computation, to override various stages. */
bool clock_set;
+
On Tue, Apr 30, 2013 at 2:49 PM, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Tue, Apr 30, 2013 at 02:01:45PM +0200, Daniel Vetter wrote:
--- a/drivers/gpu/drm/i915/intel_drv.h
+++ b/drivers/gpu/drm/i915/intel_drv.h
@@ -223,6 +222,10 @@ struct intel_crtc_config {
/* Controls for the
Daniel Vetter daniel.vet...@ffwll.ch writes:
Patches 1,2 and 3:
Reviewed-by: Mika Kuoppala mika.kuopp...@intel.com
Writing hw registers from compute_config?
Just say no!
In this case not too horrible since we write a constant 0, and only
debugging would put something else in there. But
On Tue, Apr 30, 2013 at 04:53:41PM +0300, Mika Kuoppala wrote:
Daniel Vetter daniel.vet...@ffwll.ch writes:
Patches 1,2 and 3:
Reviewed-by: Mika Kuoppala mika.kuopp...@intel.com
All merged to dinq, thanks for the review.
-Daniel
Writing hw registers from compute_config?
Just say no!
On Tue, 30 Apr 2013 12:29:37 +0200
David Henningsson david.hennings...@canonical.com wrote:
On 04/29/2013 05:02 PM, Jesse Barnes wrote:
On Sat, 27 Apr 2013 13:35:29 +0200
Daniel Vetter dan...@ffwll.ch wrote:
On Sat, Apr 27, 2013 at 09:20:39AM +, Wang, Xingchao wrote:
Let me throw a
On Tue, 2013-04-30 at 12:29 +0200, David Henningsson wrote:
On 04/29/2013 05:02 PM, Jesse Barnes wrote:
On Sat, 27 Apr 2013 13:35:29 +0200
Daniel Vetter dan...@ffwll.ch wrote:
On Sat, Apr 27, 2013 at 09:20:39AM +, Wang, Xingchao wrote:
Let me throw a basic proposal on Audio driver
On Tue, Apr 30, 2013 at 01:30:34PM +0300, Mika Kuoppala wrote:
Before module unload is called, gpu_idle() will switch
to default context. This will increment ref count of base
object as the default context is 'running' on module unload
time. Unreference the drm object so that when context
is
On 04/29/2013 05:02 PM, Jesse Barnes wrote:
On Sat, 27 Apr 2013 13:35:29 +0200
Daniel Vetter dan...@ffwll.ch wrote:
On Sat, Apr 27, 2013 at 09:20:39AM +, Wang, Xingchao wrote:
Let me throw a basic proposal on Audio driver side, please give your comments
freely.
it contains the power
On Tue, Apr 30, 2013 at 01:30:33PM +0300, Mika Kuoppala wrote:
Enabling PPGTT and also the need to track which context was guilty of
gpu hang (arb robustness enabling) have put pressure for struct
i915_hw_context
to be more than just a placeholder for hw context state.
In order to track
On Wed, Apr 24, 2013 at 06:52:33PM +0300, ville.syrj...@linux.intel.com wrote:
Here's the latest version of my plane clipping stuff.
I think it should be ready for merging. Laurent reviewed the first patch,
and Chris reviewed the whole set.
I didn't hear any bikeshedding about the location
On Sat, 27 Apr 2013 17:59:11 -0700
Ben Widawsky b...@bwidawsk.net wrote:
Here is the original post with the RFC for these patches.
http://lists.freedesktop.org/archives/intel-gfx/2012-November/022330.html
So where are we with these? They're almost old enough to drink now...
I think the media
On Tue, Apr 30, 2013 at 11:40:16AM -0700, Ben Widawsky wrote:
On Tue, Apr 30, 2013 at 01:30:33PM +0300, Mika Kuoppala wrote:
Enabling PPGTT and also the need to track which context was guilty of
gpu hang (arb robustness enabling) have put pressure for struct
i915_hw_context
to be more
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