On Mon, 2022-04-04 at 13:43 +, Souza, Jose wrote:
> On Mon, 2022-04-04 at 07:41 +, Hogander, Jouni wrote:
> > Hello,
> >
> > Couple of questions below.
> > On Fri, 2022-04-01 at 15:29 -0700, José Roberto de Souza wrote:
> > > Frontbuffer rendering and page flips can race with each other
>
From: Cooper Chiou
commit 5662abf6e21338be6d085d6375d3732ac6147fd2 upstream.
Tag code stored in bit7:5 for CTA block byte[3] is not the same as
CEA extension block definition. Only check CEA block has
basic audio support.
v3: update commit message.
Cc: sta...@vger.kernel.org
Cc: Jani Nikula
On 23/03/2022 13:19, Tvrtko Ursulin wrote:
Hi,
On 21/03/2022 16:45, Alan Previn wrote:
This series:
1. Enables support of GuC to report error-state-capture
using a list of MMIO registers the driver registers
and GuC will dump, log and notify right before a GuC
triggered
On Wed, Feb 09, 2022 at 01:19:26AM +0100, Javier Martinez Canillas wrote:
> On 2/8/22 22:08, Daniel Vetter wrote:
> > This reverts commit fb561bf9abde49f7e00fdbf9ed2ccf2d86cac8ee.
> >
> > With
> >
> > commit 27599aacbaefcbf2af7b06b0029459bbf682000d
> > Author: Thomas Zimmermann
> > Date: Tue
On Thu, Feb 10, 2022 at 12:46:32PM +0100, Thomas Zimmermann wrote:
> Hi
>
> Am 08.02.22 um 22:08 schrieb Daniel Vetter:
> > There's two minor behaviour changes in here:
> > - in error paths we now consistently call fb_ops->fb_release
> > - fb_release really can't fail (fbmem.c ignores it too) and
On 04/04/2022 16:36, Daniel Vetter wrote:
On Mon, Apr 04, 2022 at 10:23:53AM +0100, Tvrtko Ursulin wrote:
+ Dave and Daniel
Guys, are you okay with merging this via drm-intel-gt-next? It is one new
file at Documentation/gpu/drm-usage-stats.rst only which is outside i915. It
has acks from
On Tue, Apr 05, 2022 at 10:36:35AM +0200, Daniel Vetter wrote:
> On Wed, Feb 09, 2022 at 01:19:26AM +0100, Javier Martinez Canillas wrote:
> > On 2/8/22 22:08, Daniel Vetter wrote:
> > > This reverts commit fb561bf9abde49f7e00fdbf9ed2ccf2d86cac8ee.
> > >
> > > With
> > >
> > > commit
Hello Daniel,
On 4/5/22 10:40, Daniel Vetter wrote:
> On Tue, Apr 05, 2022 at 10:36:35AM +0200, Daniel Vetter wrote:
>> On Wed, Feb 09, 2022 at 01:19:26AM +0100, Javier Martinez Canillas wrote:
>>> On 2/8/22 22:08, Daniel Vetter wrote:
This reverts commit
== Series Details ==
Series: drm/i915/uncore: Warn on previous unclaimed accesses
URL : https://patchwork.freedesktop.org/series/102167/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11452_full -> Patchwork_22778_full
On 01.04.2022 18:07, Ramalingam C wrote:
> Move the static calculations out of the loops for copy and clear.
>
> Signed-off-by: Ramalingam C
> Reviewed-by: Thomas Hellstrom
> ---
> drivers/gpu/drm/i915/gt/intel_migrate.c | 40 -
> 1 file changed, 19 insertions(+), 21
== Series Details ==
Series: drm/i915/uncore: keep track of last mmio accesses (rev3)
URL : https://patchwork.freedesktop.org/series/102157/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11452_full -> Patchwork_22777_full
On Tue, 5 Apr 2022 at 11:19, Javier Martinez Canillas
wrote:
>
> Hello Daniel,
>
> On 4/5/22 10:40, Daniel Vetter wrote:
> > On Tue, Apr 05, 2022 at 10:36:35AM +0200, Daniel Vetter wrote:
> >> On Wed, Feb 09, 2022 at 01:19:26AM +0100, Javier Martinez Canillas wrote:
> >>> On 2/8/22 22:08, Daniel
On 4/5/22 11:24, Daniel Vetter wrote:
> On Tue, 5 Apr 2022 at 11:19, Javier Martinez Canillas
[snip]
>>
>> This is how I think that work, please let me know if you see something
>> wrong in my logic:
>>
>> 1) A PCI device of OF device is registered for the GPU, this attempt to
>>match a
From: Cooper Chiou
commit 5662abf6e21338be6d085d6375d3732ac6147fd2 upstream.
Tag code stored in bit7:5 for CTA block byte[3] is not the same as
CEA extension block definition. Only check CEA block has
basic audio support.
v3: update commit message.
Cc: sta...@vger.kernel.org
Cc: Jani Nikula
From: Cooper Chiou
commit 5662abf6e21338be6d085d6375d3732ac6147fd2 upstream.
Tag code stored in bit7:5 for CTA block byte[3] is not the same as
CEA extension block definition. Only check CEA block has
basic audio support.
v3: update commit message.
Cc: sta...@vger.kernel.org
Cc: Jani Nikula
From: Cooper Chiou
commit 5662abf6e21338be6d085d6375d3732ac6147fd2 upstream.
Tag code stored in bit7:5 for CTA block byte[3] is not the same as
CEA extension block definition. Only check CEA block has
basic audio support.
v3: update commit message.
Cc: sta...@vger.kernel.org
Cc: Jani Nikula
On 2022-03-29 at 18:53:42 +0530, Balasubramani Vivekanandan wrote:
> On 29.03.2022 00:37, Ramalingam C wrote:
> > Move the static calculations out of the loops for copy and clear.
> >
> > Signed-off-by: Ramalingam C
> > Reviewed-by: Thomas Hellström
> > ---
> >
On Tue, 5 Apr 2022 at 11:52, Javier Martinez Canillas
wrote:
>
> On 4/5/22 11:24, Daniel Vetter wrote:
> > On Tue, 5 Apr 2022 at 11:19, Javier Martinez Canillas
>
> [snip]
>
> >>
> >> This is how I think that work, please let me know if you see something
> >> wrong in my logic:
> >>
> >> 1) A PCI
On Tue, Apr 05, 2022 at 03:24:40PM +0200, Geert Uytterhoeven wrote:
> Hi Daniel,
>
> On Tue, Apr 5, 2022 at 1:48 PM Daniel Vetter wrote:
> > On Tue, 5 Apr 2022 at 11:52, Javier Martinez Canillas
> > wrote:
> > > On 4/5/22 11:24, Daniel Vetter wrote:
> > > > On Tue, 5 Apr 2022 at 11:19, Javier
== Series Details ==
Series: drm/i915: Fix skl_pcode_try_request function
URL : https://patchwork.freedesktop.org/series/102186/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
0a861cc88f76 drm/i915: Fix skl_pcode_try_request function
-:25: WARNING:COMMIT_LOG_LONG_LINE: Possible
== Series Details ==
Series: drm/i915: Fix skl_pcode_try_request function
URL : https://patchwork.freedesktop.org/series/102186/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11456 -> Patchwork_22780
Summary
---
On Xe-HP and later devices, we use dedicated compression control
state (CCS) stored in local memory for each surface, to support
the 3D and media compression formats.
The memory required for the CCS of the entire local memory is
1/256 of the local memory size. So before the kernel
boot, the
To make it uniform across copy and clear, use the engine offset directly
to calculate the offset in the cmd forming for emit_clear.
Signed-off-by: Ramalingam C
Reviewed-by: Thomas Hellstrom
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 11 ---
1 file changed, 4 insertions(+), 7
When we are swapping out the local memory obj on flat-ccs capable platform,
we need to capture the ccs data too along with main meory and we need to
restore it when we are swapping in the content.
When lmem object is swapped into a smem obj, smem obj will
have the extra pages required to hold the
Use faster XY_FAST_COLOR_BLT cmd on graphics version of 12 and more,
for clearing (Zero out) the pages of the newly allocated object.
XY_FAST_COLOR_BLT is faster than the older XY_COLOR_BLT.
v2:
Typo fix at title [Thomas]
v3:
XY_FAST_COLOR_BLT is used only for FLAT_CCS capable gen12+
Move the static calculations out of the loops for copy and clear.
v2:
Fix the loss of proper error code on emit_pte
Signed-off-by: Ramalingam C
Reviewed-by: Thomas Hellstrom (v1)
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 34 -
1 file changed, 17 insertions(+), 17
Xe-HP and latest devices support Flat CCS which reserved a portion of
the device memory to store compression metadata, during the clearing of
device memory buffer object we also need to clear the associated
CCS buffer.
XY_CTRL_SURF_COPY_BLT is a BLT cmd used for reading and writing the
ccs
When emit_pte doesn't update any PTE with return value as 0, interpret
it as -EINVAL.
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/gt/intel_migrate.c
Consider the possible round up happened at obj size alignment to
min_page_size during the obj allocation.
Signed-off-by: Ramalingam C
Reviewed-by: Thomas Hellstrom
---
drivers/gpu/drm/i915/gt/selftest_migrate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
Extend the live migrate selftest, to verify the ccs surface clearing
during the Flat-CCS capable lmem obj clear.
v2:
Look at right places for ccs data [Thomas]
Signed-off-by: Ramalingam C
Reviewed-by: Thomas Hellstrom
---
drivers/gpu/drm/i915/gt/selftest_migrate.c | 250
On Xe-HP and later devices, dedicated compression control state (CCS)
stored in local memory is used for each surface, to support the
3D and media compression formats.
The memory required for the CCS of the entire local memory is 1/256 of
the local memory size. So before the kernel boot, the
== Series Details ==
Series: drm/i915: Fix skl_pcode_try_request function
URL : https://patchwork.freedesktop.org/series/102186/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_context_types.h:417: warning: Function
parameter or
On Tue, Apr 05, 2022 at 04:53:45PM +0100, Tvrtko Ursulin wrote:
> From: Tvrtko Ursulin
>
> Mixup in rebasing and patchwork re-runs made me push the wrong version of
> the patch. Or I even forgot to send out the fixed version. Fix it up.
>
> Signed-off-by: Tvrtko Ursulin
> Fixes: 748716041dfa
On Tue, Apr 05, 2022 at 03:33:17PM +0200, Greg KH wrote:
> On Tue, Apr 05, 2022 at 03:24:40PM +0200, Geert Uytterhoeven wrote:
> > Hi Daniel,
> >
> > On Tue, Apr 5, 2022 at 1:48 PM Daniel Vetter wrote:
> > > On Tue, 5 Apr 2022 at 11:52, Javier Martinez Canillas
> > > wrote:
> > > > On 4/5/22
== Series Details ==
Series: Inherit GPU scheduling priority from process nice
URL : https://patchwork.freedesktop.org/series/102203/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11456 -> Patchwork_22782
Summary
---
== Series Details ==
Series: drm/i915/ttm: Evict and restore of compressed object (rev9)
URL : https://patchwork.freedesktop.org/series/101106/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
-
== Series Details ==
Series: drm/i915/ttm: Evict and restore of compressed object (rev9)
URL : https://patchwork.freedesktop.org/series/101106/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
8bdf454baf04 drm/i915/gt: use engine instance directly for offset
c429cfa1eeb3
== Series Details ==
Series: drm/i915/ttm: Evict and restore of compressed object (rev9)
URL : https://patchwork.freedesktop.org/series/101106/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_context_types.h:417: warning: Function
== Series Details ==
Series: drm/i915/uncore: Warn on previous unclaimed accesses
URL : https://patchwork.freedesktop.org/series/102167/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11452_full -> Patchwork_22778_full
On Tue, Apr 05, 2022 at 06:12:59PM +0200, Daniel Vetter wrote:
> On Tue, Apr 05, 2022 at 03:33:17PM +0200, Greg KH wrote:
> > On Tue, Apr 05, 2022 at 03:24:40PM +0200, Geert Uytterhoeven wrote:
> > > Hi Daniel,
> > >
> > > On Tue, Apr 5, 2022 at 1:48 PM Daniel Vetter wrote:
> > > > On Tue, 5 Apr
== Series Details ==
Series: drm/i915/ttm: Evict and restore of compressed object (rev9)
URL : https://patchwork.freedesktop.org/series/101106/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11456 -> Patchwork_22783
Summary
== Series Details ==
Series: GSC support (rev3)
URL : https://patchwork.freedesktop.org/series/102160/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
7512d7a5595f drm/i915/gsc: add gsc as a mei auxiliary device
-:65: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s),
== Series Details ==
Series: GSC support (rev3)
URL : https://patchwork.freedesktop.org/series/102160/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Currently skl_pcode_try_request function doesn't
properly handle return value it gets from
snb_pcode_rw, but treats status != 0 as success,
returning true, which basically doesn't allow
to use retry/timeout mechanisms if PCode happens
to be busy and returns EGAIN or some other status
code not
> -Original Message-
> From: Intel-gfx On Behalf Of Animesh
> Manna
> Sent: Friday, March 25, 2022 9:42 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Das, Nirmoy
> Subject: [Intel-gfx] [PATCH] drm/i915/dsb: modified to drm_info in
> dsb_prepare()
>
> The request to aqquire gem
On 4/5/22 12:34, Daniel Vetter wrote:
> On Tue, 5 Apr 2022 at 11:52, Javier Martinez Canillas
> wrote:
[snip]
>>
>> I believe the correct fix would be for the fbdev core to keep a list of
>> the apertures struct that are passed to remove_conflicting_framebuffers(),
>> that way it will know what
On Tue, 5 Apr 2022 at 13:00, Thomas Hellström
wrote:
>
> When DMAR / VT-d is enabled, the display engine uses overfetching,
> presumably to deal with the increased latency. To avoid display engine
> errors and DMAR faults, as a workaround the GGTT is populated with scatch
> PTEs when VT-d is
When DMAR / VT-d is enabled, the display engine uses overfetching,
presumably to deal with the increased latency. To avoid display engine
errors and DMAR faults, as a workaround the GGTT is populated with scatch
PTEs when VT-d is enabled. However starting with gen10, Write-combined
writing of
Hi Daniel,
On Tue, Apr 5, 2022 at 1:48 PM Daniel Vetter wrote:
> On Tue, 5 Apr 2022 at 11:52, Javier Martinez Canillas
> wrote:
> > On 4/5/22 11:24, Daniel Vetter wrote:
> > > On Tue, 5 Apr 2022 at 11:19, Javier Martinez Canillas
> > >> This is how I think that work, please let me know if you
To make it uniform across copy and clear, use the engine offset directly
to calculate the offset in the cmd forming for emit_clear.
Signed-off-by: Ramalingam C
Reviewed-by: Thomas Hellstrom
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 11 ---
1 file changed, 4 insertions(+), 7
Use faster XY_FAST_COLOR_BLT cmd on graphics version of 12 and more,
for clearing (Zero out) the pages of the newly allocated object.
XY_FAST_COLOR_BLT is faster than the older XY_COLOR_BLT.
v2:
Typo fix at title [Thomas]
v3:
XY_FAST_COLOR_BLT is used only for FLAT_CCS capable gen12+
== Series Details ==
Series: drm/i915: Improve on suspend / resume time with VT-d enabled
URL : https://patchwork.freedesktop.org/series/102187/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
On Xe-HP and later devices, we use dedicated compression control
state (CCS) stored in local memory for each surface, to support
the 3D and media compression formats.
The memory required for the CCS of the entire local memory is
1/256 of the local memory size. So before the kernel
boot, the
When emit_pte doesn't update any PTE with return value as 0, interpret
it as -EINVAL.
v2:
Add missing goto [Thomas]
Signed-off-by: Ramalingam C
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
== Series Details ==
Series: drm/i915: Improve on suspend / resume time with VT-d enabled
URL : https://patchwork.freedesktop.org/series/102187/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_context_types.h:417: warning:
== Series Details ==
Series: Inherit GPU scheduling priority from process nice
URL : https://patchwork.freedesktop.org/series/102203/
State : warning
== Summary ==
$ dim checkpatch origin/drm-tip
ded698b30753 drm/i915: Make some recently added vfuncs use full scheduling
attribute
-:7:
== Series Details ==
Series: Inherit GPU scheduling priority from process nice
URL : https://patchwork.freedesktop.org/series/102203/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_context_types.h:417: warning: Function
Following up what was done in commit 804f46885317 ("drm/i915/psr: Set
"SF Partial Frame Enable" also on full update") and also setting
partial frame enable when psr_force_hw_tracking_exit() is called.
Also as PSR2_MAN_TRK_CTL is a double buffered registers do a RMW
is not a good idea so here also
From: Tvrtko Ursulin
Mixup in rebasing and patchwork re-runs made me push the wrong version of
the patch. Or I even forgot to send out the fixed version. Fix it up.
Signed-off-by: Tvrtko Ursulin
Fixes: 748716041dfa ("drm/i915: Track all user contexts per client")
Cc: Umesh Nerlige Ramappa
---
From: Tvrtko Ursulin
Introduce the concept of context nice value which matches the process
nice.
We do this by extending the struct i915_sched_attr and add a helper
(i915_sched_attr_priority) to be used to convert to effective priority
when used by backend code and for priority sorting.
From: Tvrtko Ursulin
Code added in 71ed60112d5d ("drm/i915: Add kick_backend function to
i915_sched_engine") and ee242ca704d3 ("drm/i915/guc: Implement GuC
priority management") introduced some scheduling related vfuncs which
take integer request priority as argument.
Make them instead take
From: Tvrtko Ursulin
Current processing landscape seems to be more and more composed of pipelines
where computations are done on multiple hardware devices. Furthermore some of
the non-CPU devices, like in this case many GPUs supported by the i915 driver,
actually support priority based
From: Tvrtko Ursulin
Inherit submitter nice at point of request submission to account for
long running processes getting either externally or self re-niced.
Nice value will only apply to requests which originate from user
contexts and have default context priority.
Signed-off-by: Tvrtko
Move the static calculations out of the loops for copy and clear.
v2:
Fix the loss of proper error code on emit_pte
Signed-off-by: Ramalingam C
Reviewed-by: Thomas Hellstrom (v1)
---
drivers/gpu/drm/i915/gt/intel_migrate.c | 34 -
1 file changed, 17 insertions(+), 17
Xe-HP and latest devices support Flat CCS which reserved a portion of
the device memory to store compression metadata, during the clearing of
device memory buffer object we also need to clear the associated
CCS buffer.
XY_CTRL_SURF_COPY_BLT is a BLT cmd used for reading and writing the
ccs
Consider the possible round up happened at obj size alignment to
min_page_size during the obj allocation.
Signed-off-by: Ramalingam C
Reviewed-by: Thomas Hellstrom
---
drivers/gpu/drm/i915/gt/selftest_migrate.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
When we are swapping out the local memory obj on flat-ccs capable platform,
we need to capture the ccs data too along with main meory and we need to
restore it when we are swapping in the content.
When lmem object is swapped into a smem obj, smem obj will
have the extra pages required to hold the
On Xe-HP and later devices, dedicated compression control state (CCS)
stored in local memory is used for each surface, to support the
3D and media compression formats.
The memory required for the CCS of the entire local memory is 1/256 of
the local memory size. So before the kernel boot, the
Extend the live migrate selftest, to verify the ccs surface clearing
during the Flat-CCS capable lmem obj clear.
v2:
Look at right places for ccs data [Thomas]
Signed-off-by: Ramalingam C
Reviewed-by: Thomas Hellstrom
---
drivers/gpu/drm/i915/gt/selftest_migrate.c | 250
On Tue, Apr 05, 2022 at 09:43:58AM +, Patchwork wrote:
== Series Details ==
Series: drm/i915/uncore: Warn on previous unclaimed accesses
URL : https://patchwork.freedesktop.org/series/102167/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11452_full ->
From: Borislav Petkov
Fix:
In file included from :0:0:
drivers/gpu/drm/i915/gt/uc/intel_guc.c: In function ‘intel_guc_send_mmio’:
././include/linux/compiler_types.h:352:38: error: call to
‘__compiletime_assert_1047’ \
declared with attribute error: FIELD_PREP: mask is not constant
== Series Details ==
Series: drm/i915: Improve on suspend / resume time with VT-d enabled
URL : https://patchwork.freedesktop.org/series/102187/
State : success
== Summary ==
CI Bug Log - changes from CI_DRM_11456 -> Patchwork_22781
== Series Details ==
Series: Inherit GPU scheduling priority from process nice
URL : https://patchwork.freedesktop.org/series/102203/
State : warning
== Summary ==
$ dim sparse --fast origin/drm-tip
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
Instead of exit PSR when a frontbuffer invalidation happens, we can
enable the PSR2 selective fetch continuous full frame, that will keep
the panel updated like PSR was disabled but without keeping PSR active.
So as soon as the frontbuffer flush happens we can disable the
continuous full frame
Frontbuffer rendering and page flips can race with each other
and this can potentialy cause issues with PSR2 selective fetch.
And because pipe/crtc updates are time sentive we can't grab the
PSR lock after intel_pipe_update_start() and before
intel_pipe_update_end().
So here adding the lock and
== Series Details ==
Series: GSC support (rev3)
URL : https://patchwork.freedesktop.org/series/102160/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
./drivers/gpu/drm/i915/gem/i915_gem_context_types.h:417: warning: Function
parameter or member 'client_link' not
Those failures are directing towards
https://gitlab.freedesktop.org/drm/intel/-/issues/1436 which was closed long
back and I see the filters are also broken.
So, I have filed a new issue and new filter
https://gitlab.freedesktop.org/drm/intel/-/issues/5566
Thanks,
Lakshmi.
-Original
Bspec has added some steps that check for DMC MMIO range before
programming them.
v2: Fix for CI failure for v1
Cc: Lucas De Marchi
Signed-off-by: Anusha Srivatsa
---
drivers/gpu/drm/i915/display/intel_dmc.c | 42
1 file changed, 42 insertions(+)
diff --git
== Series Details ==
Series: GSC support (rev3)
URL : https://patchwork.freedesktop.org/series/102160/
State : failure
== Summary ==
CI Bug Log - changes from CI_DRM_11456 -> Patchwork_22784
Summary
---
**FAILURE**
Serious
On Tue, 5 Apr 2022 at 18:45, Greg KH wrote:
>
> On Tue, Apr 05, 2022 at 06:12:59PM +0200, Daniel Vetter wrote:
> > On Tue, Apr 05, 2022 at 03:33:17PM +0200, Greg KH wrote:
> > > On Tue, Apr 05, 2022 at 03:24:40PM +0200, Geert Uytterhoeven wrote:
> > > > Hi Daniel,
> > > >
> > > > On Tue, Apr 5,
== Series Details ==
Series: series starting with [CI,1/3] drm/i915/display/psr: Set partial frame
enable when forcing full frame fetch
URL : https://patchwork.freedesktop.org/series/102209/
State : warning
== Summary ==
$ make htmldocs 2>&1 > /dev/null | grep i915
From: Ville Syrjälä
Several changes to our BDB block handling:
1)
The current way of trusting the version checks to avoid out of
bounds accesses to the BDB blocks is fragile. We might just get
the version check wrong, or the VBT may be corrupted/malicious.
So instead of doing blind accesses
From: Ville Syrjälä
Make a copy of each VB data block with a guaranteed minimum
size. The extra (if any) will just be left zeroed.
This means we don't have to worry about going out of bounds
when accessing any of the structure members. Otherwise that
could easliy happen if we simply get the
From: Ville Syrjälä
Make sure the LFP data table pointers sane. Sensible looking
table entries, everything points correctly into the data block,
etc.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c | 82 ++-
1 file changed, 81 insertions(+), 1
From: Ville Syrjälä
We have the BDB version cached, use it. We're going to have to
start doing some of the BDB block parsing later, at which point
we may no longer have the VBT around anymore (we free it at the
end of intel_bios_init() when it didn't come via OpRegion).
Signed-off-by: Ville
From: Ville Syrjälä
Currently get_lvds_fp_timing() still returns a pointer to the original
data block rather than our copy. Let's convert the data pointer offsets
to be relative to the data block rather than the whole BDB. With that
we can make get_lvds_fp_timing() return a pointer to the copy.
From: Ville Syrjälä
Now that we've sufficiently validated the LFP data pointers we
can trust them.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c | 60 ++-
1 file changed, 16 insertions(+), 44 deletions(-)
diff --git
From: Ville Syrjälä
Just assume panel_type==0 always if the VBT gives us bogus data.
We actually already do this everywhere else except in
parse_panel_options() since we just leave i915->vbt.panel_type
zeroed. This also seems to be what Windows does.
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
In addition to the fp_timing,dvo_timing,panel_pnp_id tables
there also exists a panel_name table. Unlike the others this
is just one offset+table_size even though there are still 16
actual panel_names in the data block.
The panel_name table made its first appearance
From: Ville Syrjälä
Reorder things so that we can parse the entier LFP data block
in one go. For now we just stick to parsing the DTD from it.
Also fix the misleading comment about block 42 being deprecated.
Only the DTD part is deprecated, the rest is still very much needed.
Signed-off-by:
From: Ville Syrjälä
Modern VBTs no longer contain the LFP data table pointers
block (41). We are expecting to have one in order to be able
to parse the LFP data block (42), so let's make one up.
Since the fp_timing table has variable size we must somehow
determine its size. Rather than just
From: Ville Syrjälä
Make the panel type code a bit more abstract along the
lines of the source of the panel type. For the moment
we have three classes: OpRegion, VBT, fallback.
Well introduce another one shortly.
We can now also print out all the different panel types,
and indicate which one we
From: Ville Syrjälä
Apparently when the VBT panel_type==0xff we should trawl through
the PNPID table and check for a match against the EDID. If a
match is found the index gives us the panel_type.
Tried to match the Windows behaviour here with first looking
for an exact match, and if one isn't
From: Ville Syrjälä
Extract the seamless DRRS min refresh rate from the VBT.
v2: Do a version check
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c | 9 -
drivers/gpu/drm/i915/i915_drv.h | 1 +
2 files changed, 9 insertions(+), 1 deletion(-)
diff
From: Ville Syrjälä
We use the "driver features" block for two different kinds
of data: global data, and per panel data. Split the function
into two parts along that line so that we can start doing the
parsing in two different locations.
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
We need to start parsing stuff from the tail end of the LFP data block.
This is made awkward by the fact that the fp_timing table has variable
size. So we must use a bit more finesse to get the tail end, and to
make sure we allocate enough memory for it to make sure our
From: Ville Syrjälä
Split the PPS init to something we do at the start of the eDP
probe and a second part we do at the end.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_dp.c | 2 ++
drivers/gpu/drm/i915/display/intel_pps.c | 30
From: Ville Syrjälä
Move the panel specific VBT parsing to happen during the
output probing stage. Needs to be done because the VBT
parsing will need to look at the EDID to determine
the correct panel_type on some machines.
Signed-off-by: Ville Syrjälä
---
From: Ville Syrjälä
Dump the panel PNPID and name from the VBT.
Signed-off-by: Ville Syrjälä
---
drivers/gpu/drm/i915/display/intel_bios.c | 24 +++
1 file changed, 24 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_bios.c
From: Ville Syrjälä
Make the PNPID decoding available for other users.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
---
include/drm/drm_edid.h | 21 +
1 file changed, 17 insertions(+), 4 deletions(-)
diff --git a/include/drm/drm_edid.h
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