On Tue, Jan 30, 2024 at 09:36:50PM +0200, Juha-Pekka Heikkila wrote:
> Add BO bind time pat index member to xe_bo structure and store
> pat index from xe_vma to xe_bo.
>
> Signed-off-by: Juha-Pekka Heikkila
> ---
> drivers/gpu/drm/xe/xe_bo_types.h | 12
> drivers/gpu/drm/xe/xe_pt.c
Currently we are only checking capability of remote device and not
immediate downstream device but during capability check we need are
concerned with only the HDCP capability of downstream device.
During i915_display_info reporting we need HDCP Capability for both
the monitors and downstream
We see some monitors and docks report incorrect hdcp version
and capability in first few reads so we read rx_caps three times
before we conclude the monitor's or docks HDCP capability
--v2
-Add comment to justify the 3 time read loop for hdcp capability[Ankit]
Signed-off-by: Suraj Kandpal
Allocate stream id after HDCP AKE stage and not before so that it
can also be done during link integrity check.
Right now for MST scenarios LIC fails after hdcp enablement for this
reason.
Signed-off-by: Suraj Kandpal
---
.../drm/i915/display/intel_display_types.h| 1 +
Currently intel_hdcp is not being extracted from primary connector
this patch fixes that.
Fixes: 524240b231ea ("drm/i915/hdcp: Propagate aux info in DP HDCP functions")
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 7 +--
1 file changed, 5 insertions(+), 2
Now that we have moved back to direct reads the additional timing
is not required hence this can be removed.
--v2
-Add Fixes tag [Ankit]
Fixes: 3974f9c17bb9 ("drm/i915/hdcp: Adjust timeout for read in DPMST Scenario")
Signed-off-by: Suraj Kandpal
Reviewed-by: Ankit Nautiyal
---
Commit 8015bee0bfec ("drm/i915/display: Add framework to add parameters
specific to display") added the file intel_display_debugfs_params.c,
which calls the functions "debugfs_create_{bool, ulong, str}" -- all of
which are defined in . The missing inclusion of this
header file is breaking the
On 1/10/24 18:39, Jani Nikula wrote:
Fix the W=1 warning -Wunused-but-set-variable.
Cc: Karol Herbst
Cc: Lyude Paul
Cc: Danilo Krummrich
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Jani Nikula
Reviewed-by: Danilo Krummrich
---
drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c | 3
On 1/10/24 18:39, Jani Nikula wrote:
Fix the W=1 warning -Wunused-but-set-variable.
Cc: Karol Herbst
Cc: Lyude Paul
Cc: Danilo Krummrich
Cc: nouv...@lists.freedesktop.org
Signed-off-by: Jani Nikula
Reviewed-by: Danilo Krummrich
---
drivers/gpu/drm/nouveau/nouveau_svm.c | 10
On Wed, Jan 31, 2024 at 06:18:22PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 23, 2024 at 12:28:49PM +0200, Imre Deak wrote:
> > Suspend and resume DP tunnels during system suspend/resume, disabling
> > the BW allocation mode during suspend, re-enabling it after resume. This
> > reflects the link's
Patch (bd077259d0a9: drm/i915/vdsc: Add function to read any PPS register)
defines
a new macro to calculate the DSC PPS register addresses with PPS number as an
input. This macro correctly calculates the addresses till PPS 11 since the
addresses increment by 4. So in that case the following macro
Break intel_dp_hdcp2_capable so that the common the code can be
reused for the remote capability check.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git
Create a remote HDCP capability shim function which can read the
remote monitor HDCP capability when in MST configuration.
Signed-off-by: Suraj Kandpal
---
.../drm/i915/display/intel_display_types.h| 4
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 22 +++
Currently we are only checking capability of remote device and not
immediate downstream device but during capability check we need are
concerned with only the HDCP capability of downstream device.
During i915_display_info reporting we need HDCP Capability for both
the monitors and downstream
Now that we have moved back to direct reads the additional timing
is not required hence this can be removed.
--v2
-Add Fixes tag [Ankit]
Fixes: 3974f9c17bb9 ("drm/i915/hdcp: Adjust timeout for read in DPMST Scenario")
Signed-off-by: Suraj Kandpal
Reviewed-by: Ankit Nautiyal
---
Allocate stream id after HDCP AKE stage and not before so that it
can also be done during link integrity check.
Right now for MST scenarios LIC fails after hdcp enablement for this
reason.
Signed-off-by: Suraj Kandpal
---
.../drm/i915/display/intel_display_types.h| 1 +
Pass drm_dp_aux to intel_dp_hdcp_read_bcaps function
so as to aid in reading the bcaps for the remote monitor
later on.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git
Currently intel_hdcp is not being extracted from primary connector
this patch fixes that.
Fixes: 524240b231ea ("drm/i915/hdcp: Propagate aux info in DP HDCP functions")
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 7 +--
1 file changed, 5 insertions(+), 2
On 1/31/2024 10:48, Janusz Krzysztofik wrote:
Hi John,
On Wednesday, 10 January 2024 22:02:16 CET john.c.harri...@intel.com wrote:
From: John Harrison
The context persistence code does things like send super high priority
heartbeat pulses to ensure any leaked context can still be pre-empted
Create a remote HDCP capability shim function which can read the
remote monitor HDCP capability when in MST configuration.
Signed-off-by: Suraj Kandpal
---
.../drm/i915/display/intel_display_types.h| 4
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 22 +++
Move checks on the source side for HDCP2.2 into its own function
so that they can be used in the HDCP remote capability check
function.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff
Pass drm_dp_aux to intel_dp_hdcp_read_bcaps function
so as to aid in reading the bcaps for the remote monitor
later on.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git
Break intel_dp_hdcp2_capable so that the common the code can be
reused for the remote capability check.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_dp_hdcp.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git
We were seeing a blank screen whenever Type1 content was played.
This was due to extra timing which was taken as we had moved to
remote read and writes previously for MST scenario, which in turn
was done as we were not able to do direct read and writes to the
immediate downstream device.
The
Even for MST scenarios we need to do direct reads only on the
immediate downstream device the rest of the authentication is taken
care by that device. Remote reads will only be used to check
capability of the monitors in MST topology.
--v2
-Add fixes tag [Ankit]
-Derive aux where needed rather
Add a function to return the expected child device size. Flip the if
ladder around and use the same versions as in documentation to make it
easier to verify. Return an error for unknown versions. No functional
changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c |
On Wed, Jan 31, 2024 at 06:09:04PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 23, 2024 at 12:28:33PM +0200, Imre Deak wrote:
> > Add support for Display Port DP tunneling. For now this includes the
> > support for Bandwidth Allocation Mode, leaving adding Panel Replay
> > support for later.
> >
>
Separate the child device size check to a separate function for
clarity. No functional changes.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c | 79 +--
1 file changed, 44 insertions(+), 35 deletions(-)
diff --git
Hi John,
On Wednesday, 10 January 2024 22:02:16 CET john.c.harri...@intel.com wrote:
> From: John Harrison
>
> The context persistence code does things like send super high priority
> heartbeat pulses to ensure any leaked context can still be pre-empted
> and thus isn't a total denial of
VBT versions since 256 have an extra byte for EFP index.
Signed-off-by: Jani Nikula
---
drivers/gpu/drm/i915/display/intel_bios.c | 4 +++-
drivers/gpu/drm/i915/display/intel_vbt_defs.h | 1 +
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git
We were seeing a blank screen whenever Type1 content was played.
This was due to extra timing which was taken as we had moved to
remote read and writes previously for MST scenario, which in turn
was done as we were not able to do direct read and writes to the
immediate downstream device.
The
Even for MST scenarios we need to do direct reads only on the
immediate downstream device the rest of the authentication is taken
care by that device. Remote reads will only be used to check
capability of the monitors in MST topology.
--v2
-Add fixes tag [Ankit]
-Derive aux where needed rather
Move checks on the source side for HDCP2.2 into its own function
so that they can be used in the HDCP remote capability check
function.
Signed-off-by: Suraj Kandpal
---
drivers/gpu/drm/i915/display/intel_hdcp.c | 20 +---
1 file changed, 17 insertions(+), 3 deletions(-)
diff
> -Original Message-
> From: Richard Fitzgerald
> Sent: Wednesday, January 31, 2024 4:05 PM
> To: Borah, Chaitanya Kumar
> Cc: intel-gfx@lists.freedesktop.org; Kurmi, Suresh Kumar
> ; Saarinen, Jani ;
> David Gow ; kunit-...@googlegroups.com; linux-
> kselft...@vger.kernel.org
> Subject:
If KUnit is built as a module, and it's unloaded, the kunit_bus is not
unregistered. This causes an error if it's then re-loaded later, as we
try to re-register the bus.
Unregister the bus and root_device on shutdown, if it looks valid.
In addition, be more specific about the value of
On Wed, Jan 31, 2024 at 05:17:08AM +, Jason-JH Lin (林睿祥) wrote:
> On Thu, 2024-01-25 at 19:17 +0100, Daniel Vetter wrote:
> >
> > External email : Please do not click links or open attachments until
> > you have verified the sender or the content.
> > On Tue, Jan 23, 2024 at 06:09:05AM
Hi, Joonas
Here is another gvt-fixes pull which contains fixes on doc link and
one uninitialized variable in warning message, also update about Zhi's
new mail address in MAINTAINERS.
Thanks.
---
The following changes since commit f9f031dd21a7ce13a13862fa5281d32e1029c70f:
drm/i915/psr: Only
/0day-ci/archive/20240131/202401311604.1pllaxek-...@intel.com/config)
compiler: sparc64-linux-gcc (GCC) 13.2.0
If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot
| Reported-by: Dan
On Wed, 31 Jan 2024 at 11:11, Daniel Vetter wrote:
>
> On Wed, Jan 31, 2024 at 05:17:08AM +, Jason-JH Lin (林睿祥) wrote:
> > On Thu, 2024-01-25 at 19:17 +0100, Daniel Vetter wrote:
> > >
> > > External email : Please do not click links or open attachments until
> > > you have verified the
Hi,
On Wed, Jan 31, 2024 at 05:27:14AM +, Jason-JH Lin (林睿祥) wrote:
>
> On Sun, 2024-01-28 at 10:24 +0100, Maxime Ripard wrote:
> > On Thu, Jan 25, 2024 at 07:17:21PM +0100, Daniel Vetter wrote:
> > > On Tue, Jan 23, 2024 at 06:09:05AM +, Jason-JH Lin (林睿祥) wrote:
> > > > Hi Maxime,
In case of legacy cursor update, the cursor VMA needs to be unpinned
only after vblank. This exceeds the lifetime of the whole atomic commit.
Any trick I attempted to keep the atomic commit alive didn't work, as
drm_atomic_helper_setup_commit() force throttles on any old commit that
wasn't
From: Ville Syrjälä
The cursor hardware only does sync updates, and thus the hardware
will be scanning out from the old fb until the next start of vblank.
So in order to make the legacy cursor fastpath actually safe we
should not unpin the old fb until we're sure the hardware has
ceased
On Thu, Jan 25, 2024 at 03:59:36PM +0100, Michał Winiarski wrote:
> On Thu, Jan 25, 2024 at 11:08:04AM +0200, Ville Syrjälä wrote:
> > On Fri, Jan 19, 2024 at 01:12:11AM +0200, Ville Syrjälä wrote:
> > > On Wed, Jan 17, 2024 at 06:46:24PM +0100, Nirmoy Das wrote:
> > > >
> > > > On 1/17/2024 3:13
On Tue, Jan 30, 2024 at 09:36:51PM +0200, Juha-Pekka Heikkila wrote:
> Display engine support ccs only with tile4, prevent other modifiers
> from using compressed memory.
>
> Signed-off-by: Juha-Pekka Heikkila
> ---
> drivers/gpu/drm/xe/display/xe_fb_pin.c | 23 +++
> 1 file
From: Maarten Lankhorst
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2
From: Ville Syrjälä
The cursor hardware only does sync updates, and thus the hardware
will be scanning out from the old fb until the next start of vblank.
So in order to make the legacy cursor fastpath actually safe we
should not unpin the old fb until we're sure the hardware has
ceased
In case of legacy cursor update, the cursor VMA needs to be unpinned
only after vblank. This exceeds the lifetime of the whole atomic commit.
Any trick I attempted to keep the atomic commit alive didn't work, as
drm_atomic_helper_setup_commit() force throttles on any old commit that
wasn't
With a value of '0' read from MSTM_CAP register MST to be enabled.
DP2.1 SCR updates the spec for 128/132b DP capable supporting only one
stream and not supporting single stream sideband MSG.
The underlying protocol will be MST to enable use of MTP.
Signed-off-by: Arun R Murthy
---
With DP2.1, multistream packetization and the underneth MST protocol
will be required for SST. So check for MSTM_CAP to see if MST is really
required and skip the MSTM_CTRL write so that we ensure that only the
underneth protocol and the multistream packetization will be enabled and
sink will not
On Wed, Jan 31, 2024 at 01:40:30PM +0200, Ville Syrjälä wrote:
> On Tue, Jan 30, 2024 at 09:36:51PM +0200, Juha-Pekka Heikkila wrote:
> > Display engine support ccs only with tile4, prevent other modifiers
> > from using compressed memory.
> >
> > Signed-off-by: Juha-Pekka Heikkila
> > ---
> >
On Wed, Jan 31, 2024 at 12:26:45PM +0200, Dmitry Baryshkov wrote:
> On Wed, 31 Jan 2024 at 11:11, Daniel Vetter wrote:
> >
> > On Wed, Jan 31, 2024 at 05:17:08AM +, Jason-JH Lin (林睿祥) wrote:
> > > On Thu, 2024-01-25 at 19:17 +0100, Daniel Vetter wrote:
> > > >
> > > > External email : Please
Hey,
On 2024-01-30 20:16, Juha-Pekka Heikkila wrote:
On 29.1.2024 14.02, Matthew Auld wrote:
On 26/01/2024 21:08, Juha-Pekka Heikkila wrote:
Display engine support ccs only with tile4, prevent other modifiers
from using compressed memory. Store pin time pat index to xe_bo.
Signed-off-by:
From: Maarten Lankhorst
In some cases we want to flush all vblank work, right before vblank_off
for example. Add a simple function to make this possible.
Signed-off-by: Maarten Lankhorst
---
drivers/gpu/drm/drm_vblank_work.c | 22 ++
include/drm/drm_vblank_work.h | 2
On Fri, 12 Jan 2024, Alex Deucher wrote:
> On Wed, Jan 10, 2024 at 12:39 PM Jani Nikula wrote:
>>
>> This will trade the W=1 warning -Wformat-overflow to
>> -Wformat-truncation. This lets us enable -Wformat-overflow subsystem
>> wide.
>>
>> Cc: Alex Deucher
>> Cc: Christian König
>> Cc: Pan,
On Tue, 2024-01-23 at 12:28 +0200, Imre Deak wrote:
> Add support for Display Port DP tunneling. For now this includes the
> support for Bandwidth Allocation Mode, leaving adding Panel Replay
> support for later.
>
> BWA allows using displays that share the same (Thunderbolt) link with
> their
On Wed, 10 Jan 2024, Jani Nikula wrote:
> Fix the W=1 warning -Wunused-but-set-variable.
>
> Cc: Karol Herbst
> Cc: Lyude Paul
> Cc: Danilo Krummrich
> Cc: nouv...@lists.freedesktop.org
> Signed-off-by: Jani Nikula
Ping?
> ---
> drivers/gpu/drm/nouveau/nvkm/subdev/acr/lsfw.c | 3 +--
> 1
On Fri, 12 Jan 2024, Philipp Zabel wrote:
> Hi Jani,
>
> On Mi, 2024-01-10 at 19:39 +0200, Jani Nikula wrote:
>> This will trade the W=1 warning -Wformat-overflow to
>> -Wformat-truncation. This lets us enable -Wformat-overflow subsystem
>> wide.
>>
>> Cc: Philipp Zabel
>> Signed-off-by: Jani
On Wed, 10 Jan 2024, Jani Nikula wrote:
> Fix the W=1 warning -Wunused-but-set-variable.
>
> Cc: Karol Herbst
> Cc: Lyude Paul
> Cc: Danilo Krummrich
> Cc: nouv...@lists.freedesktop.org
> Signed-off-by: Jani Nikula
Ping?
> ---
> drivers/gpu/drm/nouveau/nouveau_svm.c | 10 +++---
> 1
On Wed, Jan 31, 2024 at 02:50:16PM +0200, Hogander, Jouni wrote:
> [...]
> > +
> > +struct drm_dp_tunnel_group;
> > +
> > +struct drm_dp_tunnel {
> > + struct drm_dp_tunnel_group *group;
> > +
> > + struct list_head node;
> > +
> > + struct kref kref;
> > +#ifdef
On Tue, Jan 23, 2024 at 12:28:33PM +0200, Imre Deak wrote:
> Add support for Display Port DP tunneling. For now this includes the
> support for Bandwidth Allocation Mode, leaving adding Panel Replay
> support for later.
>
> BWA allows using displays that share the same (Thunderbolt) link with
>
On Tue, Jan 23, 2024 at 12:28:49PM +0200, Imre Deak wrote:
> Suspend and resume DP tunnels during system suspend/resume, disabling
> the BW allocation mode during suspend, re-enabling it after resume. This
> reflects the link's BW management component (Thunderbolt CM) disabling
> BWA during
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