At Fri, 4 Jul 2014 10:00:37 +0800,
mengdong@intel.com wrote:
From: Jani Nikula jani.nik...@intel.com
For Haswell and Broadwell, if the display power well has been disabled,
the display audio controller divider values EM4 M VALUE and EM5 N VALUE
will have been lost. The CDCLK frequency
On Tue, Jul 01, 2014 at 11:17:43AM -0700, Ben Widawsky wrote:
Some of the original PPGTT patches in this area where unmerged, and this
left a lot of confusion in our error capture with regard to which vm/obj
we want to capture. There have been at least a couple of patches from
Chris, and
On Tue, Jul 01, 2014 at 11:17:51AM -0700, Ben Widawsky wrote:
I was dealing with a bug recently where the system would hard hang
somewhere between hangcheck and reset. There was time after error
collection to actually get my error state out, but I couldn't get the
reads to work.
This patch
On Fri, 2014-06-27 at 11:20 +0800, Aaron Lu wrote:
On 06/25/2014 07:08 PM, Jani Nikula wrote:
On Tue, 24 Jun 2014, Aaron Lu aaron...@intel.com wrote:
Some Thinkpad laptops' firmware will initiate a backlight level change
request through operation region on the events of AC plug/unplug, but
On Tue, Jul 01, 2014 at 11:17:40AM -0700, Ben Widawsky wrote:
As what was correctly debugged here:
commit acc240d41ea1ab9c488a79219fb313b5b46265ae
Author: Daniel Vetter daniel.vet...@ffwll.ch
Date: Thu Dec 5 15:42:34 2013 +0100
drm/i915: Fix use-after-free in do_switch
It then
I've tested legacy boot. I have this bug.
On Fri, Jun 27, 2014 at 7:20 AM, Aaron Lu aaron...@intel.com wrote:
On 06/25/2014 07:08 PM, Jani Nikula wrote:
On Tue, 24 Jun 2014, Aaron Lu aaron...@intel.com wrote:
Some Thinkpad laptops' firmware will initiate a backlight level change
request
On Fri, Jul 04, 2014 at 08:20:11AM +0100, Chris Wilson wrote:
Inlcude the pipe-size and cursor-size in debugfs.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
---
drivers/gpu/drm/i915/i915_debugfs.c | 10 +-
1
From: Ville Syrjälä ville.syrjala at linux.intel.com
The rotation property stuff should be standardized among all drivers.
Move the bits to drm_crtc.h from omap_drv.h.
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
Reviewed-by: Imre Deak imre.d...@intel.com
---
From: Sonika Jindal sonika.jin...@intel.com
Enables 180 degree rotation for sprite and primary planes.
Updated the primary plane rotation support as per the new universal plane
design.
Most of these patches were already reviewed in intel-gfx in February 2014 thats
why there is version history in
From: Ville Syrjälä ville.syrjala at linux.intel.com
Add a function to create a standards compliant rotation property.
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
Reviewed-by: Imre Deak imre.d...@intel.com
---
drivers/gpu/drm/drm_crtc.c | 18 ++
From: Ville Syrjälä ville.syrjala at linux.intel.com
Make drm_property_create_bitmask() a bit more generic by allowing the
caller to specify which bits are in fact supported. This allows multiple
callers to use the same enum list, but still create different versions
of the same property with
From: Ville Syrjälä ville.syrjala at linux.intel.com
Use the new drm_mode_create_rotation_property() in omapdrm.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
Reviewed-by: Rob Clark robdcl...@gmail.com
Reviewed-by: Imre Deak imre.d...@intel.com
From: Ville Syrjälä ville.syrjala at linux.intel.com
drm_rotation_simplify() can be used to eliminate unsupported rotation
flags. It will check if any unsupported flags are present, and if so
it will modify the rotation to an alternate form by adding 180 degrees
to rotation angle, and flipping
From: Ville Syrjälä ville.syrjala at linux.intel.com
Add some helper functions to move drm_rects between different rotated
coordinate spaces. One function does the forward transform and
another does the inverse.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
From: Ville Syrjälä ville.syrjala at linux.intel.com
Sprite planes support 180 degree rotation. The lower layers are now in
place, so hook in the standard rotation property to expose the feature
to the users.
v2: Moving rotation_property to drm_plane
Cc: dri-de...@lists.freedesktop.org
From: Sonika Jindal sonika.jin...@intel.com
Primary planes support 180 degree rotation. Expose the feature
through rotation drm property.
v2: Calculating linear/tiled offsets based on pipe source width and
height. Added 180 degree rotation support in ironlake_update_plane.
v3: Checking if CRTC
From: Sonika Jindal sonika.jin...@intel.com
Reset rotation property to 0 wherever applicable
v2: Also calling set_property of the plane to set the rotation in the plane
structure.
Cc: damien.lesp...@intel.com
Signed-off-by: Sonika Jindal sonika.jin...@intel.com
---
From: Ville Syrjälä ville.syrjala at linux.intel.com
Propagate the error from intel_update_plane() up through
intel_plane_restore() to the caller. This will be used for
rollback purposes when setting properties fails.
Cc: dri-de...@lists.freedesktop.org
Signed-off-by: Ville Syrjälä
From: Ville Syrjälä ville.syrjala at linux.intel.com
The sprite planes (in fact all display planes starting from gen4)
support 180 degree rotation. Add the relevant low level bits to the
sprite code to make use of that feature.
The upper layers are not yet plugged in.
v2: HSW handles the
2014-07-03 19:07 GMT-03:00 Clint Taylor clinton.a.tay...@intel.com:
On 07/02/2014 07:40 AM, Paulo Zanoni wrote:
2014-07-02 5:35 GMT-03:00 Jani Nikula jani.nik...@intel.com:
From: Clint Taylor clinton.a.tay...@intel.com
The panel power sequencer on vlv doesn't appear to accept changes to its
On Fri, 04 Jul 2014, Damien Lespiau damien.lesp...@intel.com wrote:
On Fri, Jul 04, 2014 at 08:20:11AM +0100, Chris Wilson wrote:
Inlcude the pipe-size and cursor-size in debugfs.
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
From: Paulo Zanoni paulo.r.zan...@intel.com
Don't let it fall in the HAS_PCH_SPLIT() case.
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
drivers/gpu/drm/i915/intel_dp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/intel_dp.c
From: Daniel Vetter daniel.vet...@ffwll.ch
This way only the dynamic WRPLL selection for hdmi ddi mode is
done in intel_ddi_pll_select.
v2: Don't clobber the precomputed values when selecting clocks fro
hdmi encoders.
v3 (from Paulo): Rebase on top of the s/IS_HASWELL/HAS_DDI/ patch.
On Thu, 03 Jul 2014, Chris Wilson ch...@chris-wilson.co.uk wrote:
On Thu, Jul 03, 2014 at 04:35:41PM +0530, Shobhit Kumar wrote:
We should keep DEVICE_READY bit set in the ULPS enter sequence. In
exit sequence also we should set DEVICE_READY, but thats causing
blankout for me. Also exit
From: Paulo Zanoni paulo.r.zan...@intel.com
And get/put it when needed. The special thing about this commit is
that it will now return false in ibx_pch_dpll_get_hw_state() in case
the power domain is not enabled. This will fix some WARNs we have when
we run pm_rpm on SNB.
Testcase: igt/pm_rpm
On Fri, Jul 04, 2014 at 11:26:03AM -0300, Paulo Zanoni wrote:
From: Paulo Zanoni paulo.r.zan...@intel.com
Don't let it fall in the HAS_PCH_SPLIT() case.
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
Reviewed-by: Damien Lespiau damien.lesp...@intel.com
--
Damien
---
From: Paulo Zanoni paulo.r.zan...@intel.com
So don't write it, otherwise we will trigger unclaimed register
errors.
Testcase: igt/pm_rpm/rte
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
From: Paulo Zanoni paulo.r.zan...@intel.com
If we enable unclaimed register reporting on Gen 8, we will discover
that the IRQ registers for pipes B and C are also on the power well,
so writes to them when the power well is disabled result in unclaimed
register errors.
Also,
From: Paulo Zanoni paulo.r.zan...@intel.com
By the time I wrote this patch, it allowed me to catch some problems.
But due to patch reordering - in order to prevent fake regression
reports - this patch may be merged after the fixes of the problems
identified by this patch.
Signed-off-by: Paulo
From: Paulo Zanoni paulo.r.zan...@intel.com
Hi
Even though this feature is super useful for hardware enabling, we ended up not
enabling it on BDW, so we still silently hit some unclaimed registers on this
platform. This series first fixes the bugs fround by the feature, then
introduces the
From: Paulo Zanoni paulo.r.zan...@intel.com
Move it from hsw_power_well_post_enable() (intel_pm.c) to i915_irq.c
so we can reuse the nice IRQ macros we have there. The main difference
is that now we're going to check if the IIR register is non-zero when
we try to re-enable the interrupts.
On Fri, Jul 04, 2014 at 03:14:02PM +0530, sonika.jin...@intel.com wrote:
+static int intel_primary_plane_set_property(struct drm_plane *plane,
+ struct drm_property *prop,
+ uint64_t val)
+{
+ struct drm_device *dev =
From: Paulo Zanoni paulo.r.zan...@intel.com
On HSW, the D_COMP register can be accessed through the mailbox (read
and write) or through MMIO on a MCHBAR offset (read only). On BDW, the
access should be done through MMIO on another address. So to account
for all these cases, create
From: Paulo Zanoni paulo.r.zan...@intel.com
That function can be used to write anything on D_COMP, not just
disable it, so print a more appropriate message.
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
drivers/gpu/drm/i915/intel_display.c | 2 +-
1 file changed, 1 insertion(+), 1
On Fri, Jul 04, 2014 at 03:13:52PM +0530, sonika.jin...@intel.com wrote:
From: Sonika Jindal sonika.jin...@intel.com
Enables 180 degree rotation for sprite and primary planes.
Updated the primary plane rotation support as per the new universal plane
design.
Most of these patches were
On Fri, Jul 04, 2014 at 03:14:03PM +0530, sonika.jin...@intel.com wrote:
From: Sonika Jindal sonika.jin...@intel.com
Reset rotation property to 0 wherever applicable
v2: Also calling set_property of the plane to set the rotation in the plane
structure.
Cc: damien.lesp...@intel.com
From: Paulo Zanoni paulo.r.zan...@intel.com
And get/put it when needed. The special thing about this commit is
that it will now return false in ibx_pch_dpll_get_hw_state() in case
the power domain is not enabled. This will fix some WARNs we have when
we run pm_rpm on SNB.
Testcase: igt/pm_rpm
From: Paulo Zanoni paulo.r.zan...@intel.com
Just like we already do in haswell_get_pipe_config(). This should
prevent some WARNs when we run pm_rpm on SNB.
Testcase: igt/pm_rpm
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80463
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
From: Paulo Zanoni paulo.r.zan...@intel.com
Hi
When I originally wrote and tested SNB runtime PM it was working without any
errors, then I sent the patches to the mailing list and we ended up discarding
one of the patches that was needed. We ended up replacing that patch with a few
patches that
From: Paulo Zanoni paulo.r.zan...@intel.com
We may reach this point while the machine is still runtime suspended,
so we'll hit a WARN. The other encoders also don't touch registers at
this point, so instead of waking the machine up, write some code to
keep the register always at the same state,
From: Paulo Zanoni paulo.r.zan...@intel.com
Just like we do for the other encoders. This should fix some WARNs
when running pm_rpm on SNB.
Testcase: igt/pm_rpm
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=80463
Signed-off-by: Paulo Zanoni paulo.r.zan...@intel.com
---
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