As we use WC updates of the PTE, we are responsible for notifying the
hardware when to flush its TLBs. Do so after we zap all the PTEs before
suspend (and the BIOS tries to read our GTT).
Signed-off-by: Chris Wilson ch...@chris-wilson.co.uk
---
drivers/gpu/drm/i915/i915_drv.h | 2 +-
On Wed, Aug 13, 2014 at 11:51:54AM +0100, Chris Wilson wrote:
As we use WC updates of the PTE, we are responsible for notifying the
hardware when to flush its TLBs. Do so after we zap all the PTEs before
suspend (and the BIOS tries to read our GTT).
Signed-off-by: Chris Wilson
On Wed, Aug 13, 2014 at 01:32:08PM +0200, Daniel Vetter wrote:
On Wed, Aug 13, 2014 at 11:51:54AM +0100, Chris Wilson wrote:
As we use WC updates of the PTE, we are responsible for notifying the
hardware when to flush its TLBs. Do so after we zap all the PTEs before
suspend (and the BIOS
