On Tue, 02 Apr 2013, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Extract the PIPECONF setup into i9xx_set_pipeconf(). This makes the
=Gen4/VLV code follow the same pattern as the Gen5+ codepaths.
Reviewed-by: Jani Nikula jani.nik...@intel.com
On Wed, Apr 03, 2013 at 01:08:16PM +0300, Jani Nikula wrote:
On Tue, 02 Apr 2013, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Extract the PIPECONF setup into i9xx_set_pipeconf(). This makes the
=Gen4/VLV code follow the same pattern as the Gen5+
On Wed, Apr 03, 2013 at 07:06:01PM +0200, Daniel Vetter wrote:
On Wed, Apr 03, 2013 at 01:08:16PM +0300, Jani Nikula wrote:
On Tue, 02 Apr 2013, ville.syrj...@linux.intel.com wrote:
From: Ville Syrjälä ville.syrj...@linux.intel.com
Extract the PIPECONF setup into i9xx_set_pipeconf().
From: Ville Syrjälä ville.syrj...@linux.intel.com
Extract the PIPECONF setup into i9xx_set_pipeconf(). This makes the
=Gen4/VLV code follow the same pattern as the Gen5+ codepaths.
Signed-off-by: Ville Syrjälä ville.syrj...@linux.intel.com
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drivers/gpu/drm/i915/intel_display.c | 123
