Re: pcie dma transfer

2018-06-04 Thread Christoph Böhmwalder
On Mon, Jun 04, 2018 at 02:05:05PM +0200, Greg KH wrote: > The problem in this design might happen right here. What happens > in the device between the interrupt being signaled, and the data being > copied out of the buffer? Where do new packets go to? How does the > device know it is "safe" to

Re: pcie dma transfer

2018-06-04 Thread Greg KH
On Mon, Jun 04, 2018 at 01:12:48PM +0200, Christoph Böhmwalder wrote: > Hi, > > I'm not sure how on-topic this is on this list, but I have a question > regarding a device driver design issue. > > For our Bachelor's project my team and I are tasked to optimize an > existing hardware solution. The

pcie dma transfer

2018-06-04 Thread Christoph Böhmwalder
Hi, I'm not sure how on-topic this is on this list, but I have a question regarding a device driver design issue. For our Bachelor's project my team and I are tasked to optimize an existing hardware solution. The design utilizes an FPGA to accomplish various tasks, including a Triple Speed