Hello, I wrote:
An initial work around might be the attached patch.
It seems both an overkill as it's x86 specific -- we already have
kernel-side breakpoint info mirrored in hw_breakpoint[], so I don't
see why would we need another array...
Maybe initally we should just hedge the
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Sergei Shtylyov wrote:
Hello.
Jason Wessel wrote:
Hm... yet the kernel I was booting was UP. The same happened with
SMP kernel I've just tried. Now I'm confused. :-/
something was broken WRT handling of the h/w breask as being per-CPU
Hello.
Jason Wessel wrote:
Hm... yet the kernel I was booting was UP. The same happened with
SMP kernel I've just tried. Now I'm confused. :-/
something was broken WRT handling of the h/w breask as being per-CPU
resource but not seeing anything obvious...
The piece that clears DR7
Sergei Shtylyov wrote:
Hm... yet the kernel I was booting was UP. The same happened with
SMP kernel I've just tried. Now I'm confused. :-/
something was broken WRT handling of the h/w breask as being per-CPU
resource but not seeing anything obvious...
The piece that clears DR7 is
Hello, I wrote:
BTW, I'm having starnge things happening with h/w breakpoints on i386
-- when I hit initial breakpoint, and enter:
(gdb) hb sys_sync
(gdb) c
and then enter 'sync' after login (even several times), the breakpoint
is not hit. It only starts being hit after I press Ctrl-C
Sergei Shtylyov wrote:
Hello, I wrote:
BTW, I'm having starnge things happening with h/w breakpoints on
i386 -- when I hit initial breakpoint, and enter:
(gdb) hb sys_sync
(gdb) c
and then enter 'sync' after login (even several times), the
breakpoint is not hit. It only starts being
Hello, I wrote:
BTW, I'm having starnge things happening with h/w breakpoints on
i386 -- when I hit initial breakpoint, and enter:
(gdb) hb sys_sync
(gdb) c
and then enter 'sync' after login (even several times), the breakpoint
is not hit. It only starts being hit after I press Ctrl-C in
Jason Wessel wrote:
BTW, I'm having starnge things happening with h/w breakpoints on
i386 -- when I hit initial breakpoint, and enter:
(gdb) hb sys_sync
(gdb) c
and then enter 'sync' after login (even several times), the
breakpoint is not hit. It only starts being hit after I press
Sergei Shtylyov wrote:
Fix the correct_hw_break() method for both i386 and x86_64 to update DR3 and
the corresponding bits in DR7. While at it:
- somewhat clarify the code setting the enable/type/length fileds in DR7;
- initilize the 'correctit' variable right when declaring it;
- fix the
Hello.
Jason Wessel wrote:
Fix the correct_hw_break() method for both i386 and x86_64 to update
DR3 and
the corresponding bits in DR7. While at it:
- somewhat clarify the code setting the enable/type/length fileds in DR7;
- initilize the 'correctit' variable right when declaring it;
-
Hello, I wrote:
BTW, I'm having starnge things happening with h/w breakpoints on i386
-- when I hit initial breakpoint, and enter:
(gdb) hb sys_sync
(gdb) c
and then enter 'sync' after login (even several times), the breakpoint
is not hit. It only starts being hit after I press Ctrl-C
Jason Wessel wrote:
BTW, I'm having starnge things happening with h/w breakpoints on
i386 -- when I hit initial breakpoint, and enter:
(gdb) hb sys_sync
(gdb) c
and then enter 'sync' after login (even several times), the breakpoint
is not hit. It only starts being hit after I press
Fix the correct_hw_break() method for both i386 and x86_64 to update DR3 and
the corresponding bits in DR7. While at it:
- somewhat clarify the code setting the enable/type/length fileds in DR7;
- initilize the 'correctit' variable right when declaring it;
- fix the mangled initializer for the
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