ePAPR defines the initial values of cpu registers. This patch initialize
the GPRs as per ePAPR specification.
This resolves the issue of guest reboot/reset (guest hang on reboot).
Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Signed-off-by: Stuart Yoder stuart.yo...@freescale.com
This was supposed to go to qemu-devel.
Please Ignore this patch:
Thanks
-Bharat
-Original Message-
From: Bhushan Bharat-R65777
Sent: Friday, April 26, 2013 11:44 AM
To: kvm-...@vger.kernel.org; kvm@vger.kernel.org; ag...@suse.de; Wood Scott-
B07421
Cc: Bhushan Bharat-R65777;
On 26.04.2013, at 02:11, Scott Wood wrote:
The hassle of getting refcounting right was greater than the hassle
of keeping a list of devices to destroy on VM exit.
Signed-off-by: Scott Wood scottw...@freescale.com
Thanks, applied both to my irqfd mpic queue.
Alex
---
On 2013-04-25 10:00, Nakajima, Jun wrote:
On Wed, Apr 24, 2013 at 8:55 AM, Nakajima, Jun jun.nakaj...@intel.com wrote:
Sorry about the slow progress. We've been distracted by some priority
things. The patches are ready (i.e. working), but we are cleaning them
up. I'll send what we have today.
* Borislav Petkov b...@alien8.de wrote:
From: Borislav Petkov b...@suse.de
Date: Tue, 16 Apr 2013 18:24:34 +0200
Subject: [PATCH -v2] x86: Add a Kconfig shortcut for kvm guest kernel
This is pretty useful for the case where people want to boot the
resulting kernel in qemu/kvm. Instead of
Recent KVM, since http://kerneltrap.org/mailarchive/linux-kvm/2010/5/2/6261577
switch the EFER MSR when EPT is used and the host and guest have different
NX bits. So if we add support for nested EPT (L1 guest using EPT to run L2)
and want to be able to run recent KVM as L1, we need to allow L1 to
This is the first patch in a series which adds nested EPT support to KVM's
nested VMX. Nested EPT means emulating EPT for an L1 guest so that L1 can use
EPT when running a nested guest L2. When L1 uses EPT, it allows the L2 guest
to set its own cr3 and take its own page faults without either of L0
KVM's existing shadow MMU code already supports nested TDP. To use it, we
need to set up a new MMU context for nested EPT, and create a few callbacks
for it (nested_ept_*()). This context should also use the EPT versions of
the page table access functions (defined in the previous patch).
Then, we
The existing code for handling cr3 and related VMCS fields during nested
exit and entry wasn't correct in all cases:
If L2 is allowed to control cr3 (and this is indeed the case in nested EPT),
during nested exit we must copy the modified cr3 from vmcs02 to vmcs12, and
we forgot to do so. This
kvm_set_cr3() attempts to check if the new cr3 is a valid guest physical
address. The problem is that with nested EPT, cr3 is an *L2* physical
address, not an L1 physical address as this test expects.
As the comment above this test explains, it isn't necessary, and doesn't
correspond to anything
Some additional comments to preexisting code:
Explain who (L0 or L1) handles EPT violation and misconfiguration exits.
Don't mention shadow on either EPT or shadow as the only two options.
Signed-off-by: Nadav Har'El n...@il.ibm.com
Signed-off-by: Jun Nakajima jun.nakaj...@intel.com
Advertise the support of EPT to the L1 guest, through the appropriate MSR.
This is the last patch of the basic Nested EPT feature, so as to allow
bisection through this patch series: The guest will not see EPT support until
this last patch, and will not attempt to use the half-applied feature.
If we let L1 use EPT, we should probably also support the INVEPT instruction.
In our current nested EPT implementation, when L1 changes its EPT table for
L2 (i.e., EPT12), L0 modifies the shadow EPT table (EPT02), and in the course
of this modification already calls INVEPT. Therefore, when L1
Update the documentation to no longer say that nested EPT is not supported.
Signed-off-by: Nadav Har'El n...@il.ibm.com
Signed-off-by: Jun Nakajima jun.nakaj...@intel.com
Signed-off-by: Xinhao Xu xinhao...@intel.com
---
Documentation/virtual/kvm/nested-vmx.txt | 4 ++--
1 file changed, 2
Some trivial code cleanups not really related to nested EPT.
Signed-off-by: Nadav Har'El n...@il.ibm.com
Signed-off-by: Jun Nakajima jun.nakaj...@intel.com
Signed-off-by: Xinhao Xu xinhao...@intel.com
---
arch/x86/kvm/vmx.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git
Save [2:0] of exit qualificaiton at EPT violation, and use the information when
injecting EPT violation.
Signed-off-by: Jun Nakajima jun.nakaj...@intel.com
Signed-off-by: Xinhao Xu xinhao...@intel.com
---
arch/x86/include/asm/kvm_host.h | 2 ++
arch/x86/kvm/paging_tmpl.h | 5 +
On 25.04.2013, at 18:33, Bharat Bhushan wrote:
From: Bharat Bhushan bharat.bhus...@freescale.com
Kernel can only access pages which maps as memory.
So flush only the valid kernel pages.
Signed-off-by: Bharat Bhushan bharat.bhus...@freescale.com
Thanks, applied to kvm-ppc-queue.
Alex
The prototype has been stale for a while, I can't spot any real function
define behind it. Let's just remove it.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
include/linux/kvm_host.h |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
Quite a bit of code in KVM has been conditionalized on availability of
IOAPIC emulation. However, most of it is generically applicable to
platforms that don't have an IOPIC, but a different type of irq chip.
Make code that only relies on IRQ routing, not an APIC itself, on
Hi,
This patch set contains a fully working implementation of the in-kernel MPIC
from Scott with a few fixups and a new version of my irqfd generalization
patch set.
v1 - v2:
- depend on CONFIG_ defines rather than __KVM defines
- fix compile issues
- fix the kvm_irqchip{,s} typo
v2 -
Now that we have most irqfd code completely platform agnostic, let's move
irqfd's resample capability return to generic code as well.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
arch/x86/kvm/x86.c |1 -
virt/kvm/kvm_main.c |3 +++
2 files
From: Scott Wood scottw...@freescale.com
The hassle of getting refcounting right was greater than the hassle
of keeping a list of devices to destroy on VM exit.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/mpic.c |2 --
From: Scott Wood scottw...@freescale.com
We no longer need to keep track of this now that MPIC destruction
always happens either during VM destruction (after MMIO has been
destroyed) or during a failed creation (before the fd has been exposed
to userspace, and thus before the MMIO region could
The code as is doesn't make any sense on non-e500 platforms. Restrict it
there, so that people don't get wrong ideas on what would actually work.
This patch should get reverted as soon as it's possible to either run e500
guests on non-e500 hosts or the MPIC emulation gains support for non-e500
We changed a few things in non-ia64 code paths. This patch blindly applies
the changes to the ia64 code as well, hoping it proves useful in case anyone
revives the ia64 kvm code.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/ia64/include/asm/kvm_host.h |1 +
arch/ia64/kvm/Kconfig
From: Scott Wood scottw...@freescale.com
Hook the MPIC code up to the KVM interfaces, add locking, etc.
Signed-off-by: Scott Wood scottw...@freescale.com
[agraf: add stub function for kvmppc_mpic_set_epr, non-booke, 64bit]
Signed-off-by: Alexander Graf ag...@suse.de
---
v2 - v3:
- fix
From: Scott Wood scottw...@freescale.com
This is QEMU's hw/openpic.c from commit
abd8d4a4d6dfea7ddea72f095f993e1de941614e (Update version for
1.4.0-rc0), run through Lindent with no other changes to ease merging
future changes between Linux and QEMU. Remaining style issues
(including those
From: Scott Wood scottw...@freescale.com
Remove braces that Linux style doesn't permit, remove space after
'*' that Lindent added, keep error/debug strings contiguous, etc.
Substitute type names, debug prints, etc.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf
We have a capability enquire system that allows user space to ask kvm
whether a feature is available.
The point behind this system is that we can have different kernel
configurations with different capabilities and user space can adjust
accordingly.
Because features can always be non existent,
From: Scott Wood scottw...@freescale.com
Remove some parts of the code that are obviously QEMU or Raven specific
before fixing style issues, to reduce the style issues that need to be
fixed.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
Now that all pieces are in place for reusing generic irq infrastructure,
we can copy x86's implementation of KVM_IRQ_LINE irq injection and simply
reuse it for PPC, as it will work there just as well.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/uapi/asm/kvm.h |1 +
From: Scott Wood scottw...@freescale.com
Enabling this capability connects the vcpu to the designated in-kernel
MPIC. Using explicit connections between vcpus and irqchips allows
for flexibility, but the main benefit at the moment is that it
simplifies the code -- KVM doesn't need vm-global
Now that all the irq routing and irqfd pieces are generic, we can expose
real irqchip support to all of KVM's internal helpers.
This allows us to use irqfd with the in-kernel MPIC.
Signed-off-by: Alexander Graf ag...@suse.de
---
v2 - v3:
- make mpic pointer type safe
- add wmb before
From: Scott Wood scottw...@freescale.com
Currently, devices that are emulated inside KVM are configured in a
hardcoded manner based on an assumption that any given architecture
only has one way to do it. If there's any need to access device state,
it is done through inflexible one-purpose-only
The current irq_comm.c file contains pieces of code that are generic
across different irqchip implementations, as well as code that is
fully IOAPIC specific.
Split the generic bits out into irqchip.c.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
The IRQ routing set ioctl lives in the hacky device assignment code inside
of KVM today. This is definitely the wrong place for it. Move it to the much
more natural kvm_main.c.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
virt/kvm/assigned-dev.c |
Setting up IRQ routes is nothing IOAPIC specific. Extract everything
that really is generic code into irqchip.c and only leave the ioapic
specific bits to irq_comm.c.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
include/linux/kvm_host.h |3 ++
The concept of routing interrupt lines to an irqchip is nothing
that is IOAPIC specific. Every irqchip has a maximum number of pins
that can be linked to irq lines.
So let's add a new define that allows us to reuse generic code for
non-IOAPIC platforms.
Signed-off-by: Alexander Graf
-Original Message-
From: Zhang, Yang Z [mailto:yang.z.zh...@intel.com]
Sent: Friday, April 26, 2013 1:10 PM
To: Yangminqiang; kvm@vger.kernel.org
Cc: g...@redhat.com; mtosa...@redhat.com; Zhang, Xiantao; Nakajima, Jun;
Luohao (brian); Haofeng
Subject: RE: [PATCH v10 7/7] KVM: VMX:
On 04/26/2013 11:11 AM, tiejun.chen wrote:
On 04/25/2013 07:32 PM, Caraman Mihai Claudiu-B02008 wrote:
Is the flowing is fine with that generic machine, ppce500, to boot
P5040DS with
64bit,
./qemu-system-ppc64 -enable-kvm -m 1048 -nographic -M ppce500 -kernel
uImage
-initrd ramdisk.gz -L .
On Fri, Apr 26, 2013 at 08:42:50AM +0200, Ingo Molnar wrote:
... take all review comments
Here it is:
--
From 56880e448600ca1504df8c68c59f31153f7b5b0f Mon Sep 17 00:00:00 2001
From: Borislav Petkov b...@suse.de
Date: Tue, 16 Apr 2013 18:24:34 +0200
Subject: [PATCH -v2.1] x86: Add a Kconfig
On Thu, Apr 25, 2013 at 01:59:20PM -0500, Scott Wood wrote:
On 04/25/2013 01:22:04 PM, Gleb Natapov wrote:
On Thu, Apr 25, 2013 at 11:51:08AM -0500, Scott Wood wrote:
On 04/25/2013 05:47:39 AM, Alexander Graf wrote:
On 25.04.2013, at 11:43, Gleb Natapov wrote:
+void
On 26.04.2013, at 11:53, Gleb Natapov wrote:
On Thu, Apr 25, 2013 at 01:59:20PM -0500, Scott Wood wrote:
On 04/25/2013 01:22:04 PM, Gleb Natapov wrote:
On Thu, Apr 25, 2013 at 11:51:08AM -0500, Scott Wood wrote:
On 04/25/2013 05:47:39 AM, Alexander Graf wrote:
On 25.04.2013, at 11:43,
On Fri, Apr 26, 2013 at 11:55:27AM +0200, Alexander Graf wrote:
On 26.04.2013, at 11:53, Gleb Natapov wrote:
On Thu, Apr 25, 2013 at 01:59:20PM -0500, Scott Wood wrote:
On 04/25/2013 01:22:04 PM, Gleb Natapov wrote:
On Thu, Apr 25, 2013 at 11:51:08AM -0500, Scott Wood wrote:
On
On 08.04.2013, at 12:32, Bharat Bhushan wrote:
From: Bharat Bhushan bharat.bhus...@freescale.com
ehpriv instruction is used for setting software breakpoints
by user space. This patch adds support to exit to user space
with run-debug have relevant information.
Signed-off-by: Bharat
On 04/26/2013 06:45 PM, Alexander Graf wrote:
On 08.04.2013, at 12:32, Bharat Bhushan wrote:
From: Bharat Bhushan bharat.bhus...@freescale.com
ehpriv instruction is used for setting software breakpoints
by user space. This patch adds support to exit to user space
with run-debug have relevant
On 08.04.2013, at 12:32, Bharat Bhushan wrote:
From: Bharat Bhushan bharat.bhus...@freescale.com
This patch adds the debug stub support on booke/bookehv.
Now QEMU debug stub can use hw breakpoint, watchpoint and software
breakpoint to debug guest.
Debug registers are saved/restored on
On 08.04.2013, at 12:32, Bharat Bhushan wrote:
From: Bharat Bhushan bharat.bhus...@freescale.com
This patchset adds the userspace debug support for booke/bookehv.
this is tested on powerpc e500v2/e500mc devices.
We are now assuming that debug resource will not be used by
kernel for its
On Fri, Apr 26, 2013 at 2:29 AM, Yangminqiang yangminqi...@huawei.com wrote:
Ivytown or newer platform supported it.
Ivytown? Do you mean Ivy Bridge?
Ivy Town is the codename of Ivy Bridge-based servers.
--
Jun
Intel Open Source Technology Center
--
To unsubscribe from this list: send the
On 11.04.2013, at 12:03, Mihai Caraman wrote:
Enable basic support for Freescale e6500 core, adding MAV 2.0 support.
Validated on T4240QDS platfrom. Altivec, Multithreading and HW Tablewalk
are not addressed by this patchset.
Thanks, applied all to kvm-ppc-queue.
Alex
Mihai Caraman
On 19.04.2013, at 07:49, Paul Mackerras wrote:
This series of two patches fixes a couple of bugs in live migration
under HV-style KVM on PPC. They only touch PPC/HV code and add no new
APIs. The patches are against Alex Graf's kvm-ppc-next branch. I
would like them to go in for 3.10.
On 18.04.2013, at 08:29, Paul Mackerras wrote:
This is a repost of my patch series implementing in-kernel emulation
of the XICS interrupt controller architecture defined in PAPR (Power
Architecture Platform Requirements, the document that defines IBM's
pSeries platform architecture). This
On Thu, Apr 25, 2013 at 11:26 PM, Jan Kiszka jan.kis...@web.de wrote:
That's great but - as Gleb already said - unfortunately not yet usable.
I'd like to rebase my fixes and enhancements (unrestricted guest mode
specifically) on top these days, and also run some tests with a non-KVM
guest.
On Mon, Apr 22, 2013 at 11:38:10AM +0200, Borislav Petkov wrote:
On Mon, Apr 22, 2013 at 10:53:42AM +0200, Paolo Bonzini wrote:
Il 21/04/2013 14:23, Borislav Petkov ha scritto:
On Sun, Apr 21, 2013 at 01:46:50PM +0200, Borislav Petkov wrote:
We probably need something with copying values
KVM is an industry leading open source hypervisor that provides an ideal
platform for datacenter virtualization, virtual desktop infrastructure,
and cloud computing. Once again, it's time to bring together the
community of developers and users that define the KVM ecosystem for
our annual
On Mon, Apr 08, 2013 at 05:17:04PM +0100, Marc Zyngier wrote:
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h
b/arch/arm64/include/asm/pgtable-hwdef.h
index 75fd13d..acb4ee5 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++ b/arch/arm64/include/asm/pgtable-hwdef.h
@@ -68,6 +69,18
On 26/04/13 18:01, Catalin Marinas wrote:
On Mon, Apr 08, 2013 at 05:17:04PM +0100, Marc Zyngier wrote:
diff --git a/arch/arm64/include/asm/pgtable-hwdef.h
b/arch/arm64/include/asm/pgtable-hwdef.h
index 75fd13d..acb4ee5 100644
--- a/arch/arm64/include/asm/pgtable-hwdef.h
+++
On 04/26/2013 09:30:37 AM, Alexander Graf wrote:
On 18.04.2013, at 08:29, Paul Mackerras wrote:
This is a repost of my patch series implementing in-kernel emulation
of the XICS interrupt controller architecture defined in PAPR (Power
Architecture Platform Requirements, the document that
Hi,
This patch set contains a fully working implementation of the in-kernel MPIC
from Scott with a few fixups and a new version of my irqfd generalization
patch set.
v1 - v2:
- depend on CONFIG_ defines rather than __KVM defines
- fix compile issues
- fix the kvm_irqchip{,s} typo
v2 -
We have a capability enquire system that allows user space to ask kvm
whether a feature is available.
The point behind this system is that we can have different kernel
configurations with different capabilities and user space can adjust
accordingly.
Because features can always be non existent,
From: Scott Wood scottw...@freescale.com
Remove braces that Linux style doesn't permit, remove space after
'*' that Lindent added, keep error/debug strings contiguous, etc.
Substitute type names, debug prints, etc.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf
The code as is doesn't make any sense on non-e500 platforms. Restrict it
there, so that people don't get wrong ideas on what would actually work.
This patch should get reverted as soon as it's possible to either run e500
guests on non-e500 hosts or the MPIC emulation gains support for non-e500
From: Scott Wood scottw...@freescale.com
Hook the MPIC code up to the KVM interfaces, add locking, etc.
Signed-off-by: Scott Wood scottw...@freescale.com
[agraf: add stub function for kvmppc_mpic_set_epr, non-booke, 64bit]
Signed-off-by: Alexander Graf ag...@suse.de
---
v2 - v3:
- fix
From: Scott Wood scottw...@freescale.com
Hook the MPIC code up to the KVM interfaces, add locking, etc.
Signed-off-by: Scott Wood scottw...@freescale.com
[agraf: add stub function for kvmppc_mpic_set_epr, non-booke, 64bit]
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Scott Wood scottw...@freescale.com
Remove braces that Linux style doesn't permit, remove space after
'*' that Lindent added, keep error/debug strings contiguous, etc.
Substitute type names, debug prints, etc.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf
From: Michael Ellerman mich...@ellerman.id.au
For pseries machine emulation, in order to move the interrupt
controller code to the kernel, we need to intercept some RTAS
calls in the kernel itself. This adds an infrastructure to allow
in-kernel handlers to be registered for RTAS services by
From: Benjamin Herrenschmidt b...@kernel.crashing.org
This adds an implementation of the XICS hypercalls in real mode for HV
KVM, which allows us to avoid exiting the guest MMU context on all
threads for a variety of operations such as fetching a pending
interrupt, EOI of messages, IPIs, etc.
From: Benjamin Herrenschmidt b...@kernel.crashing.org
This adds in-kernel emulation of the XICS (eXternal Interrupt
Controller Specification) interrupt controller specified by PAPR, for
both HV and PR KVM guests.
The XICS emulation supports up to 1048560 interrupt sources.
Interrupt source
From: Benjamin Herrenschmidt b...@kernel.crashing.org
Currently, we wake up a CPU by sending a host IPI with
smp_send_reschedule() to thread 0 of that core, which will take all
threads out of the guest, and cause them to re-evaluate their
interrupt status on the way back in.
This adds a
From: Paul Mackerras pau...@samba.org
This adds the ability for userspace to save and restore the state
of the XICS interrupt presentation controllers (ICPs) via the
KVM_GET/SET_ONE_REG interface. Since there is one ICP per vcpu, we
simply define a new 64-bit register in the ONE_REG space for
From: Paul Mackerras pau...@samba.org
This adds support for the ibm,int-on and ibm,int-off RTAS calls to the
in-kernel XICS emulation and corrects the handling of the saved
priority by the ibm,set-xive RTAS call. With this, ibm,int-off sets
the specified interrupt's priority in its
From: Paul Mackerras pau...@samba.org
This streamlines our handling of external interrupts that come in
while we're in the guest. First, when waking up a hardware thread
that was napping, we split off the napping due to H_CEDE case
earlier, and use the code that handles an external interrupt
From: Scott Wood scottw...@freescale.com
We no longer need to keep track of this now that MPIC destruction
always happens either during VM destruction (after MMIO has been
destroyed) or during a failed creation (before the fd has been exposed
to userspace, and thus before the MMIO region could
From: Scott Wood scottw...@freescale.com
The hassle of getting refcounting right was greater than the hassle
of keeping a list of devices to destroy on VM exit.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/mpic.c |2 --
We changed a few things in non-ia64 code paths. This patch blindly applies
the changes to the ia64 code as well, hoping it proves useful in case anyone
revives the ia64 kvm code.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/ia64/include/asm/kvm_host.h |1 +
arch/ia64/kvm/Kconfig
The code as is doesn't make any sense on non-e500 platforms. Restrict it
there, so that people don't get wrong ideas on what would actually work.
This patch should get reverted as soon as it's possible to either run e500
guests on non-e500 hosts or the MPIC emulation gains support for non-e500
Now that all pieces are in place for reusing generic irq infrastructure,
we can copy x86's implementation of KVM_IRQ_LINE irq injection and simply
reuse it for PPC, as it will work there just as well.
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/include/uapi/asm/kvm.h |1 +
Now that all the irq routing and irqfd pieces are generic, we can expose
real irqchip support to all of KVM's internal helpers.
This allows us to use irqfd with the in-kernel MPIC.
Signed-off-by: Alexander Graf ag...@suse.de
---
Documentation/virtual/kvm/devices/mpic.txt | 19 +
From: Scott Wood scottw...@freescale.com
Remove some parts of the code that are obviously QEMU or Raven specific
before fixing style issues, to reduce the style issues that need to be
fixed.
Signed-off-by: Scott Wood scottw...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Scott Wood scottw...@freescale.com
Enabling this capability connects the vcpu to the designated in-kernel
MPIC. Using explicit connections between vcpus and irqchips allows
for flexibility, but the main benefit at the moment is that it
simplifies the code -- KVM doesn't need vm-global
From: Scott Wood scottw...@freescale.com
This is QEMU's hw/openpic.c from commit
abd8d4a4d6dfea7ddea72f095f993e1de941614e (Update version for
1.4.0-rc0), run through Lindent with no other changes to ease merging
future changes between Linux and QEMU. Remaining style issues
(including those
Quite a bit of code in KVM has been conditionalized on availability of
IOAPIC emulation. However, most of it is generically applicable to
platforms that don't have an IOPIC, but a different type of irq chip.
Make code that only relies on IRQ routing, not an APIC itself, on
From: Scott Wood scottw...@freescale.com
Currently, devices that are emulated inside KVM are configured in a
hardcoded manner based on an assumption that any given architecture
only has one way to do it. If there's any need to access device state,
it is done through inflexible one-purpose-only
Setting up IRQ routes is nothing IOAPIC specific. Extract everything
that really is generic code into irqchip.c and only leave the ioapic
specific bits to irq_comm.c.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
include/linux/kvm_host.h |3 ++
The current irq_comm.c file contains pieces of code that are generic
across different irqchip implementations, as well as code that is
fully IOAPIC specific.
Split the generic bits out into irqchip.c.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
The prototype has been stale for a while, I can't spot any real function
define behind it. Let's just remove it.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
include/linux/kvm_host.h |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
Now that we have most irqfd code completely platform agnostic, let's move
irqfd's resample capability return to generic code as well.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
arch/x86/kvm/x86.c |1 -
virt/kvm/kvm_main.c |3 +++
2 files
We have a capability enquire system that allows user space to ask kvm
whether a feature is available.
The point behind this system is that we can have different kernel
configurations with different capabilities and user space can adjust
accordingly.
Because features can always be non existent,
The IRQ routing set ioctl lives in the hacky device assignment code inside
of KVM today. This is definitely the wrong place for it. Move it to the much
more natural kvm_main.c.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
virt/kvm/assigned-dev.c |
From: Mihai Caraman mihai.cara...@freescale.com
Add e6500 core to Kconfig description.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/Kconfig |6 +++---
1 files changed, 3 insertions(+), 3 deletions(-)
diff --git
From: Mihai Caraman mihai.cara...@freescale.com
Vcpu's MMU default configuration and geometry update logic was buried in
a chunk of code. Move them to dedicated functions to add more clarity.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Mihai Caraman mihai.cara...@freescale.com
EPTCFG register defined by E.PT is accessed unconditionally by Linux guests
in the presence of MAV 2.0. Emulate it now.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Paul Mackerras pau...@samba.org
At present, the code that determines whether a HPT entry has changed,
and thus needs to be sent to userspace when it is copying the HPT,
doesn't consider a hardware update to the reference and change bits
(R and C) in the HPT entries to constitute a change
The concept of routing interrupt lines to an irqchip is nothing
that is IOAPIC specific. Every irqchip has a maximum number of pins
that can be linked to irq lines.
So let's add a new define that allows us to reuse generic code for
non-IOAPIC platforms.
Signed-off-by: Alexander Graf
From: Paul Mackerras pau...@samba.org
At present, the KVM_GET_DIRTY_LOG ioctl doesn't report modifications
done by the host to the virtual processor areas (VPAs) and dispatch
trace logs (DTLs) registered by the guest. This is because those
modifications are done either in real mode or in the
From: Mihai Caraman mihai.cara...@freescale.com
Extend processor compatibility names to e6500 cores.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Reviewed-by: Alexander Graf ag...@suse.de
Signed-off-by: Alexander Graf ag...@suse.de
---
arch/powerpc/kvm/e500mc.c |2 ++
1 files
From: Mihai Caraman mihai.cara...@freescale.com
Add support for TLBnPS registers available in MMU Architecture Version
(MAV) 2.0.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
Documentation/virtual/kvm/api.txt |4
The prototype has been stale for a while, I can't spot any real function
define behind it. Let's just remove it.
Signed-off-by: Alexander Graf ag...@suse.de
Acked-by: Michael S. Tsirkin m...@redhat.com
---
include/linux/kvm_host.h |5 -
1 files changed, 0 insertions(+), 5 deletions(-)
From: Mihai Caraman mihai.cara...@freescale.com
Embedded.Page Table (E.PT) category is not supported yet in e6500 kernel.
Configure TLBnCFG to remove E.PT and E.HV.LRAT categories from VCPUs.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Signed-off-by: Alexander Graf ag...@suse.de
---
From: Mihai Caraman mihai.cara...@freescale.com
MMU registers were exposed to user-space using sregs interface. Add them
to ONE_REG interface using kvmppc_get_one_reg/kvmppc_set_one_reg delegation
mechanism.
Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
Signed-off-by: Alexander Graf
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