On 2014-05-15 07:54, Arthur Chunqi Li wrote:
Hi Jan and there,
I want to disable IDE BMDMA in Qemu/KVM and let guest OS uses only PIO
mode. Are there any configurations in Qemu or KVM to disable the
hardware support of DMA?
Not that I know. These features are built into the chipsets we
On Thu, May 15, 2014 at 2:39 PM, Jan Kiszka jan.kis...@web.de wrote:
On 2014-05-15 07:54, Arthur Chunqi Li wrote:
Hi Jan and there,
I want to disable IDE BMDMA in Qemu/KVM and let guest OS uses only PIO
mode. Are there any configurations in Qemu or KVM to disable the
hardware support of DMA?
On 2014-05-15 08:55, Arthur Chunqi Li wrote:
On Thu, May 15, 2014 at 2:39 PM, Jan Kiszka jan.kis...@web.de wrote:
On 2014-05-15 07:54, Arthur Chunqi Li wrote:
Hi Jan and there,
I want to disable IDE BMDMA in Qemu/KVM and let guest OS uses only PIO
mode. Are there any configurations in Qemu
On 05/15/2014 07:26 AM, Anup Patel wrote:
On Fri, May 9, 2014 at 6:15 PM, Eric Auger eric.au...@linaro.org wrote:
This patch enables irqfd and irq routing on ARM.
It turns on CONFIG_HAVE_KVM_EVENTFD and CONFIG_HAVE_KVM_IRQ_ROUTING
irqfd framework enables to assign physical IRQs to guests.
https://bugzilla.kernel.org/show_bug.cgi?id=76191
Julian d...@psyrium.com.au changed:
What|Removed |Added
Status|NEW |RESOLVED
From: Cornelia Huck cornelia.h...@de.ibm.com
s390 has acquired irqfd support with commit KVM: s390: irq routing for
adapter interrupts (84223598778ba08041f4297fda485df83414d57e) but
failed to announce it. Let's fix that.
Signed-off-by: Cornelia Huck cornelia.h...@de.ibm.com
Acked-by: Christian
Paolo,
here is a fix for kvm/master targetting 3.15
The following changes since commit 5367742ad5321dd38058420adb4750ed9c7ead1e:
Merge tag 'signed-for-3.15' of git://github.com/agraf/linux-2.6 into
kvm-master (2014-05-13 18:15:16 +0200)
are available in the git repository at:
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This patch is trying to increase the maximum supported vcpu number.
There has been big system supporting more than 256 logical CPUs, and vmware
can also support guest system with more than logical 256 CPUs. So kvm should
also increase the maximum supported cpu number.
This patch only includes
2014-05-15 17:50+0800, Li, Zhen-Hua:
This patch is trying to increase the maximum supported vcpu number.
There has been big system supporting more than 256 logical CPUs, and vmware
can also support guest system with more than logical 256 CPUs. So kvm should
also increase the maximum
We get an array of instructions from the hypervisor via device tree that
we write into a buffer that gets executed whenever we want to make an
ePAPR compliant hypercall.
However, the hypervisor passes us these instructions in BE order which
we have to manually convert to LE when we want to run
There are LE Linux guests out there that don't handle hypercalls correctly.
Instead of interpreting the instruction stream from device tree as big endian
they assume it's a little endian instruction stream and fail.
When we see an illegal instruction from such a byte reversed instruction stream,
On LPAR guest systems Linux enables the shadow SLB to indicate to the
hypervisor a number of SLB entries that always have to be available.
Today we go through this shadow SLB and disable all ESID's valid bits.
However, pHyp doesn't like this approach very much and honors us with
fancy machine
We didn't make use of SLB entry 0 because ... of no good reason. SLB entry 0
will always be used by the Linux linear SLB entry, so the fact that slbia
does not invalidate it doesn't matter as we overwrite SLB 0 on exit anyway.
Just enable use of SLB entry 0 for our shadow SLB code.
Just for info: Lubuntu 14.04 PowerPC on QEMU with PR KVM enabled is
faster on my PA6T system than Lubuntu 14.04 PowerPC on QEMU on my
2.93GHz quad core PC. That's amazing.
Screenshot: http://www.supertuxkart-amiga.de/amiga/QEMU_PR_KVM_A1-X1000.jpg
Thanks a lot for PR KVM! :-)
- Christian
--
Table 7-1 of the SDM mentions a check that the code segment's
DPL must match the selector's RPL. This was not done by KVM,
fix it.
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
arch/x86/kvm/emulate.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
Another day, another CPL patch...
It turns out that the simple approach of getting CPL from SS.DPL
broke x86/taskswitch2.flat. To fix that, already imagine that the
CPL is CS.RPL, or 3 for VM86 tasks, while loading segment descriptors
during task switches. This removes the hack where task
During task switch, all of CS.DPL, CS.RPL, SS.DPL must match (in addition
to all the other requirements) and will be the new CPL. So far this
worked by carefully setting the CS selector and flag before doing the
task switch; however, this will not work once we get the CPL from SS.DPL:
setting SS
CS.RPL is not equal to the CPL in the few instructions between
setting CR0.PE and reloading CS. And CS.DPL is also not equal
to the CPL for conforming code segments.
However, SS.DPL *is* always equal to the CPL except for the weird
case of SYSRET on AMD processors, which sets SS.DPL=SS.RPL from
Not needed anymore now that the CPL is computed directly
by the task switch code.
Signed-off-by: Paolo Bonzini pbonz...@redhat.com
---
arch/x86/include/asm/kvm_emulate.h | 1 -
arch/x86/kvm/x86.c | 6 --
2 files changed, 7 deletions(-)
diff --git
On 14/05/14 20:41, Zoltan Kiss wrote:
But here is the thing: deliver_skb calls orphan_frags for every packet
delivered to the local stack, so we are safe IF these functions are
called before the IP stack. So we are safe now, but things can go wrong,
if:
- such a frag-mangling function is called
On 2014-05-14 8:37 AM, JR wrote:
Greetings all,
Though I don't believe that this is KVM problem per se, I'm seeing very
poor network performance when using windows 2008R2 KVM instances with
the virtio driver when on a 10G network. iperf results show linux VMs
getting close to wire speeds,
One more important thing is to make sure you launch vhost thread for your
virtio nic, as part of Guest instantiation. There will be a parameter
vhost=on in Guest instantiation command line.
-Original Message-
From: kvm-ow...@vger.kernel.org [mailto:kvm-ow...@vger.kernel.org] On Behalf
We have tried TSO offload; no effect.
I'm thinking about passthough; I don't think that grizzly (openstack,
the environment in which I'm running) supports it. Not to say that
there's not a way to make it work but ...
Thanks
JR
On 5/15/2014 12:49 AM, Venkateswara Rao Nandigam wrote:
Try TSO
Hi Peter,
Thanks for the advise. How does the intel driver perform? Wirespeed
range? (Or, did you make the change more to fix the freezing rather
than to up the performance?)
Thanks
JR
On 5/15/2014 1:27 PM, Peter Kieser wrote:
On 2014-05-14 8:37 AM, JR wrote:
Greetings all,
Though I
Yes, thank you, Venkateswara, it is vhost=on is present.
This is something specific to driver in windows since, in linux it
performs very well.
On 5/15/2014 1:41 PM, Venkateswara Rao Nandigam wrote:
One more important thing is to make sure you launch vhost thread for your
virtio nic, as part
I agree, but since you are saying this is in open stack environ, the Guest's
parameters gets supplied through different input files for different type of
Guests, better to check once.
-Original Message-
From: JR [mailto:botem...@gmail.com]
Sent: Thursday, May 15, 2014 11:33 PM
To:
Patch adds HYP interface for global VM TLB invalidation without address
parameter. Added ARM version of kvm_flush_remote_tlbs(), made generic one weak.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/include/asm/kvm_asm.h |1 +
arch/arm/kvm/interrupts.S | 11
This is v6 patcheset of live mgiration support for ARMv7.
- Tested on two 4-way A15 hardware, QEMU 2-way/4-way SMP guest upto 2GB
- Various dirty data rates tested - 2GB/1s ... 2048 pgs/5ms
- validated source/destination memory image integrity
Changes since v1:
- add unlock of VM mmu_lock to
This patch adds support for handling 2nd stage page faults during migration,
it disables faulting in huge pages, and splits up existing huge pages.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/kvm/mmu.c | 36 ++--
1 file changed, 34
Patch adds memslot support for initial write protection and split up of huge
pages
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/include/asm/kvm_host.h |8 +++
arch/arm/include/asm/kvm_mmu.h | 10 +++
arch/arm/kvm/arm.c |3 +
arch/arm/kvm/mmu.c
This patch adds support for keeping track of VM dirty pages, by updating
per memslot dirty bitmap and write protecting the page again.
Signed-off-by: Mario Smarduch m.smard...@samsung.com
---
arch/arm/include/asm/kvm_host.h |3 ++
arch/arm/kvm/arm.c |5 --
arch/arm/kvm/mmu.c
On Wed, May 14, 2014 at 07:00:18PM -0700, Mario Smarduch wrote:
On 05/14/2014 09:47 AM, Christoffer Dall wrote:
On Wed, May 07, 2014 at 05:40:13PM -0700, Mario Smarduch wrote:
[...]
+void kvm_flush_remote_tlbs(struct kvm *kvm)
This doesn't build?:
I reworked the patch series to
On Thu, May 15, 2014 at 11:27:27AM -0700, Mario Smarduch wrote:
This is v6 patcheset of live mgiration support for ARMv7.
migration
This is an extremely terse cover letter. It would have been nice with a
few sentences of which existing features this leverages, which support
was missing, what
[I know you sent out a newer version but I already reviewed some of this
patch on the plane today but couldn't send it out before I got home.
Anyway, here it is:]
On Wed, May 07, 2014 at 05:40:14PM -0700, Mario Smarduch wrote:
Patch adds support for live migration initial split up of huge pages
On 05/15/2014 11:53 AM, Christoffer Dall wrote:
[I know you sent out a newer version but I already reviewed some of this
patch on the plane today but couldn't send it out before I got home.
Anyway, here it is:]
On Wed, May 07, 2014 at 05:40:14PM -0700, Mario Smarduch wrote:
Patch adds
Will do that, I'm sure there will be another iteration :).
On 05/15/2014 11:51 AM, Christoffer Dall wrote:
On Thu, May 15, 2014 at 11:27:27AM -0700, Mario Smarduch wrote:
This is v6 patcheset of live mgiration support for ARMv7.
migration
This is an extremely terse cover letter. It would
Hi Gavin,
Can error injection be done if EEH is not enbaled?
Thanks
Mike
On 05/14/2014 12:11 PM, Gavin Shan wrote:
The series of patches intends to support EEH for PCI devices, which are
passed through to PowerKVM based guest via VFIO. The implementation is
straightforward based on the issues
On Thu, May 15, 2014 at 02:34:27PM +0800, Mike Qiu wrote:
Hi Gavin,
Can error injection be done if EEH is not enbaled?
Yes, utility errinject still can inject PCI errors to host for
testing purpose. Since the PCI errors injected by errinjct is
mainly for EEH testing. it would be meaningless to
There are LE Linux guests out there that don't handle hypercalls correctly.
Instead of interpreting the instruction stream from device tree as big endian
they assume it's a little endian instruction stream and fail.
When we see an illegal instruction from such a byte reversed instruction stream,
We get an array of instructions from the hypervisor via device tree that
we write into a buffer that gets executed whenever we want to make an
ePAPR compliant hypercall.
However, the hypervisor passes us these instructions in BE order which
we have to manually convert to LE when we want to run
On LPAR guest systems Linux enables the shadow SLB to indicate to the
hypervisor a number of SLB entries that always have to be available.
Today we go through this shadow SLB and disable all ESID's valid bits.
However, pHyp doesn't like this approach very much and honors us with
fancy machine
Just for info: Lubuntu 14.04 PowerPC on QEMU with PR KVM enabled is
faster on my PA6T system than Lubuntu 14.04 PowerPC on QEMU on my
2.93GHz quad core PC. That's amazing.
Screenshot: http://www.supertuxkart-amiga.de/amiga/QEMU_PR_KVM_A1-X1000.jpg
Thanks a lot for PR KVM! :-)
- Christian
--
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