regression bisected; KVM: entry failed, hardware error 0x80000021

2014-12-21 Thread Jamie Heilman
With v3.19-rc1 when I run qemu-system-x86_64 -machine pc,accel=kvm I
get:

KVM: entry failed, hardware error 0x8021

If you're running a guest on an Intel machine without unrestricted mode
support, the failure can be most likely due to the guest entering an invalid
state for Intel VT. For example, the guest maybe running in big real mode
which is not supported on less recent Intel processors.

EAX= EBX= ECX= EDX=0663
ESI= EDI= EBP= ESP=
EIP=e05b EFL=00010002 [---] CPL=0 II=0 A20=1 SMM=0 HLT=0
ES =   9300
CS =f000 000f  9b00
SS =   9300
DS =   9300
FS =   9300
GS =   9300
LDT=   8200
TR =   8b00
GDT=  
IDT=  
CR0=6010 CR2= CR3= CR4=
DR0= DR1= DR2= 
DR3= 
DR6=0ff0 DR7=0400
EFER=
Code=85 00 87 00 89 00 8b 00 00 00 86 00 88 00 8a 00 8c 00 00 90 2e 66 83 3e 
30 6c 00 0f 85 e7 f2 31 c0 8e d0 66 bc 00 70 00 00 66 ba 31 2e 0f 00 e9 45 f1

This is with QEMU emulator version 2.1.2 (Debian 1:2.1+dfsg-11),
Copyright (c) 2003-2008 Fabrice Bellard

The host system is:

cpu family  : 6
model   : 23
model name  : Intel(R) Core(TM)2 Duo CPU E8400  @ 3.00GHz
stepping: 10
microcode   : 0xa0b
...
flags   : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov 
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm 
constant_tsc arch_perfmon pebs bts rep_good nopl aperfmperf pni dtes64 monitor 
ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xsave lahf_lm dtherm 
tpr_shadow vnmi flexpriority

I bisected this back to:

commit 34a1cd60d17f62c1f077c1478a6c2ca8c3d17af4
Author: Tiejun Chen tiejun.c...@intel.com
Date:   Tue Oct 28 10:14:48 2014 +0800

kvm: x86: vmx: move some vmx setting from vmx_init() to hardware_setup()

Instead of vmx_init(), actually it would make reasonable sense to do
anything specific to vmx hardware setting in vmx_x86_ops-hardware_setup().

Signed-off-by: Tiejun Chen tiejun.c...@intel.com
Signed-off-by: Paolo Bonzini pbonz...@redhat.com

reverting this commit appears to fix the issue, in so far that I can
run kvm again without the aforementioned error, but I haven't tested
it thoroughly beyond that.  Let me know if you need more information
or testing.

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Re: [PATCH] powerpc: powernv: Return to cpu offline loop when finished in KVM guest

2014-12-21 Thread Andreas Schwab
arch/powerpc/kvm/built-in.o: In function `kvm_no_guest':
arch/powerpc/kvm/book3s_hv_rmhandlers.o:(.text+0x724): undefined reference to 
`power7_wakeup_loss'

Andreas.

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And now for something completely different.
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Re: kvm: zapping shadow pages for mmio generation wraparound

2014-12-21 Thread Paolo Bonzini


On 21/12/2014 07:28, Michael Tokarev wrote:
 Has it not been decided to downgrade this message to KERN_DEBUG for some
 reason?

I've just never gotten round to do it.  I'll do it next week.

 What does this message mean anyway?
 Why this very rare case (according to comments in arch/x86/kvm/mmu.c)
 happens on this machine?

It is rare, but we make it happen once per VM to try and avoid that it
bitrots.

Paolo
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Re: [PATCH] powerpc: powernv: Return to cpu offline loop when finished in KVM guest

2014-12-21 Thread Alexander Graf

On 21.12.14 15:13, Andreas Schwab wrote:
 arch/powerpc/kvm/built-in.o: In function `kvm_no_guest':
 arch/powerpc/kvm/book3s_hv_rmhandlers.o:(.text+0x724): undefined reference to 
 `power7_wakeup_loss'

Ugh. We just removed support for 970 HV mode, but that obviously doesn't
mean you can't compile in support for HV mode without enabling p7.

Paul, what would you think of a patch that makes BOOK3S_HV depend on
PPC_POWERNV?


Alex
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Re: [PATCH] powerpc: powernv: Return to cpu offline loop when finished in KVM guest

2014-12-21 Thread Michael Ellerman
On Sun, 2014-12-21 at 23:56 +0100, Alexander Graf wrote:
 On 21.12.14 15:13, Andreas Schwab wrote:
  arch/powerpc/kvm/built-in.o: In function `kvm_no_guest':
  arch/powerpc/kvm/book3s_hv_rmhandlers.o:(.text+0x724): undefined reference 
  to `power7_wakeup_loss'
 
 Ugh. We just removed support for 970 HV mode, but that obviously doesn't
 mean you can't compile in support for HV mode without enabling p7.
 
 Paul, what would you think of a patch that makes BOOK3S_HV depend on
 PPC_POWERNV?

Paul's out until after Christmas I think, maybe later.

That sounds reasonable to me though, it reflects reality, and we can always
change it in future.

cheers


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[question] Does is_guest_mode() == true mean in L1 (guest hypervisor)?

2014-12-21 Thread Zhang Haoyu
Hi,

Does is_guest_mode() == true mean in L1 (guest hypervisor)?

Thanks,
Zhang Haoyu
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RE: [v3 13/26] KVM: Define a new interface kvm_find_dest_vcpu() for VT-d PI

2014-12-21 Thread Wu, Feng


 -Original Message-
 From: Paolo Bonzini [mailto:paolo.bonz...@gmail.com] On Behalf Of Paolo
 Bonzini
 Sent: Saturday, December 20, 2014 9:17 PM
 To: Wu, Feng; Paolo Bonzini; Zhang, Yang Z; Thomas Gleixner; Ingo Molnar; H.
 Peter Anvin; x...@kernel.org; Gleb Natapov; dw...@infradead.org;
 j...@8bytes.org; Alex Williamson; Jiang Liu
 Cc: io...@lists.linux-foundation.org; linux-ker...@vger.kernel.org; KVM list;
 Eric Auger
 Subject: Re: [v3 13/26] KVM: Define a new interface kvm_find_dest_vcpu() for
 VT-d PI
 
 
 
 On 20/12/2014 00:48, Wu, Feng wrote:
  In my understanding, lowest priority interrupts are always delivered to a
  Single CPU, we need to find the right destination CPU from the cpumask.
 
 Yes, but which CPU however differs every time the interrupt is
 delivered.  So the emulation here is a bit poor.  For now, please limit
 PI to fixed interrupts.

Do you mean we don't support Lowest priority interrupts? As I mentioned before,
Lowest priority interrupts is widely used in Linux, so I think supporting 
lowest priority
interrupts is very important for Linux guest OS. Do you have any 
ideas/suggestions about
how to support Lowest priority interrupts for PI? Thanks a lot!

Thanks,
Feng

 
  Actually, we don't support posting broadcast/multicast interrupts, because
  the interrupt is associated with one Posted-interrupts descriptor, then one
  vCPU.
 
 Understood.
 
 Paolo
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Does kvm friendly support GPT?

2014-12-21 Thread Zhang Haoyu
Hi,

When I perform P2V from native servers with win2008 to kvm vm,
some cases failed due to the physical disk was using GPT for partition,
and QEMU doesn't support GPT by default.

And, I see in below site that OVMF can be used to enable UEFI to support GPT,
http://www.linux-kvm.org/page/OVMF

But, it seems that OVMF is not stable enough for kvm.

Any advises?

Thanks,
Zhang Haoyu
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Re: regression bisected; KVM: entry failed, hardware error 0x80000021

2014-12-21 Thread Chen, Tiejun

On 2014/12/21 20:46, Jamie Heilman wrote:

With v3.19-rc1 when I run qemu-system-x86_64 -machine pc,accel=kvm I
get:

KVM: entry failed, hardware error 0x8021


Looks some MSR writing issues such a failed entry.



If you're running a guest on an Intel machine without unrestricted mode
support, the failure can be most likely due to the guest entering an invalid
state for Intel VT. For example, the guest maybe running in big real mode
which is not supported on less recent Intel processors.

EAX= EBX= ECX= EDX=0663
ESI= EDI= EBP= ESP=
EIP=e05b EFL=00010002 [---] CPL=0 II=0 A20=1 SMM=0 HLT=0
ES =   9300
CS =f000 000f  9b00
SS =   9300
DS =   9300
FS =   9300
GS =   9300
LDT=   8200
TR =   8b00
GDT=  
IDT=  
CR0=6010 CR2= CR3= CR4=
DR0= DR1= DR2= 
DR3=
DR6=0ff0 DR7=0400
EFER=


And I don't see any obvious wrong as well. Any valuable info from dmesg?


Code=85 00 87 00 89 00 8b 00 00 00 86 00 88 00 8a 00 8c 00 00 90 2e 66 83 3e 
30 6c 00 0f 85 e7 f2 31 c0 8e d0 66 bc 00 70 00 00 66 ba 31 2e 0f 00 e9 45 f1

This is with QEMU emulator version 2.1.2 (Debian 1:2.1+dfsg-11),
Copyright (c) 2003-2008 Fabrice Bellard

The host system is:

cpu family  : 6
model   : 23
model name  : Intel(R) Core(TM)2 Duo CPU E8400  @ 3.00GHz
stepping: 10
microcode   : 0xa0b
...
flags   : fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov 
pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx lm 
constant_tsc arch_perfmon pebs bts rep_good nopl aperfmperf pni dtes64 monitor 
ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm sse4_1 xsave lahf_lm dtherm 
tpr_shadow vnmi flexpriority

I bisected this back to:

commit 34a1cd60d17f62c1f077c1478a6c2ca8c3d17af4
Author: Tiejun Chen tiejun.c...@intel.com
Date:   Tue Oct 28 10:14:48 2014 +0800

 kvm: x86: vmx: move some vmx setting from vmx_init() to hardware_setup()

 Instead of vmx_init(), actually it would make reasonable sense to do
 anything specific to vmx hardware setting in vmx_x86_ops-hardware_setup().



This commit just reorders something but some MSR writing depend on 
previous status.


Could you try this?

diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index feb852b..96c84a8 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -5840,49 +5840,6 @@ static __init int hardware_setup(void)
memset(vmx_msr_bitmap_legacy, 0xff, PAGE_SIZE);
memset(vmx_msr_bitmap_longmode, 0xff, PAGE_SIZE);

-   vmx_disable_intercept_for_msr(MSR_FS_BASE, false);
-   vmx_disable_intercept_for_msr(MSR_GS_BASE, false);
-   vmx_disable_intercept_for_msr(MSR_KERNEL_GS_BASE, true);
-   vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_CS, false);
-   vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_ESP, false);
-   vmx_disable_intercept_for_msr(MSR_IA32_SYSENTER_EIP, false);
-   vmx_disable_intercept_for_msr(MSR_IA32_BNDCFGS, true);
-
-   memcpy(vmx_msr_bitmap_legacy_x2apic,
-   vmx_msr_bitmap_legacy, PAGE_SIZE);
-   memcpy(vmx_msr_bitmap_longmode_x2apic,
-   vmx_msr_bitmap_longmode, PAGE_SIZE);
-
-   if (enable_apicv) {
-   for (msr = 0x800; msr = 0x8ff; msr++)
-   vmx_disable_intercept_msr_read_x2apic(msr);
-
-   /* According SDM, in x2apic mode, the whole id reg is used.
-* But in KVM, it only use the highest eight bits. Need to
-* intercept it */
-   vmx_enable_intercept_msr_read_x2apic(0x802);
-   /* TMCCT */
-   vmx_enable_intercept_msr_read_x2apic(0x839);
-   /* TPR */
-   vmx_disable_intercept_msr_write_x2apic(0x808);
-   /* EOI */
-   vmx_disable_intercept_msr_write_x2apic(0x80b);
-   /* SELF-IPI */
-   vmx_disable_intercept_msr_write_x2apic(0x83f);
-   }
-
-   if (enable_ept) {
-   kvm_mmu_set_mask_ptes(0ull,
-   (enable_ept_ad_bits) ? VMX_EPT_ACCESS_BIT : 0ull,
-   (enable_ept_ad_bits) ? VMX_EPT_DIRTY_BIT : 0ull,
-   0ull, VMX_EPT_EXECUTABLE_MASK);
-   ept_set_mmio_spte_mask();
-   kvm_enable_tdp();
-   } else
-   kvm_disable_tdp();
-
-   update_ple_window_actual_max();
-
if (setup_vmcs_config(vmcs_config)  0) {
r = -EIO;
goto out7;
@@ -5945,6 +5902,49 @@ static __init int hardware_setup(void)
if (nested)
nested_vmx_setup_ctls_msrs();

+   

Re: [PATCH] powerpc: powernv: Return to cpu offline loop when finished in KVM guest

2014-12-21 Thread Andreas Schwab
arch/powerpc/kvm/built-in.o: In function `kvm_no_guest':
arch/powerpc/kvm/book3s_hv_rmhandlers.o:(.text+0x724): undefined reference to 
`power7_wakeup_loss'

Andreas.

-- 
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GPG Key fingerprint = 58CA 54C7 6D53 942B 1756  01D3 44D5 214B 8276 4ED5
And now for something completely different.
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Re: [PATCH] powerpc: powernv: Return to cpu offline loop when finished in KVM guest

2014-12-21 Thread Michael Ellerman
On Sun, 2014-12-21 at 23:56 +0100, Alexander Graf wrote:
 On 21.12.14 15:13, Andreas Schwab wrote:
  arch/powerpc/kvm/built-in.o: In function `kvm_no_guest':
  arch/powerpc/kvm/book3s_hv_rmhandlers.o:(.text+0x724): undefined reference 
  to `power7_wakeup_loss'
 
 Ugh. We just removed support for 970 HV mode, but that obviously doesn't
 mean you can't compile in support for HV mode without enabling p7.
 
 Paul, what would you think of a patch that makes BOOK3S_HV depend on
 PPC_POWERNV?

Paul's out until after Christmas I think, maybe later.

That sounds reasonable to me though, it reflects reality, and we can always
change it in future.

cheers


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