On Fri, Feb 11, 2011 at 4:23 AM, Ulrich Weigand
ulrich.weig...@de.ibm.com wrote:
The simple rule is Cortex-A8 is unsupported and Cortex-A9 is supported.
The A5 should work (untested) and the A15 will need a bit of hacking to
get it supported.
OK. I guess I can try on our Versatile
== This week ==
* Got the STT_GNU_IFUNC work ready to submit. Split out some preparatory
patches, including fixes for some general ARM inefficiencies that I
noticed this week. Ran the EGLIBC testsuite (including ifunc tests)
and they passed.
* Discussed ideas for representing permuted
== GCC ==
* Finished testing fix for lp:709329 and got that merged.
* Wrote up a plan for GCC performance improvements based on what we
discussed at the sprint.
* Internal ARM tasks that kept me busy for most of last week and this week.
Plans:
* still stuck on some ARM internal tasks for
== String routines ==
* Copied an improvement I'd previously made to memchr (removing a
branch using a big IT block) to strlen
* Modified benchmark setup to build everything as a library to
fairly give everything a PLT overhead.
* Pushed optimised memchr and strlen and simple strchr into
Will Deacon will.dea...@arm.com wrote on 02/11/2011 10:13:01 AM:
I don't have a pandaboard, so I'd be interested to see if the code
works there. I developed it using ARM boards, so the versatile express
is a known good target.
I've now got it working reliably on on Versatile Express, after
== GDB ==
* Installed 2.6.37 Linaro kernel on IGEP and Versatile Express
in order to verify support for HW breakpoints/watchpoints
* Tested GDB HW watchpoints patch, fixed several bugs in the
patch and core GDB, and got it working reliably on vexpress
* Started discussion with Will
