Am Dienstag, 29. Oktober 2013, 09:24:48 schrieb Theodore Ts'o:
Hi Theodore,
> On Tue, Oct 29, 2013 at 09:42:30AM +0100, Stephan Mueller wrote:
> > Based on this suggestion, I now added the tests in Appendix F.46.8 where
> > I disable the caches and the tests in Appendix F.46.9 where I disable
> >
On Nov 13, 2013, at 4:08 AM, Turbo Fredriksson wrote:
> FATAL: Error inserting sha256_ssse3
> (/lib/modules/3.12.0+scst+tf.1/kernel/arch/x86/crypto/sha256-ssse3.ko): No
> such
Ok, so digging through the kernel source, I noticed that SSE? is apparently
a CPU feature. This is an AMD Phenom
Am Sonntag, 10. November 2013, 21:28:06 schrieb Clemens Ladisch:
Hi Clemens,
> Stephan Mueller wrote:
> > Am Sonntag, 10. November 2013, 17:31:07 schrieb Clemens Ladisch:
> >> In the case of CPUs, the jitter you observe in delta
> >> times results in part from the complexities of the inner state,
I've just upgraded from 3.9.0-rc6 because I needed new versions
of ZFS On Linux (because of a unknown problem with the previous
version which lead to it refusing to load).
I also have zfs-crypto by zfsrogue and when trying to mount a
crypted filesystem, I get:
filesystem 'share/home/turbo
On 12.11.2013 13:11, Horia Geantă wrote:
> On 9/21/2012 10:26 AM, Jussi Kivilinna wrote:
>> Currrently test_aead uses same buffer for destination and source. However
>> in any places, 'dst != src' take different path than 'dst == src' case.
>>
>> Therefore make test_aead also run tests with destina
In omap_sham_probe() and omap_sham_remove(), 'dd->dma_lch'
is released without checking to see if it was successfully
requested or not. This is a bug and was identified and
reported by Dan Carpenter here:
http://www.spinics.net/lists/devicetree/msg11023.html
Add code to only release 'dd-
On Tue, Nov 12, 2013 at 05:59:34PM +0100, Borislav Petkov wrote:
> On Wed, Nov 13, 2013 at 12:41:52AM +0800, Herbert Xu wrote:
> > Hi Linus:
> >
> > Here is the crypto update for 3.13:
> >
> > * Made x86 ablk_helper generic for ARM.
> > * Phase out chainiv in favour of eseqiv (affects IPsec).
> >
These files provide the ability to configure and build the
AMD CCP device driver and crypto API support.
Signed-off-by: Tom Lendacky
---
drivers/crypto/Kconfig | 12
drivers/crypto/Makefile |1 +
drivers/crypto/ccp/Kconfig | 23 +++
drivers/cryp
Update the MAINTAINERS file for the AMD CCP device driver.
Signed-off-by: Tom Lendacky
---
MAINTAINERS |7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 051e4dc..de22604 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -525,6 +525,13 @@ F: drivers/tty/ser
These routines provide crypto API support for the CMAC mode of AES
on the AMD CCP.
Signed-off-by: Tom Lendacky
---
drivers/crypto/ccp/ccp-crypto-aes-cmac.c | 355 ++
1 file changed, 355 insertions(+)
create mode 100644 drivers/crypto/ccp/ccp-crypto-aes-cmac.c
diff
When performing an asynchronous ablkcipher operation the authenc
completion callback routine is invoked, but it does not locate and use
the proper IV.
The callback routine, crypto_authenc_encrypt_done, is updated to use
the same method of calculating the address of the IV as is done in
crypto_auth
These routines provide crypto API support for the XTS-AES mode of AES
on the AMD CCP.
Signed-off-by: Tom Lendacky
---
drivers/crypto/ccp/ccp-crypto-aes-xts.c | 285 +++
1 file changed, 285 insertions(+)
create mode 100644 drivers/crypto/ccp/ccp-crypto-aes-xts.c
dif
Resending because of typo in mailing list address...
The following series implements support for the AMD Cryptographic
Coprocessor (CCP). The AMD CCP provides hardware encryption, hashing
and other related operations.
This patch series is based on the 3.12 kernel.
---
Tom Lendacky (10):
These routines provide the support for the interface between the crypto API
and the AMD CCP. This includes insuring that requests associated with a
given tfm on the same cpu are processed in the order received.
Signed-off-by: Tom Lendacky
---
drivers/crypto/ccp/ccp-crypto-main.c | 432 +
The scatterwalk_crypto_chain function invokes the scatterwalk_sg_chain
function to chain two scatterlists, but the chain pointer indication
bit is not set. When the resulting scatterlist is used, for example,
by sg_nents to count the number of scatterlist entries, a segfault occurs
because sg_nent
These routines provide crypto API support for SHA1, SHA224 and SHA256
on the AMD CCP. HMAC support for these SHA modes is also provided.
Signed-off-by: Tom Lendacky
---
drivers/crypto/ccp/ccp-crypto-sha.c | 497 +++
1 file changed, 497 insertions(+)
create mode
These routines provide crypto API support for AES on the AMD CCP.
Support for AES modes: ECB, CBC, OFB, CFB and CTR
Signed-off-by: Tom Lendacky
---
drivers/crypto/ccp/ccp-crypto-aes.c | 375 +++
1 file changed, 375 insertions(+)
create mode 100644 drivers/crypt
On Wed, Nov 13, 2013 at 12:41:52AM +0800, Herbert Xu wrote:
> Hi Linus:
>
> Here is the crypto update for 3.13:
>
> * Made x86 ablk_helper generic for ARM.
> * Phase out chainiv in favour of eseqiv (affects IPsec).
> * Fixed aes-cbc IV corruption on s390.
> * Added constant-time crypto_memneq whi
Hi Linus:
Here is the crypto update for 3.13:
* Made x86 ablk_helper generic for ARM.
* Phase out chainiv in favour of eseqiv (affects IPsec).
* Fixed aes-cbc IV corruption on s390.
* Added constant-time crypto_memneq which replaces memcmp.
* Fixed aes-ctr in omap-aes.
* Added OMAP3 ROM RNG supp
On 9/21/2012 10:26 AM, Jussi Kivilinna wrote:
Currrently test_aead uses same buffer for destination and source. However
in any places, 'dst != src' take different path than 'dst == src' case.
Therefore make test_aead also run tests with destination buffer being
different than source buffer.
Sig
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