The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't have
the required CAAM node, the layer should return an error and not register the
algorithms with crypto API layer.
Signed-off-by: Ruchika
On Fri, 2014-07-04 at 17:10 +0530, Ruchika Gupta wrote:
The layer which registers with the crypto API should check for the presence of
the CAAM device it is going to use. If the platform's device tree doesn't
have
the required CAAM node, the layer should return an error and not register the
On Wed, Jun 25, 2014 at 05:06:46PM +0800, Herbert Xu wrote:
On Sat, Jun 21, 2014 at 02:26:29PM +0200, Stephan Mueller wrote:
The handling of additional input data / personalization string data may
be subject to a NULL pointer deference for the CTR DRBG. The
caller-provided data may be NULL
On Sat, Jun 28, 2014 at 08:53:19PM -0700, Joe Perches wrote:
On Sun, 2014-06-29 at 05:46 +0200, Stephan Mueller wrote:
Am Sonntag, 29. Juni 2014, 12:24:02 schrieb Stephen Rothwell:
Hi Stephen,
Hi Stephan,
On Sat, 28 Jun 2014 22:01:46 +0200 Stephan Mueller smuel...@chronox.de
Depending on the IMA policy, it might require to measure huge amount of files.
It may be very important to speedup hash calculation or to reduce (battery)
energy required to do it. Currently IMA uses synchronous hash API (shash)
which is CPU based. CPU based hash calculation is very CPU intensive
Async hash API allows to use HW acceleration for hash calculation.
It may give significant performance gain or/and reduce power consumption,
which might be very beneficial for battery powered devices.
This patch introduces hash calculation using ahash API.
ahash performance depends on data size
Asynchronous hash API allows initiate hash calculation and perform
other tasks while hash is calculated.
This patch introduces usage of double buffering for simultaneous
hashing and reading of the next chunk of data from the storage.
Changes in v3:
- better comments
Signed-off-by: Dmitry
Use of multiple-page collect buffers reduces:
1) the number of block IO requests
2) the number of asynchronous hash update requests
Second is important for HW accelerated hashing, because significant
amount of time is spent for preparation of hash update operation,
which includes configuring
Hi Herbert,
Here are sparse fixes for Qualcomm crypto driver reported here [1].
The patches are based on cryptodev-2.6 tree.
regards,
Stan
[1] https://lists.01.org/pipermail/kbuild-all/2014-July/005429.html
Stanimir Varbanov (2):
crypto: qce: fix sparse warnings
crypto: qce: add dependancy
Fix few sparse warnings of type:
- sparse: incorrect type in argument
- sparse: incorrect type in initializer
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/qce/common.c | 15 +--
drivers/crypto/qce/common.h |2 +-
drivers/crypto/qce/sha.c| 20
Make qce crypto driver depend on ARCH_QCOM and make
possible to test driver compilation.
Signed-off-by: Stanimir Varbanov svarba...@mm-sol.com
---
drivers/crypto/Kconfig |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/crypto/Kconfig b/drivers/crypto/Kconfig
index
On Sat, Jun 28, 2014 at 09:58:24PM +0200, Stephan Mueller wrote:
The DRBG-style linked list to manage input data that is fed into the
cipher invocations is replaced with the kernel linked list
implementation.
The change is transparent to users of the interfaces offered by the
DRBG.
On Sun, Jun 29, 2014 at 01:37:05PM +0200, Stephan Mueller wrote:
When looking into the documentation and trying it I found:
- bool choices allow me to only select one option, and only one
- tristate choices allow me to only select one option, if the initial
tristate
is set to yes. If
On Fri, 2014-07-04 at 14:21 +0300, Dan Carpenter wrote:
On Sat, Jun 28, 2014 at 08:53:19PM -0700, Joe Perches wrote:
On Sun, 2014-06-29 at 05:46 +0200, Stephan Mueller wrote:
Am Sonntag, 29. Juni 2014, 12:24:02 schrieb Stephen Rothwell:
Hi Stephen,
Hi Stephan,
On Sat,
Am Freitag, 4. Juli 2014, 09:57:20 schrieb Joe Perches:
Hi Joe,
On Fri, 2014-07-04 at 14:21 +0300, Dan Carpenter wrote:
On Sat, Jun 28, 2014 at 08:53:19PM -0700, Joe Perches wrote:
On Sun, 2014-06-29 at 05:46 +0200, Stephan Mueller wrote:
Am Sonntag, 29. Juni 2014, 12:24:02 schrieb
Am Freitag, 4. Juli 2014, 13:50:03 schrieb Dan Carpenter:
Hi Dan,
On Wed, Jun 25, 2014 at 05:06:46PM +0800, Herbert Xu wrote:
On Sat, Jun 21, 2014 at 02:26:29PM +0200, Stephan Mueller wrote:
The handling of additional input data / personalization string data may
be subject to a NULL
Am Freitag, 4. Juli 2014, 22:15:41 schrieb Herbert Xu:
Hi Herbert,
On Sun, Jun 29, 2014 at 01:37:05PM +0200, Stephan Mueller wrote:
When looking into the documentation and trying it I found:
- bool choices allow me to only select one option, and only one
- tristate choices allow me
On Sat, 2014-07-05 at 01:57 +0200, Stephan Mueller wrote:
And I also get the same output. Yet I am not sure how that code can be
compared to the code in the kernel.
What that code shows is that the ARRAY_SIZE
type is size_t.
The difference is ARRAY_SIZE in the kernel
should be output with
Am Freitag, 4. Juli 2014, 17:09:33 schrieb Joe Perches:
Hi Joe,
On Sat, 2014-07-05 at 01:57 +0200, Stephan Mueller wrote:
And I also get the same output. Yet I am not sure how that code can be
compared to the code in the kernel.
What that code shows is that the ARRAY_SIZE
type is
On Sat, 2014-07-05 at 02:15 +0200, Stephan Mueller wrote:
Am Freitag, 4. Juli 2014, 17:09:33 schrieb Joe Perches:
On Sat, 2014-07-05 at 01:57 +0200, Stephan Mueller wrote:
And I also get the same output. Yet I am not sure how that code can be
compared to the code in the kernel.
What
Am Freitag, 4. Juli 2014, 17:24:09 schrieb Joe Perches:
Hi Joe,
On Sat, 2014-07-05 at 02:15 +0200, Stephan Mueller wrote:
Am Freitag, 4. Juli 2014, 17:09:33 schrieb Joe Perches:
On Sat, 2014-07-05 at 01:57 +0200, Stephan Mueller wrote:
And I also get the same output. Yet I am not sure
On Sat, Jul 05, 2014 at 02:00:15AM +0200, Stephan Mueller wrote:
Am Freitag, 4. Juli 2014, 13:50:03 schrieb Dan Carpenter:
Hi Dan,
On Wed, Jun 25, 2014 at 05:06:46PM +0800, Herbert Xu wrote:
On Sat, Jun 21, 2014 at 02:26:29PM +0200, Stephan Mueller wrote:
The handling of additional
Hi Russell,
On 01.07.2014 18:19, Russell King wrote:
ARMv6 and greater introduced a new instruction (bx) which can be used
to return from function calls. Recent CPUs perform better when the
bx lr instruction is used rather than the mov pc, lr instruction,
and this sequence is strongly
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