On Fri, May 22, 2015 at 09:43:28AM +0200, Johannes Berg wrote:
Oops, sorry, of course - I was running in a VM :)
Thanks!
Does this patch on top help?
diff --git a/net/mac80211/aes_gmac.c b/net/mac80211/aes_gmac.c
index 7eee32b..133be53 100644
--- a/net/mac80211/aes_gmac.c
+++
On Fri, May 22, 2015 at 10:18:03AM +0200, Johannes Berg wrote:
Yep, that fixes things.
Great I will respin the patches.
Thanks,
--
Email: Herbert Xu herb...@gondor.apana.org.au
Home Page: http://gondor.apana.org.au/~herbert/
PGP Key: http://gondor.apana.org.au/~herbert/pubkey.txt
--
To
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text.
Tested-by: Johannes Berg johan...@sipsolutions.net
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
net/mac80211/aes_ccm.c | 30
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
crypto/algif_aead.c | 61 ++--
1 file changed, 36
The function aead_geniv_alloc currently sets cra_type even for
new style instances. This is unnecessary and may hide bugs such
as when our caller uses crypto_register_instance instead of the
correct aead_register_instance.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
crypto/aead.c
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text. The
IV generation is also now carried out through normal AEAD methods.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
net/ipv4/esp4.c | 197
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text. The
IV generation is also now carried out through normal AEAD methods.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
net/ipv6/esp6.c | 197
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
crypto/testmgr.c | 84 +++
1 file changed, 48
This patch adds IV generator information for each AEAD and block
cipher to xfrm_algo_desc. This will be used to access the new
AEAD interface.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
include/net/xfrm.h |2 ++
net/xfrm/xfrm_algo.c | 16
2 files
On Fri, May 22, 2015 at 09:16:08AM +0200, Stephan Mueller wrote:
Thanks for the pointer, but there I do not really see the functionality I am
looking for. I see patch 10/16 which seems to indicate that the geniv logic
is
now to be invoked as a normal AEAD cipher. I yet fail to see where
On Fri, 2015-05-22 at 15:41 +0800, Herbert Xu wrote:
Did this have a code section at the end? Without it it's difficult
to pin-point the crash because your compiler produces different
output than mine.
Oops, sorry, of course - I was running in a VM :)
[ 26.143579] BUG: unable to handle
On Fri, May 22, 2015 at 09:32:28AM +0200, Johannes Berg wrote:
The CCM and GCM part seems to work, but GMAC causes a kernel crash:
Awesome :)
[ 26.143579] BUG: unable to handle kernel NULL pointer dereference at
(null)
[ 26.144406] IP: [811d9e7d]
New style AEAD instances must use aead_register_instance. This
worked by chance because aead_geniv_alloc is still setting things
the old way.
This patch converts the template over to the create model where
we are responsible for instance registration so that we can call
the correct function.
Am Freitag, 22. Mai 2015, 14:45:54 schrieb Herbert Xu:
Hi Herbert,
On Fri, May 22, 2015 at 08:40:25AM +0200, Stephan Mueller wrote:
If I may ask, where in your initial patch set is now decided that the IV
generator is used (i.e. so that the givcrypt API is not needed any more)?
Please see
Hi:
This is the second version of the series. The first four patches
make the new IV generators use aead_register_instance instead of
the obsolete crypto_register_instance.
I've also added two more conversions for tcrypt and algif_aead.
Original description:
This series of patches convert all
On Fri, May 22, 2015 at 08:40:25AM +0200, Stephan Mueller wrote:
If I may ask, where in your initial patch set is now decided that the IV
generator is used (i.e. so that the givcrypt API is not needed any more)?
Please see
On Thu, 2015-05-21 at 18:44 +0800, Herbert Xu wrote:
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text.
The CCM and GCM part seems to work, but GMAC causes a kernel crash:
[ 26.143579] BUG: unable to handle kernel
AEAD algorithm implementors need to figure out a given algorithm's
IV size and maximum authentication size. During the transition
this is difficult to do as an algorithm could be new style or old
style.
This patch creates two helpers to make this easier.
Signed-off-by: Herbert Xu
New style AEAD instances must use aead_register_instance. This
worked by chance because aead_geniv_alloc is still setting things
the old way.
This patch converts the template over to the create model where
we are responsible for instance registration so that we can call
the correct function.
Am Donnerstag, 21. Mai 2015, 18:44:03 schrieb Herbert Xu:
Hi Herbert,
- aead_givcrypt_set_callback(req, 0, esp_output_done, skb);
- aead_givcrypt_set_crypt(req, sg, sg, clen, iv);
- aead_givcrypt_set_assoc(req, asg, assoclen);
- aead_givcrypt_set_giv(req, esph-enc_data,
-
On Fri, 2015-05-22 at 16:05 +0800, Herbert Xu wrote:
On Fri, May 22, 2015 at 09:43:28AM +0200, Johannes Berg wrote:
Oops, sorry, of course - I was running in a VM :)
Thanks!
Does this patch on top help?
Yep, that fixes things.
johannes
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To unsubscribe from this list: send the line
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
net/mac802154/llsec.c | 41 ++---
1 file changed, 14 insertions(+), 27
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
crypto/tcrypt.c | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git
This patch adds IV generator information to xfrm_state. This
is currently obtained from our own list of algorithm descriptions.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
---
include/net/xfrm.h |1 +
net/key/af_key.c |1 +
net/xfrm/xfrm_user.c | 40
On Fri, May 22, 2015 at 11:04:39PM +0200, Stephan Mueller wrote:
Am Freitag, 22. Mai 2015, 22:59:34 schrieb Stephan Mueller:
Hi Stephan,
Am Freitag, 22. Mai 2015, 16:31:04 schrieb Herbert Xu:
Hi Herbert,
This patch makes use of the new AEAD interface which uses a single
SG
On Fri, May 22, 2015 at 11:04:39PM +0200, Stephan Mueller wrote:
Note, gcm(aes) looks good. Only rfc4106(gcm(aes)) causes the crash.
Actually it looks like the culprit hasn't been merged yet so I'll
just respin the series.
Anyway, this patch should fix your crash:
diff --git
Not sure if this went out earlier. So I am resending.
On 5/22/15 16:56, Rafael J. Wysocki wrote:
diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c
index 39c485b..b9657af 100644
--- a/drivers/acpi/glue.c
+++ b/drivers/acpi/glue.c
@@ -13,6 +13,7 @@
#include linux/slab.h
#include
Am Freitag, 22. Mai 2015, 16:31:04 schrieb Herbert Xu:
Hi Herbert,
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text.
Using an up-to date tree with the full set of patches of this patch set, I get
the following
On Wednesday, May 20, 2015 05:09:14 PM Suravee Suthikulpanit wrote:
This patch implements support for ACPI _CCA object, which is introduced in
ACPIv5.1, can be used for specifying device DMA coherency attribute.
The parsing logic traverses device namespace to parse coherency
information, and
Am Freitag, 22. Mai 2015, 22:59:34 schrieb Stephan Mueller:
Hi Stephan,
Am Freitag, 22. Mai 2015, 16:31:04 schrieb Herbert Xu:
Hi Herbert,
This patch makes use of the new AEAD interface which uses a single
SG list instead of separate lists for the AD and plain text.
Using an up-to
On Thu, May 21, 2015 at 9:05 PM, Herbert Xu herb...@gondor.apana.org.au wrote:
Please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git
or
master.kernel.org:/pub/scm/linux/kernel/git/herbert/crypto-2.6.git
Mind fixing your script to not have that old
On Fri, May 22, 2015 at 08:08:28PM -0400, Dan Streetman wrote:
Move the 842 compression alg choice to last in the list, so it's
not in the middle of LZO/LZ4/LZ4HC. Change its default to N, as it
is a very slow alg, which generally should only be used with
compression hardware that's capable
On Fri, May 22, 2015 at 8:34 PM, Herbert Xu herb...@gondor.apana.org.au wrote:
On Fri, May 22, 2015 at 08:08:28PM -0400, Dan Streetman wrote:
Move the 842 compression alg choice to last in the list, so it's
not in the middle of LZO/LZ4/LZ4HC. Change its default to N, as it
is a very slow alg,
On 5/22/2015 8:25 PM, Rafael J. Wysocki wrote:
On Friday, May 22, 2015 07:15:17 PM Suravee Suthikulanit wrote:
On 5/22/2015 6:05 PM, Rafael J. Wysocki wrote:
On Friday, May 22, 2015 05:24:15 PM Suravee Suthikulanit wrote:
Not sure if this went out earlier. So I am resending.
On 5/22/15
Signed-off-by: Fengguang Wu fengguang...@intel.com
---
echainiv.c |4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/crypto/echainiv.c b/crypto/echainiv.c
index e5a9878..d0e325d0 100644
--- a/crypto/echainiv.c
+++ b/crypto/echainiv.c
@@ -67,7 +67,7 @@ static int
Move the 842 compression alg choice to last in the list, so it's
not in the middle of LZO/LZ4/LZ4HC. Change its default to N, as it
is a very slow alg, which generally should only be used with
compression hardware that's capable of doing it much faster.
Signed-off-by: Dan Streetman
On 5/22/2015 6:05 PM, Rafael J. Wysocki wrote:
On Friday, May 22, 2015 05:24:15 PM Suravee Suthikulanit wrote:
Not sure if this went out earlier. So I am resending.
On 5/22/15 16:56, Rafael J. Wysocki wrote:
diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c
index 39c485b..b9657af 100644
On Friday, May 22, 2015 07:15:17 PM Suravee Suthikulanit wrote:
On 5/22/2015 6:05 PM, Rafael J. Wysocki wrote:
On Friday, May 22, 2015 05:24:15 PM Suravee Suthikulanit wrote:
Not sure if this went out earlier. So I am resending.
On 5/22/15 16:56, Rafael J. Wysocki wrote:
diff --git
On Fri, May 22, 2015 at 02:29:11PM -0700, Linus Torvalds wrote:
On Thu, May 21, 2015 at 9:05 PM, Herbert Xu herb...@gondor.apana.org.au
wrote:
Please pull from
git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6.git
or
On Friday, May 22, 2015 05:24:15 PM Suravee Suthikulanit wrote:
Not sure if this went out earlier. So I am resending.
On 5/22/15 16:56, Rafael J. Wysocki wrote:
diff --git a/drivers/acpi/glue.c b/drivers/acpi/glue.c
index 39c485b..b9657af 100644
--- a/drivers/acpi/glue.c
+++
On Fri, May 22, 2015 at 12:31:52PM +0200, Stephan Mueller wrote:
With the current cryptodev-2.6 tree (ex the patches to AEAD from the last 2
days), I get the following oops that is triggered by simply calling
This should be fixed in the latest tree by:
commit
Hi Herbert, Tadeusz,
With the current cryptodev-2.6 tree (ex the patches to AEAD from the last 2
days), I get the following oops that is triggered by simply calling
crypto_alloc_aead(rfc4106(gcm(aes)), 0, 0);
Contrary, when calling
crypto_alloc_aead(rfc4106(gcm(aes-generic)), 0, 0);
all
The variable tfm_count is accessed by multiple threads without
locking. This patch converts it to an atomic_t.
Signed-off-by: Herbert Xu herb...@gondor.apana.org.au
diff --git a/crypto/pcrypt.c b/crypto/pcrypt.c
index 3942a9f..ff174b6 100644
--- a/crypto/pcrypt.c
+++ b/crypto/pcrypt.c
@@ -20,6
Add support for DES operations.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
Signed-off-by: Arnaud Ebalard a...@natisbad.org
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
drivers/crypto/marvell/cipher.c | 150
Add the Orion SoC description, and select this implementation by default
to support non-DT probing: Orion is the only platform where non-DT boards
are declaring the CESA block.
Control the allhwsupport module parameter to avoid probing the CESA IP when
the old CESA driver is enabled (unless it is
From: Arnaud Ebalard a...@natisbad.org
Add support for SHA256 operations.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
Enable the crypto IP on armada-xp-gp.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/armada-xp-gp.dts | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/armada-xp-gp.dts
b/arch/arm/boot/dts/armada-xp-gp.dts
index
From: Arnaud Ebalard a...@natisbad.org
Add the Kirkwood SoC description, and control the allhwsupport module
parameter to avoid probing the CESA IP when the old CESA driver is enabled
(unless it is explicitly requested to do so).
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by:
From: Arnaud Ebalard a...@natisbad.org
Add crypto related nodes to kirkwood.dtsi.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/kirkwood.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Add DT bindings documentation for the new marvell-cesa driver.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
.../devicetree/bindings/crypto/marvell-cesa.txt| 46 ++
1 file changed, 46 insertions(+)
create mode 100644
From: Arnaud Ebalard a...@natisbad.org
Add support for MD5 operations.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
The existing mv_cesa driver supports some features of the CESA IP but is
quite limited, and reworking it to support new features (like involving the
TDMA engine to offload the CPU) is almost impossible.
This driver has been rewritten from scratch to take those new features into
account.
This
The CESA IP supports CPU offload through a dedicated DMA engine (TDMA)
which can control the crypto block.
When you use this mode, all the required data (operation metadata and
payload data) are transferred using DMA, and the results are retrieved
through DMA when possible (hash results are not
The mv_cesa driver does not request the CESA registers memory region.
Since we're about to add a new CESA driver, we need to make sure only one
of these drivers probe the CESA device, and requesting the registers memory
region is a good way to achieve that.
Signed-off-by: Boris Brezillon
Hello,
This patch series adds a new driver supporting Marvell's CESA IP.
This driver addresses some limitations of the existing one.
From a performance and CPU load point of view the most important
limitation in the existing driver is the lack of DMA support, thus
preventing us from chaining
From: Arnaud Ebalard a...@natisbad.org
Add support for Triple-DES operations.
Signed-off-by: Arnaud Ebalard a...@natisbad.org
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 2 +
drivers/crypto/marvell/cesa.h | 2 +
The old and new marvell CESA drivers both support Orion and Kirkwood SoCs.
Add a module parameter to choose whether these SoCs should be attached to
the new or the old driver.
The default policy is to keep attaching those IPs to the old driver if it
is enabled, until we decide the new CESA driver
Add CESA IP description for all the missing armada SoCs (XP, 375 and 38x).
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
drivers/crypto/marvell/cesa.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/crypto/marvell/cesa.c
Add crypto related nodes to armada-xp.dtsi.
Signed-off-by: Boris Brezillon boris.brezil...@free-electrons.com
---
arch/arm/boot/dts/armada-xp.dtsi | 31 +++
1 file changed, 31 insertions(+)
diff --git a/arch/arm/boot/dts/armada-xp.dtsi
+ Jason Gunthorpe, he may be interested in this.
On Fri, May 22, 2015 at 03:33:46PM +0200, Boris Brezillon wrote:
Hello,
This patch series adds a new driver supporting Marvell's CESA IP.
This driver addresses some limitations of the existing one.
From a performance and CPU load point of
On 05/10/2015 11:32 PM, Herbert Xu wrote:
On Wed, May 06, 2015 at 12:36:48PM -0700, Tadeusz Struk wrote:
+const struct public_key_signature *signature;
Doing this means that you aren't adding it to the crypto API
properly. You need to start from scratch and design a proper
interface
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