Re: [PATCH] padata: avoid race in reordering

On Tue, Apr 04, 2017 at 01:53:15PM +0200, Jason A. Donenfeld wrote: > Herbert applied this to his tree. It's probably a good stable > candidate, since it's a two line change to fix a race condition. > > On Fri, Mar 24, 2017 at 3:16 PM, Herbert Xu > wrote: > > Jason

Re: [PATCH v6] DH support: add KDF handling support

Pulled.

Re: [PATCH 2/5] crypto/nx: Create nx842_cfg_crb function

Haren Myneni writes: > [PATCH 2/5] crypto/nx: Create nx842_cfg_crb function > > Configure CRB is moved to nx842_cfg_crb() so that it can be > used for icswx function and VAS function which will be added > later. Buy a vowel! :) nx842_configure_crb() is fine. cheers

Re: [PATCH 1/5] crypto/nx: Rename nx842_powernv_function as icswx function

Haren Myneni writes: > [PATCH 1/5] crypto/nx: Rename nx842_powernv_function as icswx function > > nx842_powernv_function is points to nx842_icswx_function and > will be point to VAS function which will be added later for > P9 NX support. I know it's nit-picking but can

Re: [PATCH] padata: avoid race in reordering

Herbert applied this to his tree. It's probably a good stable candidate, since it's a two line change to fix a race condition. On Fri, Mar 24, 2017 at 3:16 PM, Herbert Xu wrote: > Jason A. Donenfeld wrote: >> Under extremely heavy uses of padata,

Re: [PATCH 5/5] crypto/nx: Add P9 NX specific error codes for 842 engine

Haren Myneni writes: > [PATCH 5/5] crypto/nx: Add P9 NX specific error codes for 842 engine > > This patch adds changes for checking P9 specific 842 engine > error codes. These errros are reported in co-processor status > block (CSB) for failures. But you just enabled

Re: [PATCH 3/5] crypto/nx: Create nx842_delete_coproc function

Haren Myneni writes: > [PATCH 3/5] crypto/nx: Create nx842_delete_coproc function > > Move deleting coprocessor info upon exit or failure to > nx842_delete_coproc(). Naming again, this deletes *all* the coprocs, so the name should be plural. cheers

Re: [PATCH 4/5] crypto/nx: Add P9 NX support for 842 compression engine.

Hi Haren, A few comments ... Haren Myneni writes: > diff --git a/arch/powerpc/include/asm/vas.h b/arch/powerpc/include/asm/vas.h > index 4e5a470..7315621 100644 > --- a/arch/powerpc/include/asm/vas.h > +++ b/arch/powerpc/include/asm/vas.h > @@ -19,6 +19,8 @@ >

Re: What should be the algo priority

Am Dienstag, 4. April 2017, 09:53:17 CEST schrieb Harsh Jain: Hi Harsh, > Hi, > > Do we have any guidelines documented to decide what should be the > algorithm priority. Specially for authenc implementation.Most of the > drivers have fixed priority for all algos. Problem comes in when we > have

Re: [7/7] crypto: caam/qi - add ablkcipher and authenc algorithms

On 4/4/2017 8:03 AM, Michael Ellerman wrote: > Horia Geantă writes: > >> Add support to submit ablkcipher and authenc algorithms >> via the QI backend: >> -ablkcipher: >> cbc({aes,des,des3_ede}) >> ctr(aes), rfc3686(ctr(aes)) >> xts(aes) >> -authenc: >>

Re: [7/7] crypto: caam/qi - add ablkcipher and authenc algorithms

Hi Michael, Just a couple of basic things to check: - was the dtb updated to the newest? - is the qman node present? This should be easily visible in /proc/device-tree/soc@ffe00/qman@318000. --- Best Regards, Laurentiu On 04/04/2017 08:03 AM, Michael Ellerman wrote: > Horia Geantă

Re: [PATCH v5 0/4] gf128mul refactoring

Hi Ondrej, On Sun, Apr 02, 2017 at 09:19:12PM +0200, Ondrej Mosnacek wrote: > This patchset contains the following gf128mul-related changes: > 1. The gf128mul_x_* functions are moved to gf128mul.h for performance > reasons. > 2. The gf128mul_x_ble function is fixed to use the correct block