Proposal

2017-07-09 Thread Ms.Lev 
 I have a confidential deal for you, please contact me for more details via 
this 

email immediately.

[PATCH 0/5] staging: ccree: fix checkpatch errors

2017-07-09 Thread sleepingzucchini 
From: Tyler Olivieri 

This patchset fixes several checkpatch errors and warnings in /staging/ccree:

ERROR: that open brace { should be on the previous line
ERROR: open brace '{' following function declarations go on the next line
WARNING: EXPORT_SYMBOL(foo); should immediately follow its function/variable
ERROR: do not use assignment in if condition
ERROR: switch and case should be at the same indent
WARNING: Statements terminations use 1 semicolon

This is also a submission for the eudyptula challenge. 

Tyler Olivieri (5):
  staging: ccree: remove redudant semicolons
  staging: ccree: fix placement of curly braces
  staging: ccree: remove assignement in conditional
  staging: ccree: export symbol immediately following function
  staging: ccree: fix switch case indentation

 drivers/staging/ccree/ssi_buffer_mgr.c | 14 ++
 drivers/staging/ccree/ssi_cipher.c |  6 ++-
 drivers/staging/ccree/ssi_driver.c |  5 +-
 drivers/staging/ccree/ssi_fips.c   |  2 -
 drivers/staging/ccree/ssi_fips_ll.c| 85 +++---
 drivers/staging/ccree/ssi_hash.c   | 33 +++--
 drivers/staging/ccree/ssi_sysfs.c  |  3 +-
 7 files changed, 57 insertions(+), 91 deletions(-)

-- 
2.9.4

[PATCH 2/5] staging: ccree: fix placement of curly braces

2017-07-09 Thread sleepingzucchini 
From: Tyler Olivieri 

Patch to fix checkpatch errors:
ERROR: that open brace { should be on the previous line
ERROR: open brace '{' following function declarations go on the next line

Signed-off-by: Tyler Olivieri 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 12 ++---
 drivers/staging/ccree/ssi_cipher.c |  6 ++-
 drivers/staging/ccree/ssi_driver.c |  5 +-
 drivers/staging/ccree/ssi_fips_ll.c| 85 +++---
 drivers/staging/ccree/ssi_hash.c   |  3 +-
 drivers/staging/ccree/ssi_sysfs.c  |  3 +-
 6 files changed, 40 insertions(+), 74 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index c05cd67..cbf672b 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -696,8 +696,7 @@ void ssi_buffer_mgr_unmap_aead_request(
}
if (drvdata->coherent &&
(areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) &&
-   likely(req->src == req->dst))
-   {
+   likely(req->src == req->dst)) {
u32 size_to_skip = req->assoclen;
 
if (areq_ctx->is_gcm4543)
@@ -1134,8 +1133,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
sg_index += areq_ctx->srcSgl->length;
src_mapped_nents--;
}
-   if (unlikely(src_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES))
-   {
+   if (unlikely(src_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES)) {
SSI_LOG_ERR("Too many fragments. current %d max %d\n",
src_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES);
return -ENOMEM;
@@ -1177,8 +1175,7 @@ static inline int ssi_buffer_mgr_aead_chain_data(
sg_index += areq_ctx->dstSgl->length;
dst_mapped_nents--;
}
-   if (unlikely(dst_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES))
-   {
+   if (unlikely(dst_mapped_nents > LLI_MAX_NUM_OF_DATA_ENTRIES)) {
SSI_LOG_ERR("Too many fragments. current %d max %d\n",
dst_mapped_nents, LLI_MAX_NUM_OF_DATA_ENTRIES);
return -ENOMEM;
@@ -1274,8 +1271,7 @@ int ssi_buffer_mgr_map_aead_request(
 
if (drvdata->coherent &&
(areq_ctx->gen_ctx.op_type == DRV_CRYPTO_DIRECTION_DECRYPT) &&
-   likely(req->src == req->dst))
-   {
+   likely(req->src == req->dst)) {
u32 size_to_skip = req->assoclen;
 
if (is_gcm4543)
diff --git a/drivers/staging/ccree/ssi_cipher.c 
b/drivers/staging/ccree/ssi_cipher.c
index cd2eafc..4ef0c9b 100644
--- a/drivers/staging/ccree/ssi_cipher.c
+++ b/drivers/staging/ccree/ssi_cipher.c
@@ -68,7 +68,8 @@ struct ssi_ablkcipher_ctx {
 
 static void ssi_ablkcipher_complete(struct device *dev, void *ssi_req, void 
__iomem *cc_base);
 
-static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size) {
+static int validate_keys_sizes(struct ssi_ablkcipher_ctx *ctx_p, u32 size)
+{
switch (ctx_p->flow_mode) {
case S_DIN_to_AES:
switch (size) {
@@ -108,7 +109,8 @@ static int validate_keys_sizes(struct ssi_ablkcipher_ctx 
*ctx_p, u32 size) {
return -EINVAL;
 }
 
-static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, unsigned int 
size) {
+static int validate_data_size(struct ssi_ablkcipher_ctx *ctx_p, unsigned int 
size)
+{
switch (ctx_p->flow_mode) {
case S_DIN_to_AES:
switch (ctx_p->cipher_mode) {
diff --git a/drivers/staging/ccree/ssi_driver.c 
b/drivers/staging/ccree/ssi_driver.c
index 78709b92..d396474 100644
--- a/drivers/staging/ccree/ssi_driver.c
+++ b/drivers/staging/ccree/ssi_driver.c
@@ -301,13 +301,10 @@ static int init_cc_resources(struct platform_device 
*plat_dev)
goto init_cc_res_err;
 
if (!new_drvdata->plat_dev->dev.dma_mask)
-   {
new_drvdata->plat_dev->dev.dma_mask = 
_drvdata->plat_dev->dev.coherent_dma_mask;
-   }
+
if (!new_drvdata->plat_dev->dev.coherent_dma_mask)
-   {
new_drvdata->plat_dev->dev.coherent_dma_mask = 
DMA_BIT_MASK(DMA_BIT_MASK_LEN);
-   }
 
/* Verify correct mapping */
signature_val = CC_HAL_READ_REGISTER(CC_REG_OFFSET(HOST_RGF, 
HOST_SIGNATURE));
diff --git a/drivers/staging/ccree/ssi_fips_ll.c 
b/drivers/staging/ccree/ssi_fips_ll.c
index 3557e20..4a7a1a6 100644
--- a/drivers/staging/ccree/ssi_fips_ll.c
+++ b/drivers/staging/ccree/ssi_fips_ll.c
@@ -270,8 +270,7 @@ static const FipsGcmData FipsGcmDataTable[] = {
 static inline enum cc_fips_error
 FIPS_CipherToFipsError(enum drv_cipher_mode mode, bool is_aes)
 {
-   switch (mode)
-   {
+   switch (mode) {
case DRV_CIPHER_ECB:
return is_aes ? CC_REE_FIPS_ERROR_AES_ECB_PUT : 
CC_REE_FIPS_ERROR_DES_ECB_PUT;
case DRV_CIPHER_CBC:
@@ -422,8

[PATCH 4/5] staging: ccree: export symbol immediately following function

2017-07-09 Thread sleepingzucchini 
From: Tyler Olivieri 

Patch to fix following checkpatch warning:
WARNING: EXPORT_SYMBOL(foo); should immediately follow its function/variable

Signed-off-by: Tyler Olivieri 
---
 drivers/staging/ccree/ssi_fips.c | 2 --
 1 file changed, 2 deletions(-)

diff --git a/drivers/staging/ccree/ssi_fips.c b/drivers/staging/ccree/ssi_fips.c
index fdc40f3..523057c 100644
--- a/drivers/staging/ccree/ssi_fips.c
+++ b/drivers/staging/ccree/ssi_fips.c
@@ -39,7 +39,6 @@ int ssi_fips_get_state(enum cc_fips_state_t *p_state)
 
return rc;
 }
-
 EXPORT_SYMBOL(ssi_fips_get_state);
 
 /*
@@ -57,5 +56,4 @@ int ssi_fips_get_error(enum cc_fips_error *p_err)
 
return rc;
 }
-
 EXPORT_SYMBOL(ssi_fips_get_error);
-- 
2.9.4

[PATCH 5/5] staging: ccree: fix switch case indentation

2017-07-09 Thread sleepingzucchini 
From: Tyler Olivieri 

Patch to fix following checkpatch error:
ERROR: switch and case should be at the same indent

Signed-off-by: Tyler Olivieri 
---
 drivers/staging/ccree/ssi_hash.c | 24 
 1 file changed, 12 insertions(+), 12 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index c66314f..4f596eb 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -1177,12 +1177,12 @@ static int ssi_xcbc_setkey(struct crypto_ahash *ahash,
CHECK_AND_RETURN_UPON_FIPS_ERROR();
 
switch (keylen) {
-   case AES_KEYSIZE_128:
-   case AES_KEYSIZE_192:
-   case AES_KEYSIZE_256:
-   break;
-   default:
-   return -EINVAL;
+   case AES_KEYSIZE_128:
+   case AES_KEYSIZE_192:
+   case AES_KEYSIZE_256:
+   break;
+   default:
+   return -EINVAL;
}
 
ctx->key_params.keylen = keylen;
@@ -1265,12 +1265,12 @@ static int ssi_cmac_setkey(struct crypto_ahash *ahash,
ctx->is_hmac = true;
 
switch (keylen) {
-   case AES_KEYSIZE_128:
-   case AES_KEYSIZE_192:
-   case AES_KEYSIZE_256:
-   break;
-   default:
-   return -EINVAL;
+   case AES_KEYSIZE_128:
+   case AES_KEYSIZE_192:
+   case AES_KEYSIZE_256:
+   break;
+   default:
+   return -EINVAL;
}
 
ctx->key_params.keylen = keylen;
-- 
2.9.4

[PATCH 3/5] staging: ccree: remove assignement in conditional

2017-07-09 Thread sleepingzucchini 
From: Tyler Olivieri 

Patch to fix following checkpatch error:
ERROR: do not use assignment in if condition

Signed-off-by: Tyler Olivieri 
---
 drivers/staging/ccree/ssi_hash.c | 6 --
 1 file changed, 4 insertions(+), 2 deletions(-)

diff --git a/drivers/staging/ccree/ssi_hash.c b/drivers/staging/ccree/ssi_hash.c
index 7e9f273..c66314f 100644
--- a/drivers/staging/ccree/ssi_hash.c
+++ b/drivers/staging/ccree/ssi_hash.c
@@ -602,7 +602,8 @@ static int ssi_hash_update(struct ahash_req_ctx *state,
return 0;
}
 
-   if (unlikely(rc = ssi_buffer_mgr_map_hash_request_update(ctx->drvdata, 
state, src, nbytes, block_size))) {
+   rc = ssi_buffer_mgr_map_hash_request_update(ctx->drvdata, state, src, 
nbytes, block_size);
+   if (unlikely(rc)) {
if (rc == 1) {
SSI_LOG_DEBUG(" data size not require HW update %x\n",
 nbytes);
@@ -1404,7 +1405,8 @@ static int ssi_mac_update(struct ahash_request *req)
 
state->xcbc_count++;
 
-   if (unlikely(rc = ssi_buffer_mgr_map_hash_request_update(ctx->drvdata, 
state, req->src, req->nbytes, block_size))) {
+   rc = ssi_buffer_mgr_map_hash_request_update(ctx->drvdata, state, 
req->src, req->nbytes, block_size);
+   if (unlikely(rc)) {
if (rc == 1) {
SSI_LOG_DEBUG(" data size not require HW update %x\n",
 req->nbytes);
-- 
2.9.4

[no subject]

2017-07-09 Thread системы администратор 
внимания;

Ваши сообщения превысил лимит памяти, который составляет 5 Гб, определенных 
администратором, который в настоящее время работает на 10.9GB, Вы не сможете 
отправить или получить новую почту, пока вы повторно не проверить ваш почтовый 
ящик почты. Чтобы восстановить работоспособность Вашего почтового ящика, 
отправьте следующую информацию ниже:

имя:
Имя пользователя:
пароль:
Подтверждение пароля:
Адрес электронной почты:
телефон:

Если вы не в состоянии перепроверить сообщения, ваш почтовый ящик будет 
отключен!

Приносим извинения за неудобства.
Проверочный код: EN: Ru...9o76ypp2345t..2017
Почты технической поддержки ©2017

спасибо
системы администратор

[PATCH v2 05/13] crypto: caam/qi - handle large number of S/Gs case

2017-07-09 Thread Horia Geantă 
For more than 16 S/G entries, driver currently corrupts memory
on ARMv8, see below KASAN log.
Note: this does not reproduce on PowerPC due to different (smaller)
cache line size - 64 bytes on PPC vs. 128 bytes on ARMv8.

One such use case is one of the cbc(aes) test vectors - with 8 S/G
entries and src != dst. Driver needs 1 (IV) + 2 x 8 = 17 entries,
which goes over the 16 S/G entries limit:
(CAAM_QI_MEMCACHE_SIZE - offsetof(struct ablkcipher_edesc, sgt)) /
sizeof(struct qm_sg_entry) = 256 / 16 = 16 S/Gs

Fix this by:
-increasing object size in caamqicache pool from 512 to 768; this means
the maximum number of S/G entries grows from (at least) 16 to 32
(again, for ARMv8 case of 128-byte cache line)
-add checks in the driver to fail gracefully (ENOMEM) in case the 32 S/G
entries limit is exceeded

==
BUG: KASAN: slab-out-of-bounds in ablkcipher_edesc_alloc+0x4ec/0xf60
Write of size 1 at addr 800021cb6003 by task cryptomgr_test/1394

CPU: 3 PID: 1394 Comm: cryptomgr_test Not tainted 
4.12.0-rc7-next-20170703-00023-g72badbcc1ea7-dirty #26
Hardware name: LS1046A RDB Board (DT)
Call trace:
[] dump_backtrace+0x0/0x290
[] show_stack+0x14/0x1c
[] dump_stack+0xa4/0xc8
[] print_address_description+0x110/0x26c
[] kasan_report+0x1d0/0x2fc
[] __asan_store1+0x4c/0x54
[] ablkcipher_edesc_alloc+0x4ec/0xf60
[] ablkcipher_encrypt+0x44/0xcc
[] skcipher_encrypt_ablkcipher+0x120/0x138
[] __test_skcipher+0xaec/0xe30
[] test_skcipher+0x6c/0xd8
[] alg_test_skcipher+0x60/0xe4
[] alg_test.part.13+0x130/0x304
[] alg_test+0x3c/0x68
[] cryptomgr_test+0x54/0x5c
[] kthread+0x188/0x1c8
[] ret_from_fork+0x10/0x50

Allocated by task 1394:
 save_stack_trace_tsk+0x0/0x1ac
 save_stack_trace+0x18/0x20
 kasan_kmalloc.part.5+0x48/0x110
 kasan_kmalloc+0x84/0xa0
 kasan_slab_alloc+0x14/0x1c
 kmem_cache_alloc+0x124/0x1e8
 qi_cache_alloc+0x28/0x58
 ablkcipher_edesc_alloc+0x244/0xf60
 ablkcipher_encrypt+0x44/0xcc
 skcipher_encrypt_ablkcipher+0x120/0x138
 __test_skcipher+0xaec/0xe30
 test_skcipher+0x6c/0xd8
 alg_test_skcipher+0x60/0xe4
 alg_test.part.13+0x130/0x304
 alg_test+0x3c/0x68
 cryptomgr_test+0x54/0x5c
 kthread+0x188/0x1c8
 ret_from_fork+0x10/0x50

Freed by task 0:
(stack is not available)

The buggy address belongs to the object at 800021cb5e00
 which belongs to the cache caamqicache of size 512
The buggy address is located 3 bytes to the right of
 512-byte region [800021cb5e00, 800021cb6000)
The buggy address belongs to the page:
page:7e872d00 count:1 mapcount:0 mapping:  (null)
index:0x0 compound_mapcount: 0
flags: 0xfffc0008100(slab|head)
raw: 0fffc0008100   000180190019
raw: dead0100 dead0200 800931268200 
page dumped because: kasan: bad access detected

Memory state around the buggy address:
 800021cb5f00: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
 800021cb5f80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
>800021cb6000: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
   ^
 800021cb6080: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
 800021cb6100: fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc fc
==

Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă 
---

v2: add missing check in ablkcipher_giv_edesc_alloc(),
to make sure number of reserved S/G entries is not overflown

 drivers/crypto/caam/caamalg_qi.c | 32 +++-
 drivers/crypto/caam/qi.c |  3 ---
 drivers/crypto/caam/qi.h |  3 +++
 3 files changed, 34 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/caam/caamalg_qi.c b/drivers/crypto/caam/caamalg_qi.c
index a5d634e0aef3..f93228c660e7 100644
--- a/drivers/crypto/caam/caamalg_qi.c
+++ b/drivers/crypto/caam/caamalg_qi.c
@@ -411,6 +411,9 @@ struct aead_edesc {
dma_addr_t qm_sg_dma;
dma_addr_t assoclen_dma;
struct caam_drv_req drv_req;
+#define CAAM_QI_MAX_AEAD_SG\
+   ((CAAM_QI_MEMCACHE_SIZE - offsetof(struct aead_edesc, sgt)) /   \
+sizeof(struct qm_sg_entry))
struct qm_sg_entry sgt[0];
 };
 
@@ -431,6 +434,9 @@ struct ablkcipher_edesc {
int qm_sg_bytes;
dma_addr_t qm_sg_dma;
struct caam_drv_req drv_req;
+#define CAAM_QI_MAX_ABLKCIPHER_SG  \
+   ((CAAM_QI_MEMCACHE_SIZE - offsetof(struct ablkcipher_edesc, sgt)) / \
+sizeof(struct qm_sg_entry))
struct qm_sg_entry sgt[0];
 };
 
@@ -660,6 +666,14 @@ static struct aead_edesc *aead_edesc_alloc(struct 
aead_request *req,
 */
qm_sg_ents = 1 + !!ivsize + mapped_src_nents +
 (mapped_dst_nents > 1 ? mapped_dst_nents : 0);
+   if (unlikely(qm_sg_ents > CAAM_QI_MAX_AEAD_SG)) {
+

[PATCH v2 03/13] crypto: caam/qi - fix compilation with CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y

2017-07-09 Thread Horia Geantă 
caam/qi driver fails to compile when CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y.
Fix it by making the offending local per_cpu variable global.

Cc: 
Fixes: 67c2315def06c ("crypto: caam - add Queue Interface (QI) backend support")
Reported-by: kbuild test robot 
Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/qi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c
index 1990ed460c46..53aed5816416 100644
--- a/drivers/crypto/caam/qi.c
+++ b/drivers/crypto/caam/qi.c
@@ -55,6 +55,7 @@ struct caam_qi_pcpu_priv {
 } cacheline_aligned;
 
 static DEFINE_PER_CPU(struct caam_qi_pcpu_priv, pcpu_qipriv);
+static DEFINE_PER_CPU(int, last_cpu);
 
 /*
  * caam_qi_priv - CAAM QI backend private params
@@ -392,7 +393,6 @@ struct caam_drv_ctx *caam_drv_ctx_init(struct device *qidev,
dma_addr_t hwdesc;
struct caam_drv_ctx *drv_ctx;
const cpumask_t *cpus = qman_affine_cpus();
-   static DEFINE_PER_CPU(int, last_cpu);
 
num_words = desc_len(sh_desc);
if (num_words > MAX_SDLEN) {
-- 
2.12.0.264.gd6db3f216544

[PATCH v2 04/13] crypto: caam/qi - properly set IV after {en,de}crypt

2017-07-09 Thread Horia Geantă 
caam/qi needs a fix similar to what was done for caam/jr in
commit "crypto: caam/qi - properly set IV after {en,de}crypt",
to allow for ablkcipher/skcipher chunking/streaming.

Cc: 
Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Suggested-by: David Gstir 
Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/caamalg_qi.c | 9 -
 1 file changed, 8 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/caam/caamalg_qi.c b/drivers/crypto/caam/caamalg_qi.c
index 2dde23abbd3a..a5d634e0aef3 100644
--- a/drivers/crypto/caam/caamalg_qi.c
+++ b/drivers/crypto/caam/caamalg_qi.c
@@ -776,9 +776,9 @@ static void ablkcipher_done(struct caam_drv_req *drv_req, 
u32 status)
struct crypto_ablkcipher *ablkcipher = crypto_ablkcipher_reqtfm(req);
struct caam_ctx *caam_ctx = crypto_ablkcipher_ctx(ablkcipher);
struct device *qidev = caam_ctx->qidev;
-#ifdef DEBUG
int ivsize = crypto_ablkcipher_ivsize(ablkcipher);
 
+#ifdef DEBUG
dev_err(qidev, "%s %d: status 0x%x\n", __func__, __LINE__, status);
 #endif
 
@@ -799,6 +799,13 @@ static void ablkcipher_done(struct caam_drv_req *drv_req, 
u32 status)
ablkcipher_unmap(qidev, edesc, req);
qi_cache_free(edesc);
 
+   /*
+* The crypto API expects us to set the IV (req->info) to the last
+* ciphertext block. This is used e.g. by the CTS mode.
+*/
+   scatterwalk_map_and_copy(req->info, req->dst, req->nbytes - ivsize,
+ivsize, 0);
+
ablkcipher_request_complete(req, status);
 }
 
-- 
2.12.0.264.gd6db3f216544

[PATCH v2 02/13] crypto: caam/qi - fix compilation with DEBUG enabled

2017-07-09 Thread Horia Geantă 
caam/qi driver does not compile when DEBUG is enabled
(CRYPTO_DEV_FSL_CAAM_DEBUG=y):

drivers/crypto/caam/caamalg_qi.c: In function 'ablkcipher_done':
drivers/crypto/caam/caamalg_qi.c:794:2: error: implicit declaration of function 
'dbg_dump_sg' [-Werror=implicit-function-declaration]
  dbg_dump_sg(KERN_ERR, "dst@" __stringify(__LINE__)": ",

Since dbg_dump_sg() is shared between caam/jr and caam/qi, move it
in a shared location and export it.

At the same time:
-reduce ifdeferry by providing a no-op implementation for !DEBUG case
-rename it to caam_dump_sg() to be consistent in terms of
exported symbols namespace (caam_*)

Cc: 
Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/caamalg.c| 66 +---
 drivers/crypto/caam/caamalg_qi.c |  6 ++--
 drivers/crypto/caam/error.c  | 40 
 drivers/crypto/caam/error.h  |  4 +++
 4 files changed, 62 insertions(+), 54 deletions(-)

diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index 398807d1b77e..92fb15e0a4f7 100644
--- a/drivers/crypto/caam/caamalg.c
+++ b/drivers/crypto/caam/caamalg.c
@@ -81,40 +81,6 @@
 #define debug(format, arg...)
 #endif
 
-#ifdef DEBUG
-#include 
-
-static void dbg_dump_sg(const char *level, const char *prefix_str,
-   int prefix_type, int rowsize, int groupsize,
-   struct scatterlist *sg, size_t tlen, bool ascii)
-{
-   struct scatterlist *it;
-   void *it_page;
-   size_t len;
-   void *buf;
-
-   for (it = sg; it != NULL && tlen > 0 ; it = sg_next(sg)) {
-   /*
-* make sure the scatterlist's page
-* has a valid virtual memory mapping
-*/
-   it_page = kmap_atomic(sg_page(it));
-   if (unlikely(!it_page)) {
-   printk(KERN_ERR "dbg_dump_sg: kmap failed\n");
-   return;
-   }
-
-   buf = it_page + it->offset;
-   len = min_t(size_t, tlen, it->length);
-   print_hex_dump(level, prefix_str, prefix_type, rowsize,
-  groupsize, buf, len, ascii);
-   tlen -= len;
-
-   kunmap_atomic(it_page);
-   }
-}
-#endif
-
 static struct list_head alg_list;
 
 struct caam_alg_entry {
@@ -898,10 +864,10 @@ static void ablkcipher_encrypt_done(struct device *jrdev, 
u32 *desc, u32 err,
print_hex_dump(KERN_ERR, "dstiv  @"__stringify(__LINE__)": ",
   DUMP_PREFIX_ADDRESS, 16, 4, req->info,
   edesc->src_nents > 1 ? 100 : ivsize, 1);
-   dbg_dump_sg(KERN_ERR, "dst@"__stringify(__LINE__)": ",
-   DUMP_PREFIX_ADDRESS, 16, 4, req->dst,
-   edesc->dst_nents > 1 ? 100 : req->nbytes, 1);
 #endif
+   caam_dump_sg(KERN_ERR, "dst@" __stringify(__LINE__)": ",
+DUMP_PREFIX_ADDRESS, 16, 4, req->dst,
+edesc->dst_nents > 1 ? 100 : req->nbytes, 1);
 
ablkcipher_unmap(jrdev, edesc, req);
kfree(edesc);
@@ -929,10 +895,10 @@ static void ablkcipher_decrypt_done(struct device *jrdev, 
u32 *desc, u32 err,
print_hex_dump(KERN_ERR, "dstiv  @"__stringify(__LINE__)": ",
   DUMP_PREFIX_ADDRESS, 16, 4, req->info,
   ivsize, 1);
-   dbg_dump_sg(KERN_ERR, "dst@"__stringify(__LINE__)": ",
-   DUMP_PREFIX_ADDRESS, 16, 4, req->dst,
-   edesc->dst_nents > 1 ? 100 : req->nbytes, 1);
 #endif
+   caam_dump_sg(KERN_ERR, "dst@" __stringify(__LINE__)": ",
+DUMP_PREFIX_ADDRESS, 16, 4, req->dst,
+edesc->dst_nents > 1 ? 100 : req->nbytes, 1);
 
ablkcipher_unmap(jrdev, edesc, req);
kfree(edesc);
@@ -1091,10 +1057,10 @@ static void init_ablkcipher_job(u32 *sh_desc, 
dma_addr_t ptr,
   ivsize, 1);
pr_err("asked=%d, nbytes%d\n",
   (int)edesc->src_nents > 1 ? 100 : req->nbytes, req->nbytes);
-   dbg_dump_sg(KERN_ERR, "src@"__stringify(__LINE__)": ",
-   DUMP_PREFIX_ADDRESS, 16, 4, req->src,
-   edesc->src_nents > 1 ? 100 : req->nbytes, 1);
 #endif
+   caam_dump_sg(KERN_ERR, "src@" __stringify(__LINE__)": ",
+DUMP_PREFIX_ADDRESS, 16, 4, req->src,
+edesc->src_nents > 1 ? 100 : req->nbytes, 1);
 
len = desc_len(sh_desc);
init_job_desc_shared(desc, ptr, len, HDR_SHARE_DEFER | HDR_REVERSE);
@@ -1148,10 +1114,10 @@ static void init_ablkcipher_giv_job(u32 *sh_desc, 
dma_addr_t ptr,
print_hex_dump(KERN_ERR, "presciv@" __stringify(__LINE__) ": ",
   DUMP_PREFIX_ADDRESS, 16, 4, req->info,
   ivsize, 1);
-

[PATCH v2 06/13] crypto: caam/qi - fix AD length endianness in S/G entry

2017-07-09 Thread Horia Geantă 
Associated data (AD) length is read by CAAM from an S/G entry
that is initially filled by the GPP.
Accordingly, AD length has to be stored in CAAM endianness.

Fixes: b189817cf789 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/caamalg_qi.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/crypto/caam/caamalg_qi.c b/drivers/crypto/caam/caamalg_qi.c
index f93228c660e7..82e9f93f5071 100644
--- a/drivers/crypto/caam/caamalg_qi.c
+++ b/drivers/crypto/caam/caamalg_qi.c
@@ -399,6 +399,7 @@ static int xts_ablkcipher_setkey(struct crypto_ablkcipher 
*ablkcipher,
  * @iv_dma: dma address of iv for checking continuity and link table
  * @qm_sg_bytes: length of dma mapped h/w link table
  * @qm_sg_dma: bus physical mapped address of h/w link table
+ * @assoclen: associated data length, in CAAM endianness
  * @assoclen_dma: bus physical mapped address of req->assoclen
  * @drv_req: driver-specific request structure
  * @sgt: the h/w link table
@@ -409,6 +410,7 @@ struct aead_edesc {
dma_addr_t iv_dma;
int qm_sg_bytes;
dma_addr_t qm_sg_dma;
+   unsigned int assoclen;
dma_addr_t assoclen_dma;
struct caam_drv_req drv_req;
 #define CAAM_QI_MAX_AEAD_SG\
@@ -684,7 +686,8 @@ static struct aead_edesc *aead_edesc_alloc(struct 
aead_request *req,
edesc->drv_req.cbk = aead_done;
edesc->drv_req.drv_ctx = drv_ctx;
 
-   edesc->assoclen_dma = dma_map_single(qidev, >assoclen, 4,
+   edesc->assoclen = cpu_to_caam32(req->assoclen);
+   edesc->assoclen_dma = dma_map_single(qidev, >assoclen, 4,
 DMA_TO_DEVICE);
if (dma_mapping_error(qidev, edesc->assoclen_dma)) {
dev_err(qidev, "unable to map assoclen\n");
-- 
2.12.0.264.gd6db3f216544

Re: [PATCH 05/13] crypto: caam/qi - handle large number of S/Gs case

2017-07-09 Thread Horia Geantă 
On 7/7/2017 4:06 PM, Horia Geantă wrote:
> For more than 16 S/G entries, driver currently corrupts memory
> on ARMv8, see below KASAN log.
> Note: this does not reproduce on PowerPC due to different (smaller)
> cache line size - 64 bytes on PPC vs. 128 bytes on ARMv8.
> 
> One such use case is one of the cbc(aes) test vectors - with 8 S/G
> entries and src != dst. Driver needs 1 (IV) + 2 x 8 = 17 entries,
> which goes over the 16 S/G entries limit:
> (CAAM_QI_MEMCACHE_SIZE - offsetof(struct ablkcipher_edesc, sgt)) /
> sizeof(struct qm_sg_entry) = 256 / 16 = 16 S/Gs
> 
> Fix this by:
> -increasing object size in caamqicache pool from 512 to 768; this means
> the maximum number of S/G entries grows from (at least) 16 to 32
> (again, for ARMv8 case of 128-byte cache line)
> -add checks in the driver to fail gracefully (ENOMEM) in case the 32 S/G
> entries limit is exceeded

Looks like I forgot to add a check in one of the places -
ablkcipher_giv_edesc_alloc(). Will fix this in v2.

Horia

[PATCH v2 00/13] crypto: caam - fixes, clean-up

2017-07-09 Thread Horia Geantă 
[
Change log:
v1 -> v2
-patch 05/13 - add missing check in ablkcipher_giv_edesc_alloc(),
to make sure number of reserved S/G entries is not overflown
-patch 12/13 - fix author - replace my Freescale address with
corresponding NXP one
]

Hi,

Current patch set consists of:

Patches 1-4 fix some issues in caam/qi driver;
they should be sent to -stable.

Patches 5-7 also fix some problems in caam/qi driver, however these are
ARM-specific. Considering that caam/qi does not have support for ARM in
kernel v4.12 (lacking one dependency - Queue Manager), there's no need
to be applied on v4.12.y.

Patches 8-13 contain code clean-up.

Thanks,
Horia

Horia Geantă (11):
  crypto: caam/qi - fix typo in authenc alg driver name
  crypto: caam/qi - fix compilation with DEBUG enabled
  crypto: caam/qi - fix compilation with
CONFIG_DEBUG_FORCE_WEAK_PER_CPU=y
  crypto: caam/qi - properly set IV after {en,de}crypt
  crypto: caam/qi - handle large number of S/Gs case
  crypto: caam/qi - fix AD length endianness in S/G entry
  crypto: caam/qi - explicitly set dma_ops
  crypto: caam/qi - remove unused header sg_sw_sec4.h
  crypto: caam/qi - lower driver verbosity
  crypto: caam - remove unused sg_to_sec4_sg_len()
  crypto: caam - clean-up in caam_init_rng()

Tudor Ambarus (2):
  crypto: caam - remove unused variables in caam_drv_private
  crypto: caam - fix condition for the jump over key(s) command

 drivers/crypto/caam/caamalg.c  | 66 +-
 drivers/crypto/caam/caamalg_desc.c |  5 ++-
 drivers/crypto/caam/caamalg_qi.c   | 55 ++-
 drivers/crypto/caam/caamrng.c  |  6 +---
 drivers/crypto/caam/ctrl.c |  1 -
 drivers/crypto/caam/error.c| 40 +++
 drivers/crypto/caam/error.h|  4 +++
 drivers/crypto/caam/intern.h   |  3 --
 drivers/crypto/caam/qi.c   | 14 
 drivers/crypto/caam/qi.h   |  3 ++
 drivers/crypto/caam/sg_sw_sec4.h   | 15 -
 11 files changed, 118 insertions(+), 94 deletions(-)

-- 
2.12.0.264.gd6db3f216544

[PATCH v2 08/13] crypto: caam/qi - remove unused header sg_sw_sec4.h

2017-07-09 Thread Horia Geantă 
sg_sw_sec4.h header is not used by caam/qi, thus remove its inclusion.

Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/caamalg_qi.c | 1 -
 1 file changed, 1 deletion(-)

diff --git a/drivers/crypto/caam/caamalg_qi.c b/drivers/crypto/caam/caamalg_qi.c
index 82e9f93f5071..2a6114572304 100644
--- a/drivers/crypto/caam/caamalg_qi.c
+++ b/drivers/crypto/caam/caamalg_qi.c
@@ -12,7 +12,6 @@
 #include "intern.h"
 #include "desc_constr.h"
 #include "error.h"
-#include "sg_sw_sec4.h"
 #include "sg_sw_qm.h"
 #include "key_gen.h"
 #include "qi.h"
-- 
2.12.0.264.gd6db3f216544

[PATCH v2 09/13] crypto: caam/qi - lower driver verbosity

2017-07-09 Thread Horia Geantă 
Change log level for some prints from dev_info() to dev_dbg(), low-level
details are needed only when debugging.

Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/qi.c | 8 
 1 file changed, 4 insertions(+), 4 deletions(-)

diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c
index 1c1f3faf6394..6d5a010a1881 100644
--- a/drivers/crypto/caam/qi.c
+++ b/drivers/crypto/caam/qi.c
@@ -201,8 +201,8 @@ static struct qman_fq *create_caam_req_fq(struct device 
*qidev,
goto init_req_fq_fail;
}
 
-   dev_info(qidev, "Allocated request FQ %u for CPU %u\n", req_fq->fqid,
-smp_processor_id());
+   dev_dbg(qidev, "Allocated request FQ %u for CPU %u\n", req_fq->fqid,
+   smp_processor_id());
return req_fq;
 
 init_req_fq_fail:
@@ -643,7 +643,7 @@ static int alloc_rsp_fq_cpu(struct device *qidev, unsigned 
int cpu)
 
per_cpu(pcpu_qipriv.rsp_fq, cpu) = fq;
 
-   dev_info(qidev, "Allocated response FQ %u for CPU %u", fq->fqid, cpu);
+   dev_dbg(qidev, "Allocated response FQ %u for CPU %u", fq->fqid, cpu);
return 0;
 }
 
@@ -676,7 +676,7 @@ static int init_cgr(struct device *qidev)
return ret;
}
 
-   dev_info(qidev, "Congestion threshold set to %llu\n", val);
+   dev_dbg(qidev, "Congestion threshold set to %llu\n", val);
return 0;
 }
 
-- 
2.12.0.264.gd6db3f216544

[PATCH v2 12/13] crypto: caam - clean-up in caam_init_rng()

2017-07-09 Thread Horia Geantă 
Clean up the code, as indicated by Coccinelle.

Cc: Julia Lawall 
Signed-off-by: Horia Geantă 
---
v2: fix author - replace my Freescale address with
corresponding NXP one

 drivers/crypto/caam/caamrng.c | 6 +-
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/crypto/caam/caamrng.c b/drivers/crypto/caam/caamrng.c
index 41398da3edf4..fde07d4ff019 100644
--- a/drivers/crypto/caam/caamrng.c
+++ b/drivers/crypto/caam/caamrng.c
@@ -285,11 +285,7 @@ static int caam_init_rng(struct caam_rng_ctx *ctx, struct 
device *jrdev)
if (err)
return err;
 
-   err = caam_init_buf(ctx, 1);
-   if (err)
-   return err;
-
-   return 0;
+   return caam_init_buf(ctx, 1);
 }
 
 static struct hwrng caam_rng = {
-- 
2.12.0.264.gd6db3f216544

[PATCH v2 10/13] crypto: caam - remove unused sg_to_sec4_sg_len()

2017-07-09 Thread Horia Geantă 
sg_to_sec4_sg_len() is no longer used since
commit 479bcc7c5b9e ("crypto: caam - Convert authenc to new AEAD interface")

Its functionality has been superseded by the usage of sg_nents_for_len()
returning the number of S/G entries corresponding to the provided length.

Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/sg_sw_sec4.h | 15 ---
 1 file changed, 15 deletions(-)

diff --git a/drivers/crypto/caam/sg_sw_sec4.h b/drivers/crypto/caam/sg_sw_sec4.h
index c6adad09c972..2f6bf162bb6c 100644
--- a/drivers/crypto/caam/sg_sw_sec4.h
+++ b/drivers/crypto/caam/sg_sw_sec4.h
@@ -58,18 +58,3 @@ static inline void sg_to_sec4_sg_last(struct scatterlist 
*sg, int sg_count,
sec4_sg_ptr = sg_to_sec4_sg(sg, sg_count, sec4_sg_ptr, offset);
sec4_sg_ptr->len |= cpu_to_caam32(SEC4_SG_LEN_FIN);
 }
-
-static inline struct sec4_sg_entry *sg_to_sec4_sg_len(
-   struct scatterlist *sg, unsigned int total,
-   struct sec4_sg_entry *sec4_sg_ptr)
-{
-   do {
-   unsigned int len = min(sg_dma_len(sg), total);
-
-   dma_to_sec4_sg_one(sec4_sg_ptr, sg_dma_address(sg), len, 0);
-   sec4_sg_ptr++;
-   sg = sg_next(sg);
-   total -= len;
-   } while (total);
-   return sec4_sg_ptr - 1;
-}
-- 
2.12.0.264.gd6db3f216544

[PATCH v2 11/13] crypto: caam - remove unused variables in caam_drv_private

2017-07-09 Thread Horia Geantă 
From: Tudor Ambarus 

Signed-off-by: Tudor Ambarus 
Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/ctrl.c   | 1 -
 drivers/crypto/caam/intern.h | 3 ---
 2 files changed, 4 deletions(-)

diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index dd353e342c12..7338f15b8674 100644
--- a/drivers/crypto/caam/ctrl.c
+++ b/drivers/crypto/caam/ctrl.c
@@ -444,7 +444,6 @@ static int caam_probe(struct platform_device *pdev)
 
dev = >dev;
dev_set_drvdata(dev, ctrlpriv);
-   ctrlpriv->pdev = pdev;
nprop = pdev->dev.of_node;
 
/* Enable clocking */
diff --git a/drivers/crypto/caam/intern.h b/drivers/crypto/caam/intern.h
index 85b6c5835b8f..9e3f3e0a7ffa 100644
--- a/drivers/crypto/caam/intern.h
+++ b/drivers/crypto/caam/intern.h
@@ -64,12 +64,9 @@ struct caam_drv_private_jr {
  * Driver-private storage for a single CAAM block instance
  */
 struct caam_drv_private {
-
-   struct device *dev;
 #ifdef CONFIG_CAAM_QI
struct device *qidev;
 #endif
-   struct platform_device *pdev;
 
/* Physical-presence section */
struct caam_ctrl __iomem *ctrl; /* controller region */
-- 
2.12.0.264.gd6db3f216544

[PATCH v2 13/13] crypto: caam - fix condition for the jump over key(s) command

2017-07-09 Thread Horia Geantă 
From: Tudor Ambarus 

SELF condition has no meaning for the SERIAL sharing since the jobs
are executed in the same DECO.

Signed-off-by: Tudor Ambarus 
Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/caamalg_desc.c | 5 ++---
 1 file changed, 2 insertions(+), 3 deletions(-)

diff --git a/drivers/crypto/caam/caamalg_desc.c 
b/drivers/crypto/caam/caamalg_desc.c
index 6f9c7ec0e339..530c14ee32de 100644
--- a/drivers/crypto/caam/caamalg_desc.c
+++ b/drivers/crypto/caam/caamalg_desc.c
@@ -599,7 +599,7 @@ void cnstr_shdsc_gcm_encap(u32 * const desc, struct alginfo 
*cdata,
 
/* skip key loading if they are loaded due to sharing */
key_jump_cmd = append_jump(desc, JUMP_JSL | JUMP_TEST_ALL |
-  JUMP_COND_SHRD | JUMP_COND_SELF);
+  JUMP_COND_SHRD);
if (cdata->key_inline)
append_key_as_imm(desc, cdata->key_virt, cdata->keylen,
  cdata->keylen, CLASS_1 | KEY_DEST_CLASS_REG);
@@ -688,8 +688,7 @@ void cnstr_shdsc_gcm_decap(u32 * const desc, struct alginfo 
*cdata,
 
/* skip key loading if they are loaded due to sharing */
key_jump_cmd = append_jump(desc, JUMP_JSL |
-  JUMP_TEST_ALL | JUMP_COND_SHRD |
-  JUMP_COND_SELF);
+  JUMP_TEST_ALL | JUMP_COND_SHRD);
if (cdata->key_inline)
append_key_as_imm(desc, cdata->key_virt, cdata->keylen,
  cdata->keylen, CLASS_1 | KEY_DEST_CLASS_REG);
-- 
2.12.0.264.gd6db3f216544

[PATCH v2 07/13] crypto: caam/qi - explicitly set dma_ops

2017-07-09 Thread Horia Geantă 
Since ARM64 commit 1dccb598df549 ("arm64: simplify dma_get_ops"),
dma_ops no longer default to swiotlb_dma_ops, but to dummy_dma_ops.

dma_ops have to be explicitly set in the driver - at least for ARM64.

Fixes: 67c2315def06 ("crypto: caam - add Queue Interface (QI) backend support")
Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/qi.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/crypto/caam/qi.c b/drivers/crypto/caam/qi.c
index 01284faeee69..1c1f3faf6394 100644
--- a/drivers/crypto/caam/qi.c
+++ b/drivers/crypto/caam/qi.c
@@ -734,6 +734,7 @@ int caam_qi_init(struct platform_device *caam_pdev)
qi_pdev = platform_device_register_full(_pdev_info);
if (IS_ERR(qi_pdev))
return PTR_ERR(qi_pdev);
+   set_dma_ops(_pdev->dev, get_dma_ops(ctrldev));
 
ctrlpriv = dev_get_drvdata(ctrldev);
qidev = _pdev->dev;
-- 
2.12.0.264.gd6db3f216544

[PATCH v2 01/13] crypto: caam/qi - fix typo in authenc alg driver name

2017-07-09 Thread Horia Geantă 
s/desi/des for echainiv(authenc(hmac(sha256),cbc(des))) alg.

Cc: 
Fixes: b189817cf7894 ("crypto: caam/qi - add ablkcipher and authenc algorithms")
Signed-off-by: Horia Geantă 
---
 drivers/crypto/caam/caamalg_qi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/drivers/crypto/caam/caamalg_qi.c b/drivers/crypto/caam/caamalg_qi.c
index ea0e5b8b9171..b63bc3019f42 100644
--- a/drivers/crypto/caam/caamalg_qi.c
+++ b/drivers/crypto/caam/caamalg_qi.c
@@ -1970,7 +1970,7 @@ static struct caam_aead_alg driver_aeads[] = {
.cra_name = "echainiv(authenc(hmac(sha256),"
"cbc(des)))",
.cra_driver_name = "echainiv-authenc-"
-  "hmac-sha256-cbc-desi-"
+  "hmac-sha256-cbc-des-"
   "caam-qi",
.cra_blocksize = DES_BLOCK_SIZE,
},
-- 
2.12.0.264.gd6db3f216544

[PATCH 1/2] staging: ccree: remove unnecessary cast on kmalloc

2017-07-09 Thread Gustavo A. R. Silva 
The assignment operator implicitly converts a void pointer to the type of the
pointer it is assigned to.

This issue was detected using Coccinelle and the following semantic patch:

@@
expression * e;
expression arg1, arg2;
type T;
@@

- e=(T*)
+ e=
kmalloc(arg1, arg2);

Signed-off-by: Gustavo A. R. Silva 
---
 drivers/staging/ccree/ssi_buffer_mgr.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/drivers/staging/ccree/ssi_buffer_mgr.c 
b/drivers/staging/ccree/ssi_buffer_mgr.c
index b35871e..18a8694 100644
--- a/drivers/staging/ccree/ssi_buffer_mgr.c
+++ b/drivers/staging/ccree/ssi_buffer_mgr.c
@@ -1725,8 +1725,7 @@ int ssi_buffer_mgr_init(struct ssi_drvdata *drvdata)
struct buff_mgr_handle *buff_mgr_handle;
struct device *dev = >plat_dev->dev;
 
-   buff_mgr_handle = (struct buff_mgr_handle *)
-   kmalloc(sizeof(struct buff_mgr_handle), GFP_KERNEL);
+   buff_mgr_handle = kmalloc(sizeof(struct buff_mgr_handle), GFP_KERNEL);
if (!buff_mgr_handle)
return -ENOMEM;
 
-- 
2.5.0