[PATCH v1] crypto: brcm - Support more FlexRM rings than SPU engines.

Enhance code to generically support cases where DMA rings are greater than or equal to number of SPU engines. New hardware has underlying DMA engine-FlexRM with 32 rings which can be used to communicate to any of the available 10 SPU engines. Fixes: 9d12ba86f818 ("crypto: brcm - Add Broadcom SPU

Re: [RFC PATCH v12 3/4] Linux Random Number Generator

On Thu, Jul 20, 2017 at 09:00:02PM +0200, Stephan Müller wrote: > I concur with your rationale where de-facto the correlation is effect is > diminished and eliminated with the fast_pool and the minimal entropy > estimation of interrupts. > > But it does not address my concern. Maybe I was not

Re: [PATCH v5 1/3] Documentation: devicetree: add Freescale RNGC binding

On Thu, Jul 20, 2017 at 3:27 PM, Martin Kaiser wrote: > From: Steffen Trumtrar > > Add binding documentation for the Freescale RNGC found on > some i.MX2/3 SoCs. > > Signed-off-by: Steffen Trumtrar > Signed-off-by: Martin

[PATCH v5 2/3] ARM: i.MX25: add RNGC node to dtsi

From: Steffen Trumtrar Add a devicetree entry for the Random Number Generator Version C (RNGC). Signed-off-by: Steffen Trumtrar Signed-off-by: Martin Kaiser --- Changes in v5: none Changes in v4: none Changes in v3:

[PATCH v5 3/3] hwrng: mxc-fsl - add support for Freescale RNGC

From: Steffen Trumtrar The driver is ported from Freescales Linux git and can be found in the vendor/freescale/imx_2.6.35_maintain branch. According to that code, the RNGC is found on Freescales i.MX3/5 SoCs. The i.MX2x actually has an RNGB, which has no

[PATCH v5 1/3] Documentation: devicetree: add Freescale RNGC binding

From: Steffen Trumtrar Add binding documentation for the Freescale RNGC found on some i.MX2/3 SoCs. Signed-off-by: Steffen Trumtrar Signed-off-by: Martin Kaiser --- Changes in v5: none Changes in v4: none Changes in

Re: [RFC PATCH v12 3/4] Linux Random Number Generator

Am Mittwoch, 19. Juli 2017, 19:26:03 CEST schrieb Theodore Ts'o: Hi Theodore, > On Wed, Jul 19, 2017 at 08:22:18AM +0200, Stephan Müller wrote: > > In the email [1] I have expressed the core concerns I see -- none of them > > address the need to keep the Jitter RNG as one noise source. To

Re: [PATCH v4 1/5] powerpc: io.h: move iomap.h include so that it can use readq/writeq defs

On 20/07/17 06:36 AM, Horia Geantă wrote: > include/asm-generic/iomap.h is included before > include/linux/io-64-nonatomic-lo-hi.h: > > include/linux/io.h -> arch/powerpc/include/asm/io.h -> > include/asm-generic/iomap.h > > Thus, the "extern" version of ioread64_lo_hi and friends will be used

Re: [PATCH] crypto: ixp4xx - Fix error handling path in 'aead_perform()'

On Thu, Jul 20, 2017 at 5:04 PM, Arnd Bergmann wrote: > Coincidentally, I just came across an older patch of mine that actually > fixes the warning properly, but that for some reason ended up not > getting merged: > > https://patchwork.kernel.org/patch/8236811/ > > How about we

Re: [PATCH] crypto: ixp4xx - Fix error handling path in 'aead_perform()'

On Thu, Jul 20, 2017 at 9:37 AM, Arnd Bergmann wrote: > On Wed, Jul 19, 2017 at 11:47 PM, Christophe JAILLET > wrote: >> In commit 0f987e25cb8a, the source processing has been moved in front of >> the destination processing, but the error handling

Re: [PATCH 3/4] crypto: axis: add ARTPEC-6/7 crypto accelerator driver

Am Donnerstag, 20. Juli 2017, 15:44:31 CEST schrieb Lars Persson: Hi Lars, > +static int > +artpec6_crypto_cipher_set_key(struct crypto_skcipher *cipher, const u8 > *key, + unsigned int keylen) > +{ > + struct artpec6_cryptotfm_context *ctx = > +

[PATCH 3/4] crypto: axis: add ARTPEC-6/7 crypto accelerator driver

This is an asynchronous crypto API driver for the accelerator present in the ARTPEC-6 and -7 SoCs from Axis Communications AB. The driver supports AES in ECB/CTR/CBC/XTS/GCM modes and SHA1/2 hash standards. Signed-off-by: Lars Persson --- drivers/crypto/Kconfig |

[PATCH 2/4] crypto: add crypto_(un)register_ahashes()

From: Rabin Vincent There are already helpers to (un)register multiple normal and AEAD algos. Add one for ahashes too. Signed-off-by: Lars Persson --- crypto/ahash.c | 29 + include/crypto/internal/hash.h | 2 ++

[PATCH 4/4] MAINTAINERS: Add ARTPEC crypto maintainer

Assign the Axis kernel team as maintainer for crypto drivers under drivers/crypto/axis. Signed-off-by: Lars Persson --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index d5b6c71e783e..72186cf9820d 100644 --- a/MAINTAINERS +++

[PATCH 1/4] dt-bindings: crypto: add ARTPEC crypto

Document the device tree bindings for the ARTPEC crypto accelerator on ARTPEC-6 and ARTPEC-7 SoCs. Signed-off-by: Lars Persson --- .../devicetree/bindings/crypto/artpec6-crypto.txt| 16 1 file changed, 16 insertions(+) create mode 100644

[PATCH 0/4] crypto: add driver for Axis ARTPEC crypto accelerator

This series adds a driver for the crypto accelerator in the ARTPEC series of SoCs from Axis Communications AB. Lars Persson (3): dt-bindings: crypto: add ARTPEC crypto crypto: axis: add ARTPEC-6/7 crypto accelerator driver MAINTAINERS: Add ARTPEC crypto maintainer Rabin Vincent (1):

[PATCH] staging: ccree: Fix unnecessary NULL check before kfree'ing it

From: Suniel Mahesh kfree(NULL) is safe and their is no need for a NULL check. Pointed out by checkpatch. Signed-off-by: Suniel Mahesh --- Note: - Patch was compile tested and built(ARCH=arm) on next-20170719. No build issues reported. ---

[PATCH] crypto: atmel-ecc: fix signed integer to u8 assignment

static checker warning: drivers/crypto/atmel-ecc.c:281 atmel_ecdh_done() warn: assigning (-22) to unsigned variable 'status' Similar warning can be raised in atmel_ecc_work_handler() when atmel_ecc_send_receive() returns an error. Fix this too. Reported-by: Dan Carpenter

Re: [PATCH v4 3/3] hwrng: mxc-fsl - add support for Freescale RNGC

Hi Martin, Nice to see a quick turnaround. Have a minor suggestion below. On 20 July 2017 at 15:57, Martin Kaiser wrote: > From: Steffen Trumtrar > > The driver is ported from Freescales Linux git and can be > found in the > >

Re: [PATCH v1] crypto: caam - set hwrng quality level

On 07/19/2017 08:13 PM, Oleksij Rempel wrote: > On Wed, Jul 19, 2017 at 04:53:21PM +, Horia Geantă wrote: >> On 7/19/2017 7:32 PM, Oleksij Rempel wrote: >>> On Wed, Jul 19, 2017 at 12:49:47PM +, Horia Geantă wrote: On 7/19/2017 10:45 AM, Oleksij Rempel wrote: > According

Re: [PATCH v4 1/5] powerpc: io.h: move iomap.h include so that it can use readq/writeq defs

On 7/20/2017 1:27 PM, Horia Geantă wrote: > On 7/19/2017 7:04 PM, Logan Gunthorpe wrote: >> >> >> On 18/07/17 11:57 PM, Michael Ellerman wrote: >>> Seems fair enough, have you tested it at all? >> >> It's only been compile tested and the kbuild robot has beat up on it a bit. >> > Looks like the

[PATCH] crypto: scompress - eliminate percpu scratch buffers

The scompress code unconditionally allocates 2 per-CPU scratch buffers of 128 KB each, in order to avoid allocation overhead in the async wrapper that encapsulates the synchronous compression algorithm, since it may execute in atomic context. There are a couple of issues with this: - The code may

Re: [PATCH v4 1/5] powerpc: io.h: move iomap.h include so that it can use readq/writeq defs

Logan Gunthorpe writes: > On 18/07/17 11:57 PM, Michael Ellerman wrote: >> Seems fair enough, have you tested it at all? > > It's only been compile tested and the kbuild robot has beat up on it a bit. OK. I don't think I see any way it can break anything, so feel free to

[PATCH v4 1/3] Documentation: devicetree: add Freescale RNGC binding

From: Steffen Trumtrar Add binding documentation for the Freescale RNGC found on some i.MX2/3 SoCs. Signed-off-by: Steffen Trumtrar Signed-off-by: Martin Kaiser --- Changes in v4: none Changes in v3: - add compatible

[bug report] crypto: chcr - Select device in Round Robin fashion

Hello Harsh Jain, The patch 14c19b178a01: "crypto: chcr - Select device in Round Robin fashion" from Jun 15, 2017, leads to the following static checker warning: drivers/crypto/chelsio/chcr_core.c:163 chcr_uld_add() warn: overwrite may leak 'u_ctx'

[PATCH v4 2/3] ARM: i.MX25: add RNGC node to dtsi

From: Steffen Trumtrar Add a devicetree entry for the Random Number Generator Version C (RNGC). Signed-off-by: Steffen Trumtrar Signed-off-by: Martin Kaiser --- Changes in v4: none Changes in v3: - remove clock-names

[PATCH v4 3/3] hwrng: mxc-fsl - add support for Freescale RNGC

From: Steffen Trumtrar The driver is ported from Freescales Linux git and can be found in the vendor/freescale/imx_2.6.35_maintain branch. According to that code, the RNGC is found on Freescales i.MX3/5 SoCs. The i.MX2x actually has an RNGB, which has no

Re: [PATCH v4 1/5] powerpc: io.h: move iomap.h include so that it can use readq/writeq defs

On 7/19/2017 7:04 PM, Logan Gunthorpe wrote: > > > On 18/07/17 11:57 PM, Michael Ellerman wrote: >> Seems fair enough, have you tested it at all? > > It's only been compile tested and the kbuild robot has beat up on it a bit. > Looks like the patch set does not compile on PPC (.config

[bug report] crypto: atmel-ecc - introduce Microchip / Atmel ECC driver

Hello Tudor-Dan Ambarus, The patch 11105693fa05: "crypto: atmel-ecc - introduce Microchip / Atmel ECC driver" from Jul 5, 2017, leads to the following static checker warning: drivers/crypto/atmel-ecc.c:281 atmel_ecdh_done() warn: assigning (-22) to unsigned variable 'status'

[PATCH] crypto: ecdh: fix concurrency on shared secret and pubkey

ecdh_ctx contained static allocated data for the shared secret and public key. The shared secret and the public key were doomed to concurrency issues because they could be shared by multiple crypto requests. The concurrency is fixed by replacing per-tfm shared secret and public key with

Re: [PATCH] crypto: ixp4xx - Fix error handling path in 'aead_perform()'

On Wed, Jul 19, 2017 at 11:47 PM, Christophe JAILLET wrote: > In commit 0f987e25cb8a, the source processing has been moved in front of > the destination processing, but the error handling path has not been > modified accordingly. > Free resources in the correct

Re: [PATCH] Crypto: atmel-ecc: Make a couple of local functions static

On 07/19/2017 12:24 PM, Colin King wrote: From: Colin Ian King Functions atmel_ecc_i2c_client_alloc and atmel_ecc_i2c_client_free are local to the source and no not need to be in the global scope. Make them static. Cleans up sparse warnings: symbol