On Tue, 22 Nov 2005 11:45:21 +1000
David McCullough [EMAIL PROTECTED] wrote:
Jivin Kim Phillips lays it down ...
Hello all,
I'm trying out the latest OCF patch for openswan, and it's generating
'Badness in local_bh_enable' messages when I ping across the tunnel
(session details
On Tue, 20 May 2008 09:01:55 -0700
Barry G [EMAIL PROTECTED] wrote:
Hello,
I am trying to get HW accelerated IPsec connections working
on the SEC 2.4 engine in the MPC8349.
I am hoping to use StrongSwan which uses the native XFRM
kernel components. Unfortunately it looks like the only
Add support for the SEC available on a wide range of PowerQUICC devices,
e.g. MPC8349E, MPC8548E.
this initial version supports authenc(hmac(sha1),cbc(aes)) for use with IPsec.
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
---
drivers/crypto/Kconfig | 15 +
drivers/crypto/Makefile |1
On Fri, 30 May 2008 14:41:17 -0500
Scott Wood [EMAIL PROTECTED] wrote:
Kim Phillips wrote:
On Fri, 30 May 2008 22:09:04 +0400
Evgeniy Polyakov [EMAIL PROTECTED] wrote:
Don't you want to protect against simultaneous access to register space
from different CPUs? Or it is single processor
On Fri, 30 May 2008 15:19:43 -0500
Scott Wood [EMAIL PROTECTED] wrote:
Kim Phillips wrote:
On Fri, 30 May 2008 14:41:17 -0500
Scott Wood [EMAIL PROTECTED] wrote:
Kim Phillips wrote:
On Fri, 30 May 2008 22:09:04 +0400
Evgeniy Polyakov [EMAIL PROTECTED] wrote:
Don't you want
On Sat, 31 May 2008 01:12:08 +0400
Evgeniy Polyakov [EMAIL PROTECTED] wrote:
On Fri, May 30, 2008 at 03:48:20PM -0500, Kim Phillips ([EMAIL PROTECTED])
wrote:
sorry, by ISR I meant interrupt status registers. but I can't tell
where the suspected simultaneous accesses are. Evgeniy, can
Add support for the SEC available on a wide range of PowerQUICC devices,
e.g. MPC8349E, MPC8548E.
this initial version supports authenc(hmac(sha1),cbc(aes)) for use with IPsec.
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
---
removed priv-status hw interrupt status assignment. Done tasklet now
On Mon, 2 Jun 2008 20:00:12 +0400
Evgeniy Polyakov [EMAIL PROTECTED] wrote:
On Mon, Jun 02, 2008 at 09:27:01AM -0500, Kim Phillips ([EMAIL PROTECTED])
wrote:
I meant descriptor hdr value accessed via it - can it be checked in
tasklet under the lock and in submit path without? Can
On Mon, 2 Jun 2008 21:57:51 +0400
Evgeniy Polyakov [EMAIL PROTECTED] wrote:
On Mon, Jun 02, 2008 at 11:50:21AM -0500, Kim Phillips ([EMAIL PROTECTED])
wrote:
But can it be changed? You write to it without lock, but read under the
one (different for each channel though), so it attracted
On Thu, 5 Jun 2008 15:22:24 +1000
Herbert Xu [EMAIL PROTECTED] wrote:
On Fri, May 30, 2008 at 06:58:30PM -0500, Kim Phillips wrote:
+ /* get random IV */
+ get_random_bytes(req-giv, crypto_aead_ivsize(authenc));
Sorry but this is unworkable given our current RNG infrastructure
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
---
drivers/crypto/talitos.c |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index f301e95..ce4787e 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto/talitos.c
On Tue, 8 Jul 2008 14:03:28 -0400
mike zheng [EMAIL PROTECTED] wrote:
Hello,
Any one know how can I integrate the Freescale's SEC driver with
cryptoloop in Kernel2.4 on MPC8567e? Or which version of kernel shall
I take if it is already there?
Take Herbert's cryptodev-2.6 tree and add
PROTECTED]/[EMAIL
PROTECTED].
Signed-off-by: Lee Nipper [EMAIL PROTECTED]
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
---
this patchseries contains various fixes to the talitos driver, mainly as a
result of Lee's stress testing.
drivers/crypto/talitos.c |5 -
1 files changed, 0
add requests pending/submit count to prevent request queue full
condition by preempting h/w overflow interrupts in software.
We do this due to the delay in the delivery and handling of the
channel overflow error interrupt.
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
Acked-by: Lee Nipper [EMAIL
free edescriptor when returning error (such as -EAGAIN).
Signed-off-by: Kim Phillips [EMAIL PROTECTED]
Acked-by: Lee Nipper [EMAIL PROTECTED]
---
drivers/crypto/talitos.c |9 +++--
1 files changed, 7 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto
On Fri, 19 Sep 2008 16:46:43 -0700
Loc Ho [EMAIL PROTECTED] wrote:
arch/powerpc/boot/dts/kilauea.dts | 10 +
powerpc dts patches are reviewed on linuxppc-dev list. For ppc4xx, it
looks like new bindings are accompanied with a patch to
Documentation/powerpc/booting-without-of.txt.
On Mon, 06 Oct 2008 15:09:00 -0500
Lee Nipper [EMAIL PROTECTED] wrote:
From: Kim Phillips [EMAIL PROTECTED]
since we ack early, the re-read interrupt status in talitos_error
may be already updated with a new value. Pass the error ISR value
directly in order to report and handle the error
On Thu, 16 Oct 2008 15:04:44 -0700
James Hsiao [EMAIL PROTECTED] wrote:
I did most of the changes based on your recommandations.
ok, I still think you'll get more powerpc review coverage on
linuxppc-dev though.
Kim
--
To unsubscribe from this list: send the line unsubscribe linux-crypto in
On Mon, 27 Oct 2008 18:55:32 -0700
James Hsiao [EMAIL PROTECTED] wrote:
Hi All,
This patch was reviewed by Kim Phillips.
Kim suggest us submit this to linuxppc-dev for more review.
Are you going to send it?
use of device_type usage in the dts and dma_ mapping operations getting
passed
On Thu, 23 Oct 2008 16:12:22 -0700
Barry G [EMAIL PROTECTED] wrote:
I wanted to enable the Talitos driver for hw entropy. If I rebuild
the kernel with
CONFIG_CRYPTO_DEV_TALITOS set to y, strongswan still successfully negotiates
an IPsec SA, but no traffic flows.
does no traffic flow at all
On Wed, 29 Oct 2008 10:33:39 -0700
Barry G [EMAIL PROTECTED] wrote:
Also, is it correct that Talitos only accelerates AEAD connections, not
ESP/AH
protocols so there will be no performance increase for me until Strongswan
adds rfc5282 support?
I'm not sure what you mean here; talitos
On Fri, 07 Nov 2008 14:30:47 -0800
James Hsiao [EMAIL PROTECTED] wrote:
diff --git a/arch/powerpc/boot/dts/kilauea.dts
b/arch/powerpc/boot/dts/kilauea.dts
index dececc4..43d4f91 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -94,6 +94,13 @@
On Tue, 02 Dec 2008 14:17:12 -0800
James Hsiao [EMAIL PROTECTED] wrote:
Hi,
This patch add canyonlands support.
Few performance optimizations:
Redesigned the crypto4xx_build_pd(), which now calculate number of
scatter and gather descriptors need before taking them. Instead take
these
On Fri, 5 Dec 2008 06:41:13 +0100
Stefan Roese [EMAIL PROTECTED] wrote:
On Friday 05 December 2008, Kim Phillips wrote:
diff --git a/arch/powerpc/boot/dts/canyonlands.dts
b/arch/powerpc/boot/dts/canyonlands.dts index 79fe412..b0f0096 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
On Mon, 08 Dec 2008 13:55:07 -0800
James Hsiao [EMAIL PROTECTED] wrote:
+ /* figure how many gd is needed */
+ if (aad_len) {
+ num_gd = get_sg_count(assoc, aad_len) +
+ get_sg_count(src, datalen);
this is dead code - aad_len is never non-zero -
On Sun, 15 Mar 2009 20:21:47 -0500
Lee Nipper lee.nip...@gmail.com wrote:
Added test for null descriptor returned from current_desc.
Also removed the diagnostic from current_desc,
and added one instead in talitos_error
to report an EU error without finding the descriptor.
Hi Lee, thanks for
general with respect to algorithm types.
Signed-off-by: Lee Nipper lee.nip...@gmail.com
Acked-by: Kim Phillips kim.phill...@freescale.com
Thanks for fixing up the algorithm registration code, Lee.
Kim
--
To unsubscribe from this list: send the line unsubscribe linux-crypto in
the body of a message
On Sun, 15 Mar 2009 20:21:49 -0500
Lee Nipper lee.nip...@gmail.com wrote:
Add these ablkcipher algorithms:
cbc(aes),
cbc(des3_ede).
ipsec_esp_edesc is renamed to talitos_edesc
to use it in ablkcipher routines.
erm...actually that shows up in the prior patch (1/3) :).
+ if (sg_count
On Sun, 15 Mar 2009 20:21:50 -0500
Lee Nipper lee.nip...@gmail.com wrote:
+ /* first DWORD empty */
+ desc-ptr[0].len = 0;
+ desc-ptr[0].ptr = 0;
+ desc-ptr[0].j_extent = 0;
+
+ /* second DWORD empty */
+ desc-ptr[1].len = 0;
+ desc-ptr[1].ptr = 0;
+
.
ipsec_esp_edesc is renamed to talitos_edesc
to use it in the upcoming ablkcipher routines.
Signed-off-by: Lee Nipper lee.nip...@gmail.com
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
resending 1-2/5 on behalf of Lee; please consider for inclusion in 2.6.30.
this patch doesn't contain any
, removed testablkcipher modparam.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c | 380 +-
1 files changed, 342 insertions(+), 38 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index
no functional changes.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c | 26 --
1 files changed, 16 insertions(+), 10 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index a073e6b..1cc1c41 100644
align channel access locks onto separate cache lines (for performance
reasons). This is done by placing per-channel variables into their own
private struct, and using the cacheline_aligned attribute within that
struct.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto
don't do request-src vs. assoc pointer math - it's the same as adding
assoclen and ivsize (just with more effort).
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c |8 +++-
1 files changed, 3 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto
On Wed, 19 Aug 2009 13:19:54 +0200
CEVAN Ondrej ondrej.ce...@frequentis.com wrote:
Hello everybody,
according to the function call in drivers/crypto/talitos.c (Linux version
2.6.29) in function ipsec_esp():
/*hmac data*/
map_single_talitos_ptr(dev, desc-ptr[1], sg_virt(areq-src) -
with fsldma
is currently disabled
Thanks to Surender Kumar and Lee Nipper for their help in
realising this driver
Signed-off-by: Kim Phillips kim.phill...@freescale.com
Signed-off-by: Dipen Dudhat dipen.dud...@freescale.com
Signed-off-by: Maneesh Gupta maneesh.gu...@freescale.com
Signed-off
On Wed, 3 Mar 2010 20:17:04 +
Dimitrios Siganos dimit...@siganos.org wrote:
Dimitrios Siganos wrote:
Hi,
I am trying to write a hmac(sha1) algorithm and I have a few
questions. I have a HW crypto accelerator that does the actual crypto
work. I have already successfully
On Mon, 15 Mar 2010 15:23:36 +
Dimitrios Siganos dimit...@siganos.org wrote:
Herbert Xu wrote:
Dimitrios Siganos dimit...@siganos.org wrote:
Hi,
I am trying to write an ABLKCIPHER algorithm for my hardware crypto
engine and I have a few questions:
1) In struct
On Fri, 30 Apr 2010 07:21:23 -0500
Lee Nipper lee.nip...@gmail.com wrote:
Add the following alorithms to talitos:
md5,
sha1,
sha256,
sha384,
sha512.
These are all type ahash.
Signed-off-by: Lee Nipper lee.nip...@gmail.com
---
Acked-by: Kim Phillips kim.phill
On Wed, 28 Apr 2010 05:33:56 -0700
lee.nip...@gmail.com wrote:
Add the following alorithms to talitos:
md5,
sha1,
sha256,
sha384,
sha512.
These are all type ahash.
sha224 is left as an exercise for the reader, I see ;)
It has been tested successfully on MPC8349E.
On Wed, 28 Apr 2010 05:33:57 -0700
lee.nip...@gmail.com wrote:
Add the these hmac algorithms to talitos:
hmac(md5),
hmac(sha1),
hmac(sha256),
hmac(sha384),
hmac(sha512).
These are all type ahash.
Signed-off-by: Lee Nipper lee.nip...@gmail.com
---
Currently on an
On Wed, 28 Apr 2010 05:33:52 -0700
lee.nip...@gmail.com wrote:
No functional changes.
Use a union in talitos_alg_template for the crypto_alg
so that we can add a member later for ahash_alg.
Signed-off-by: Lee Nipper lee.nip...@gmail.com
---
Acked-By: Kim Phillips kim.phill
...@gmail.com
---
Acked-By: Kim Phillips kim.phill...@freescale.com
Kim
--
To unsubscribe from this list: send the line unsubscribe linux-crypto in
the body of a message to majord...@vger.kernel.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
On Tue, 6 Jul 2010 09:59:38 -0700
Justin P. Mattock justinmatt...@gmail.com wrote:
@@ -2035,7 +2034,7 @@ static void hifn_flush(struct hifn_device *dev)
spin_lock_irqsave(dev-lock, flags);
while ((async_req = crypto_dequeue_request(dev-queue))) {
- ctx =
On Sun, 11 Jul 2010 15:24:06 -0500
Lee Nipper lee.nip...@gmail.com wrote:
In function sg_copy_end_to_buffer, too much data
is copied when a segment in the scatterlist
has .length greater than the requested copy length.
This patch adds the limit checks to fix this bug of over copying,
which
On Fri, 13 Aug 2010 14:45:37 -0700
David Miller da...@davemloft.net wrote:
From: Maurus Cuelenaere mcuelena...@gmail.com
Date: Fri, 13 Aug 2010 13:17:53 +0200
Op 13-08-10 00:32, David Miller schreef:
From: Maurus Cuelenaere mcuelena...@gmail.com
Date: Thu, 12 Aug 2010 13:47:24 +0200
WARNING: kfree(NULL) is safe this check is probably not required
+ if (priv-chan[i].fifo)
+ kfree(priv-chan[i].fifo);
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c |3 +--
1 files changed, 1 insertions(+), 2 deletions
drivers/crypto/talitos.c: In function 'talitos_probe':
drivers/crypto/talitos.c:2363: warning: 'alg' may be used uninitialized in this
function
drivers/crypto/talitos.c:2363: note: 'alg' was declared here
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c |3
splitting and resending due to apparent 100KB message limit imposed by
linux-crypto and devicetree-discuss mailing lists.
No content has been changed from the original post that made it through
linuxppc-dev's 400KB limit, available here:
http://patchwork.ozlabs.org/patch/86051/
Help clarify that the number trailing in compatible nomenclature
is the version number of the device, i.e., change:
fsl,p4080-sec4.0, fsl,sec4.0;
to:
fsl,p4080-sec-v4.0, fsl,sec-v4.0;
Signed-off-by: Kim Phillips kim.phill...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Steve
) ever needed CHIP references.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
Cc: Kumar Gala kumar.g...@freescale.com
Cc: Scott Wood scottw...@freescale.com
---
.../devicetree/bindings/crypto/fsl-sec4.txt| 64
arch/powerpc/boot/dts/p4080ds.dts
On Tue, 15 Mar 2011 09:57:47 +0300
Dan Carpenter erro...@gmail.com wrote:
t_alg is an ERR_PTR here so we can't dereference it.
Signed-off-by: Dan Carpenter erro...@gmail.com
---
Acked-by: Kim Phillips kim.phill...@freescale.com
Thanks,
Kim
--
To unsubscribe from this list: send the line
On Fri, 1 Apr 2011 16:23:43 +0200
Julia Lawall ju...@diku.dk wrote:
Error handling code following a kmalloc should free the allocated data.
Signed-off-by: Julia Lawall ju...@diku.dk
---
Acked-by: Kim Phillips kim.phill...@freescale.com
Kim
--
To unsubscribe from this list: send the line
On Mon, 4 Apr 2011 19:03:37 +0200
Phil Sutter p...@nwl.cc wrote:
I would like to enhance drivers/crypto/mv_cesa.c by an AEAD algorithm
(at least authenc(hmac(sha1),cbc(aes))), since the driver is able to do
both operations in one go.
Unfortunately, I have found little information about this
On Tue, 5 Apr 2011 15:04:35 +0200
Phil Sutter p...@nwl.cc wrote:
Hi,
On Mon, Apr 04, 2011 at 08:35:43PM -0500, Kim Phillips wrote:
On Mon, 4 Apr 2011 19:03:37 +0200
Phil Sutter p...@nwl.cc wrote:
I would like to enhance drivers/crypto/mv_cesa.c by an AEAD algorithm
(at least
On Fri, 8 Apr 2011 08:55:33 +0800
Herbert Xu herb...@gondor.apana.org.au wrote:
Kim Phillips kim.phill...@freescale.com wrote:
I started to add test vectors from [1] to crypto/testmgr.c, but it
required that drivers not assume associated data, iv, and cipher data
were contiguous
reset and
interrupt status
- delete invalid comment - if there were incomplete jobs,
module would be in use, preventing an unload.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
this, and the remaining patches in this series, tested on p1023, p3041,
p4080, and 32- and 64-bit p5020
The presence of a h/w Queue Interface would fail due to this
cut-n-paste snafu.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/regs.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/drivers/crypto/caam/regs.h b/drivers/crypto/caam/regs.h
On Fri, 15 Apr 2011 17:50:49 +0800
Herbert Xu herb...@gondor.apana.org.au wrote:
On Mon, Apr 11, 2011 at 07:15:16PM -0500, Kim Phillips wrote:
- add IRQF_SHARED to request_irq flags to support parts such as
the p1023 that has one IRQ line per couple of rings.
- resetting a job ring
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index 97d6dcc..719ad06 100644
--- a/drivers/crypto/caam/caamalg.c
+++ b
descriptor.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c | 26 ++
1 files changed, 22 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index b97575e..4c69ba7 100644
--- a/drivers
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c |2 --
1 files changed, 0 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index 4c69ba7..672abf3 100644
--- a/drivers/crypto/caam/caamalg.c
+++ b
.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c | 119 +
drivers/crypto/caam/desc_constr.h |1 +
2 files changed, 107 insertions(+), 13 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam
setkey allocates 16 bytes (CAAM_CMD_SZ *
DESC_AEAD_SHARED_TEXT_LEN) shy of what is needed to
store the shared descriptor, resulting in memory
corruption. Fix this.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
Bug introduced in commit 4427b1b - crypto: caam - add support for
sha512
drivers/crypto/caam/ctrl.c: In function 'caam_probe':
drivers/crypto/caam/ctrl.c:55:23: warning: unused variable 'perfmon'
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/ctrl.c |4 +++-
1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/drivers
[adding linux-crypto]
On Tue, 21 Jun 2011 10:56:02 -0500
Matt Mackall m...@selenic.com wrote:
On Tue, 2011-06-21 at 08:19 -0400, Josh Boyer wrote:
+static struct hwrng ppc4xx_rng = {
+ .name = MODULE_NAME,
+ .data_present = ppc4xx_rng_data_present,
+ .data_read =
for IPsec packets to be encrypted out-of-order,
which would result in packet drops due to sequence numbers falling
outside the anti-reply window on a peer gateway.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c | 23 ++-
1 files changed
IRQ done notification is always set. Remove its explicit
assignment from the hot path by including it in the
descriptor header template assignment in talitos_cra_init.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c |6 +++---
1 files changed, 3
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c |7 +++
1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index bd9e2ca..521244e 100644
--- a/drivers/crypto/talitos.c
+++ b/drivers/crypto
From: Yuan Kang yuan.k...@freescale.com
caam_ctx.key_phys to key_dma
caam_alg_template supports multiple algorithm types
listed in union, which requires cases for
different types in function caam_alg_alloc
Signed-off-by: Yuan Kang yuan.k...@freescale.com
Signed-off-by: Kim Phillips kim.phill
crypto/ablkcipher.c's setkey() has already checked against the min, max
key sizes before it calls here, and all max_keysize assignments in the
algorithm template array do not exceed TALITOS_MAX_KEY_SIZE.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c | 11
yuan.k...@freescale.com
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c | 274
1 files changed, 137 insertions(+), 137 deletions(-)
diff --git a/drivers/crypto/caam/caamalg.c b/drivers/crypto/caam/caamalg.c
index
From: Yuan Kang yuan.k...@freescale.com
caam now supports encrypt and decrypt
for aes, des and 3des
Signed-off-by: Yuan Kang yuan.k...@freescale.com
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c | 510 +
drivers
and cryptlen.
Signed-off-by: Yuan Kang yuan.k...@freescale.com
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c | 1104 ++---
drivers/crypto/caam/desc_constr.h | 58 ++-
2 files changed, 832 insertions(+), 330 deletions
On Mon, 19 Sep 2011 13:33:57 +0200
Sven Schnelle sv...@stackframe.org wrote:
Hi Kim,
i'm seeing the following oops on ppc (Freescale P1020):
talitos ffe3.crypto: cur_desc: (channel 1)
Unable to handle kernel paging request for data at address 0x
You should have seen
On Tue, 18 Oct 2011 09:36:18 +0200
Herbert Xu herb...@gondor.apana.org.au wrote:
Kim Phillips kim.phill...@freescale.com wrote:
The CDPR (Current Descriptor Pointer Register) can be unreliable
when trying to locate an offending descriptor. Handle that case by
(a) not OOPSing, and (b
On Fri, 4 Nov 2011 16:44:16 +0530
vwade...@nvidia.com wrote:
+/* Define sub-commands */
+enum {
+ SUBCMD_VRAM_SEL = 0x1,
+ SUBCMD_CRYPTO_TABLESEL = 0x3,
SUBCMD_CRYPTO_TABLE_SEL, to match VRAM_SEL for a more consistent
naming convention
+ SUBCMD_KEYTABLESEL = 0x8,
On Sat, 5 Nov 2011 16:12:14 +0530
vwade...@nvidia.com wrote:
+config CRYPTO_DEV_TEGRA_AES
+ tristate Support for TEGRA AES hw engine
+ depends on ARCH_TEGRA
+ select CRYPTO_AES
+ help
+ TEGRA processors have AES module accelerator. Select this if you
+ want to
On Tue, 8 Nov 2011 19:34:57 -0600
Kim Phillips kim.phill...@freescale.com wrote:
commit 3e721ae (crypto: talitos - handle descriptor not found in
error path) used the wrong offset method to access a channel's
descriptor buffer registers - the TALITOS_DESCBUF macro
doesn't take a channel
On Wed, 16 Nov 2011 12:44:50 +0530
Varun Wadekar vwade...@nvidia.com wrote:
That doesn't make the duplicate memset/copy cease to be redundant.
Why not copy the key to where it goes, then memset the rest of the data;
wouldn't that be as simple as:
memcpy(dd-ivkey_base, ctx-key,
On Wed, 16 Nov 2011 14:35:00 +0530
Varun Wadekar vwade...@nvidia.com wrote:
it's not - it saves writes.
Are you ok with this solution? Either way I wan to start with a clear
key table before programming the hardware.
the hardware doesn't care.
why do you need to clear the entire key
),
and for other cases when update/finup/final are used inefficiently.
Interestingly, a normal hash (without hmac) works perfectly
when using an intermediate context.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c | 237
/crypto, like so:
talitos ffe3.crypto: fsl,sec3.1 algorithms registered in /proc/crypto
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c |7 ---
1 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto
Add a reg member to the channel struct and use it to
access channels.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c | 37 ++---
drivers/crypto/talitos.h | 31 ---
2 files changed, 38 insertions
-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c | 203 +++---
drivers/crypto/talitos.h | 14 +++-
2 files changed, 147 insertions(+), 70 deletions(-)
diff --git a/drivers/crypto/talitos.c b/drivers/crypto/talitos.c
index
specifically, add these algorithm combinations:
authenc-hmac-md5-cbc-aes-caam
authenc-hmac-md5-cbc-des3_ede-caam
authenc-hmac-md5-cbc-des-caam
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c | 57 +
drivers
On Thu, 17 Nov 2011 09:01:16 -0600
Lee Nipper lee.nip...@gmail.com wrote:
Thanks Kim for re-submitting this patch, and the fix for avoiding
sec2.0 problem.
thanks for the code - sorry it took so long - the AH fix below was a
good motivator.
Since I don't have sec2.1+ h/w, I won't be able to
On Sun, 11 Dec 2011 13:26:26 +0100
Nikos Mavrogiannopoulos n...@gnutls.org wrote:
The added CRYPTO_ALG_KERN_DRIVER_ONLY flag indicates whether a cipher
is only available via a kernel driver. If the cipher implementation
might be available by using an instruction set or by porting the
kernel
Fix a kfree to an invalid address which causes an oops when running
on SEC v2.0 h/w (introduced in commit 702331b crypto: talitos - add
hmac algorithms).
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/talitos.c |8
1 files changed, 4 insertions(+), 4
-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/ctrl.c | 13 -
drivers/crypto/caam/regs.h |1 -
2 files changed, 0 insertions(+), 14 deletions(-)
diff --git a/drivers/crypto/caam/ctrl.c b/drivers/crypto/caam/ctrl.c
index 048bb23..8ae3ba2 100644
--- a/drivers
the polarity of the definition for error propagation was reverse
in the initial desc.h. Fix desc.h and its users.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c | 10 +-
drivers/crypto/caam/desc.h|4 ++--
drivers/crypto/caam
manual removal of double-spaces - no non-whitespace changes.
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/desc.h | 335 ++--
1 files changed, 167 insertions(+), 168 deletions(-)
diff --git a/drivers/crypto/caam/desc.h b
drivers/crypto/caam/ctrl.c: In function 'caam_probe':
drivers/crypto/caam/ctrl.c:49:6: warning: unused variable 'd'
[-Wunused-variable]
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/ctrl.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git
From: Hemant Agrawal hem...@freescale.com
Signed-off-by: Hemant Agrawal hem...@freescale.com
Signed-off-by: Kim Phillips kim.phill...@freescale.com
---
drivers/crypto/caam/caamalg.c | 115 +
1 files changed, 115 insertions(+), 0 deletions(-)
diff --git
On Fri, 13 Jan 2012 16:39:18 +1100
Herbert Xu herb...@gondor.apana.org.au wrote:
On Mon, Jan 09, 2012 at 10:27:40AM -0600, Kim Phillips wrote:
drivers/crypto/caam/ctrl.c: In function 'caam_probe':
drivers/crypto/caam/ctrl.c:49:6: warning: unused variable 'd'
[-Wunused-variable
On Mon, 27 Feb 2012 10:32:16 +0100
Andreas Westin andreas.wes...@stericsson.com wrote:
Andreas Westin (2):
crypto: ux500 - Add driver for CRYP/HASH hardware.
so I haven't been able to receive and review patch 1/2, presumably
due to mailing list size limits...resend in smaller pieces?
On Mon, 12 Mar 2012 14:44:27 +0200
horia.gea...@freescale.com wrote:
This patch replaces the back-half implementation of talitos crypto engine from
tasklet to NAPI. The decision to do this was based on improved performance
(around 7%).
A similiar patch (not posted yet) was tested for caam
On Wed, 14 Mar 2012 09:45:47 +0100
Andreas Westin andreas.wes...@stericsson.com wrote:
diff --git a/drivers/crypto/ux500/hash/hash_alg_p.h
b/drivers/crypto/ux500/hash/hash_alg_p.h
new file mode 100644
index 000..a44047a
--- /dev/null
+++ b/drivers/crypto/ux500/hash/hash_alg_p.h
@@
On Wed, 14 Mar 2012 09:45:46 +0100
Andreas Westin andreas.wes...@stericsson.com wrote:
+config CRYPTO_DEV_UX500
+ tristate Driver for ST-Ericsson UX500 crypto hardware acceleration
+ #depends on ARCH_U8500
guessing this should be either removed or modified to include u5500?
+config
On Wed, 14 Mar 2012 09:45:48 +0100
Andreas Westin andreas.wes...@stericsson.com wrote:
This adds the required platform data and calls to enable
the CRYP/HASH driver.
Acked-by: Linus Walleij linus.wall...@linaro.org
Signed-off-by: Andreas Westin andreas.wes...@stericsson.com
---
1 - 100 of 213 matches
Mail list logo
