Am Donnerstag, 19. Mai 2016, 15:15:15 schrieb Tudor Ambarus:
Hi Tudor,
as I am looking into the RSA countermeasures, I am wondering how much of
countermeasures are actually applied inside hardware implementations. Can you
please point me to or illustrate any countermeasures your implementation
Inline comments
From: Denis B
Sent: Wednesday, May 18, 2016 5:21 PM
To: Catalin Vasile
Cc: linux-crypto@vger.kernel.org
Subject: Re: IV generation in cryptographic driver in AEAD
Forgive my dumbness, but in:
.cra_type =
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Acked-by: Arnd Bergmann
Signed-off-by: Horia Geantă
---
include/asm-generic/io.h| 63 +
include/asm-generic/iomap.h
This will allow device drivers to consistently use io{read,write}XXbe
also for 64-bit accesses.
Acked-by: Catalin Marinas
Signed-off-by: Alex Porosanu
Signed-off-by: Horia Geantă
---
arch/arm64/include/asm/io.h | 4
Denis B wrote:
> My algs struct now looks like this:
>
> static struct crypto_alg pp_crypto_algs[] = {
> {
> .cra_name = "authenc(hmac(sha256),cbc(aes))",
> .cra_driver_name = "pp_crypto_cbc_hmac_sha256",
> .cra_priority = 1, /**TODO set to highest values
From: Megha Dey
Herbert wants the sha1-mb algorithm to have an async implementation:
https://lkml.org/lkml/2016/4/5/286.
Currently, sha1-mb uses an async interface for the outer algorithm
and a sync interface for the inner algorithm. This patch introduces
a async
From: Megha Dey
Currently there are several checkpatch warnings in the sha1_mb.c file:
'WARNING: line over 80 characters' in the sha1_mb.c file. Also, the
syntax of some multi-line comments are not correct. This patch fixes
these issues.
Signed-off-by: Megha Dey
On Wed, May 18, 2016 at 01:39:05PM +0300, Dan Carpenter wrote:
> This if statement is reversed so we end up either leaking or Oopsing on
> error.
>
> Fixes: dbe246209bc1 ('crypto: omap-sham - Use dma_request_chan() for
> requesting DMA channel')
> Signed-off-by: Dan Carpenter
My algs struct now looks like this:
static struct crypto_alg pp_crypto_algs[] = {
{
.cra_name = "authenc(hmac(sha256),cbc(aes))",
.cra_driver_name = "pp_crypto_cbc_hmac_sha256",
.cra_priority = 1, /**TODO set to highest values after
implementing encrypt decrypt functions */
v3:
-DT maintainers - please ack patch 8/8 "arm64: dts: ls1043a: add crypto node"
(to go into kernel 4.8 via crypto tree)
-Fixed typo in pdb.h: s/be32/__be32
-Appended Acks (from v2) into commit messages
-Tested that current patch set works on top of RSA support being added by
Tudor Ambarus:
This basically adds support for ls1043a platform.
Signed-off-by: Horia Geantă
---
drivers/crypto/caam/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig
index d2c2909a4020..ff54c42e6e51
This will allow device drivers to consistently use io{read,write}XX
also for 64-bit accesses.
Acked-by: Michael Ellerman
Signed-off-by: Horia Geantă
---
arch/powerpc/kernel/iomap.c | 24
1 file changed, 24 insertions(+)
diff
From: Cristian Stoica
The offset field is 13 bits wide; make sure we don't overwrite more than
that in the caam hardware scatter gather structure.
Signed-off-by: Cristian Stoica
Signed-off-by: Horia Geantă
---
LS1043A has a SEC v5.4 security engine.
For now don't add rtic or sec_mon subnodes, since these features
haven't been tested yet.
Signed-off-by: Horia Geantă
---
To go into kernel 4.8 via crypto tree.
arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 4 +++
Depends on:
[PATCH v2] crypto: rsa - return raw integers for the ASN.1 parser
Changes in v6:
- write descriptor PDB fields with inline append
- move Protocol Data Block (pdb) structures to pdb.h
- move setting of PDB fields in new functions
- unmap sec4_sg_dma on done callback
- remove redundant
Used in caam driver. Export the symbol since the caam driver
can be built as a module.
Signed-off-by: Tudor Ambarus
---
crypto/scatterwalk.c | 5 +++--
include/crypto/scatterwalk.h | 2 ++
2 files changed, 5 insertions(+), 2 deletions(-)
diff --git
This patch adds the function scatterwalk_sg_copychunks which writes
a chunk of data from a scatterwalk to another scatterwalk.
It will be used by caam driver to remove the leading zeros
for the output data of the RSA algorithm, after the computation completes.
Signed-off-by: Tudor Ambarus
While reviewing the addition of io{read,write}64be accessors, Arnd
-finds a potential problem:
"If an architecture overrides readq/writeq to have barriers but does
not override ioread64be/iowrite64be, this will lack the barriers and
behave differently from the little-endian version. I think the
On Wed, May 18, 2016 at 04:55:56PM +0200, Arnd Bergmann wrote:
> In some rare randconfig builds, we can end up with
> ASYMMETRIC_PUBLIC_KEY_SUBTYPE enabled but CRYPTO_AKCIPHER disabled,
> which fails to link because of the reference to crypto_alloc_akcipher:
>
> crypto/built-in.o: In function
Add RSA support to caam driver.
Coauthored-by: Yashpal Dutta
Signed-off-by: Tudor Ambarus
---
drivers/crypto/caam/Kconfig | 12 +
drivers/crypto/caam/Makefile | 4 +
drivers/crypto/caam/caampkc.c | 567
On 5/19/2016 3:15 PM, Tudor Ambarus wrote:
> Depends on:
> [PATCH v2] crypto: rsa - return raw integers for the ASN.1 parser
>
> Changes in v6:
> - write descriptor PDB fields with inline append
> - move Protocol Data Block (pdb) structures to pdb.h
> - move setting of PDB fields in new functions
On 5/19/2016 3:15 PM, Tudor Ambarus wrote:
> Add RSA support to caam driver.
>
> Coauthored-by: Yashpal Dutta
>
> Signed-off-by: Tudor Ambarus
Reviewed-by: Horia Geantă
Horia
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