Re: [RFC PATCH v2 18/32] kvm: svm: Use the hardware provided GPA instead of page walk

On Thu, Mar 02, 2017 at 10:16:05AM -0500, Brijesh Singh wrote: > From: Tom Lendacky > > When a guest causes a NPF which requires emulation, KVM sometimes walks > the guest page tables to translate the GVA to a GPA. This is unnecessary > most of the time on AMD hardware

Re: [PATCH] crypto: vmx: Remove dubiously licensed crypto code

On Wed, 29 Mar 2017 16:51:35 +0200 Greg Kroah-Hartman wrote: > On Wed, Mar 29, 2017 at 02:56:39PM +0200, Michal Suchanek wrote: > > While reviewing commit 11c6e16ee13a ("crypto: vmx - Adding asm > > subroutines for XTS") which adds the OpenSSL license header to > >

Re: [PATCH] crypto: vmx: Remove dubiously licensed crypto code

On Wed, Mar 29, 2017 at 02:56:39PM +0200, Michal Suchanek wrote: > While reviewing commit 11c6e16ee13a ("crypto: vmx - Adding asm > subroutines for XTS") which adds the OpenSSL license header to > drivers/crypto/vmx/aesp8-ppc.pl licensing of this driver came into > qestion. The whole license

Re: [RFC PATCH v2 18/32] kvm: svm: Use the hardware provided GPA instead of page walk

Hi Boris, On 03/29/2017 10:14 AM, Borislav Petkov wrote: On Thu, Mar 02, 2017 at 10:16:05AM -0500, Brijesh Singh wrote: From: Tom Lendacky When a guest causes a NPF which requires emulation, KVM sometimes walks the guest page tables to translate the GVA to a GPA.

Re: [RFC PATCH v2 16/32] x86: kvm: Provide support to create Guest and HV shared per-CPU variables

On 28/03/2017 20:39, Borislav Petkov wrote: >> 2) Since the encryption attributes works on PAGE_SIZE hence add some extra >> padding to 'struct kvm-steal-time' to make it PAGE_SIZE and then at runtime >> clear the encryption attribute of the full PAGE. The downside of this was >> now we need to

Re: [RFC TLS Offload Support 00/15] cover letter

Hello, On 29.03.2017 19:41, David Miller wrote: > From: Aviad Yehezkel > Date: Tue, 28 Mar 2017 16:26:17 +0300 > >> TLS Tx crypto offload is a new feature of network devices. It >> enables the kernel TLS socket to skip encryption and authentication >> operations on the

Re: [RFC TLS Offload Support 00/15] cover letter

From: Aviad Yehezkel Date: Tue, 28 Mar 2017 16:26:17 +0300 > TLS Tx crypto offload is a new feature of network devices. It > enables the kernel TLS socket to skip encryption and authentication > operations on the transmit side of the data path, delegating those > to the

Re: [PATCH v6 0/4] Broadcom SBA RAID support

On Wed, Mar 29, 2017 at 11:35:43AM +0530, Anup Patel wrote: > On Tue, Mar 21, 2017 at 2:48 PM, Vinod Koul wrote: > > On Tue, Mar 21, 2017 at 02:17:21PM +0530, Anup Patel wrote: > >> On Tue, Mar 21, 2017 at 2:00 PM, Vinod Koul wrote: > >> > On Mon, Mar

[PATCH 1/6] virtio: wrap find_vqs

We are going to add more parameters to find_vqs, let's wrap the call so we don't need to tweak all drivers every time. Signed-off-by: Michael S. Tsirkin --- drivers/block/virtio_blk.c | 3 +-- drivers/char/virtio_console.c | 6 +++---

Re: [PATCH] crypto: vmx: Remove dubiously licensed crypto code

On 03/29/2017 08:13 AM, Michal Suchánek wrote: > On Wed, 29 Mar 2017 16:51:35 +0200 > Greg Kroah-Hartman wrote: > >> On Wed, Mar 29, 2017 at 02:56:39PM +0200, Michal Suchanek wrote: >>> While reviewing commit 11c6e16ee13a ("crypto: vmx - Adding asm >>> subroutines for

[PATCH] crypto: vmx: Remove dubiously licensed crypto code

While reviewing commit 11c6e16ee13a ("crypto: vmx - Adding asm subroutines for XTS") which adds the OpenSSL license header to drivers/crypto/vmx/aesp8-ppc.pl licensing of this driver came into qestion. The whole license reads: # Licensed under the OpenSSL license (the "License"). You may not

Re: [PATCH] crypto: vmx: Remove dubiously licensed crypto code

On 03/29/2017 05:17 PM, Michael Ellerman wrote: > Michal Suchanek writes: > >> While reviewing commit 11c6e16ee13a ("crypto: vmx - Adding asm >> subroutines for XTS") which adds the OpenSSL license header to >> drivers/crypto/vmx/aesp8-ppc.pl licensing of this driver came into

RE: [PATCH 1/6] virtio: wrap find_vqs

> -Original Message- > From: Michael S. Tsirkin [mailto:m...@redhat.com] > Sent: Thursday, March 30, 2017 4:49 AM > Subject: [PATCH 1/6] virtio: wrap find_vqs > > We are going to add more parameters to find_vqs, let's wrap the call so > we don't need to tweak all drivers every time. > >

Re: [PATCH v6 0/4] Broadcom SBA RAID support

On Tue, Mar 21, 2017 at 2:48 PM, Vinod Koul wrote: > On Tue, Mar 21, 2017 at 02:17:21PM +0530, Anup Patel wrote: >> On Tue, Mar 21, 2017 at 2:00 PM, Vinod Koul wrote: >> > On Mon, Mar 06, 2017 at 03:13:24PM +0530, Anup Patel wrote: >> >> The Broadcom

[PATCH 6/7] arm64: marvell: dts: enable the crypto engine on the Armada 8040 DB

Enable the cryptographic engine available in the CP110 master on the Armada 8040 DB. Do not enable the one in the CP110 salve for now, as we do not support multiple cryptographic engines yet. Signed-off-by: Antoine Tenart ---

[PATCH 2/7] crypto: inside-secure: add SafeXcel EIP197 crypto engine driver

Add support for Inside Secure SafeXcel EIP197 cryptographic engine, which can be found on Marvell Armada 7k and 8k boards. This driver currently implements: ecb(aes), cbc(aes), sha1, sha224, sha256 and hmac(sah1) algorithms. Two firmwares are needed for this engine to work. Their are mostly used

[PATCH 0/7] arm64: marvell: add cryptographic engine support for 7k/8k

Hi all, This series adds support for the Inside Secure SafeXcel EIP197 cryptographic engine which can be found on Marvell Armada 7k and 8k boards. A new cryptographic engine driver is added, as well as the relevant device tree definition for the Armada 7040 DB and 8040 DB boards. This driver

[PATCH 1/7] Documentation/bindings: Document the SafeXel cryptographic engine driver

The Inside Secure Safexcel cryptographic engine is found on some Marvell SoCs (7k/8k). Document the bindings used by its driver. Signed-off-by: Antoine Tenart --- .../bindings/crypto/inside-secure-safexcel.txt | 27 ++ 1 file changed,

[PATCH 5/7] arm64: marvell: dts: enable the crypto engine on the Armada 7040 DB

Enable the cryptographic engine available in the CP110 master on the Armada 7040 DB. Signed-off-by: Antoine Tenart --- arch/arm64/boot/dts/marvell/armada-7040-db.dts | 4 1 file changed, 4 insertions(+) diff --git

[PATCH 7/7] arm64: defconfig: enable the Safexcel crypto engine as a module

The Safexcel EIP197 cryptographic engine is used on some Marvell SoCs, such as Armada 7040 and Armada 8040. Enable this driver as a module in the ARM64 defconfig. Signed-off-by: Antoine Tenart --- arch/arm64/configs/defconfig | 1 + 1 file changed, 1

[PATCH 4/7] arm64: marvell: dts: add crypto engine description for 7k/8k

Add the description of the crypto engine hardware block for the Marvell Armada 7k and Armada 8k processors; for both the CP110 slave and master. Signed-off-by: Antoine Tenart --- arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi | 15 +++

[PATCH 3/7] MAINTAINERS: add a maintainer for the Inside Secure crypto driver

A new cryptographic engine driver was added in drivers/crypto/inside-secure. Add myself as a maintainer for this driver. Signed-off-by: Antoine Tenart --- MAINTAINERS | 6 ++ 1 file changed, 6 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index