Hi,
On Mon, Jun 26, 2017 at 2:20 PM, Corentin Labbe
wrote:
> The Security System have a PRNG, this patch add support for it via
> crypto_rng.
s,have,has,
s,add,adds,
>
> Signed-off-by: Corentin Labbe
> ---
>
> Changes since v3 (note: the
On 06/25/17 02:42 AM, Levin, Alexander (Sasha Levin) wrote:
> On Wed, Jun 14, 2017 at 11:37:14AM -0700, Dave Watson wrote:
> >Add the infrustructure for attaching Upper Layer Protocols (ULPs) over TCP
> >sockets. Based on a similar infrastructure in tcp_cong. The idea is that any
> >ULP can add
The Security System have a PRNG, this patch add support for it via
crypto_rng.
Signed-off-by: Corentin Labbe
---
Changes since v3 (note: the v3 miss changes and version tag sorry)
- Replaced all len values with bits / BITS_PER_LONG or BITS_PER_BYTE
Changes since v2
On Mon, Jun 26, 2017 at 07:30:19AM -0700, Dave Watson wrote:
>On 06/25/17 02:42 AM, Levin, Alexander (Sasha Levin) wrote:
>> On Wed, Jun 14, 2017 at 11:37:14AM -0700, Dave Watson wrote:
>> >Add the infrustructure for attaching Upper Layer Protocols (ULPs) over TCP
>> >sockets. Based on a similar
Hi Jyri,
Thanks for the ack. However, I'm reworking this patch set to use the
include/linux/io-64-nonatomic* headers which will explicitly devolve
into two 32-bit transfers. It's not clear whether this is appropriate
for the tilcdc driver as it was never setup to use 32-bit transfers
(unlike the
Am Montag, 26. Juni 2017, 03:23:09 CEST schrieb Nicholas A. Bellinger:
Hi Nicholas,
> Hi Stephan, Lee & Jason,
>
> (Adding target-devel CC')
>
> Apologies for coming late to the discussion. Comments below.
>
> On Sun, 2017-06-18 at 10:04 +0200, Stephan Müller wrote:
> > Am Samstag, 17. Juni
On 6/23/2017 11:06 AM, Brijesh Singh wrote:
Update pci and platform files to use devres interface to allocate the PCI
and iomap resources. Also add helper functions to consolicate module init,
exit and power mangagement code duplication.
Signed-off-by: Brijesh Singh
---
On 6/26/2017 2:43 PM, Arnd Bergmann wrote:
This hardcodes the behavior of include/linux/io-64-nonatomic-hi-lo.h, which
I find rather confusing, as only about one in five drivers wants this
behavior.
I'd suggest you don't add it in lib/iomap.c at all for 32-bit architectures,
but rather use the
From: Colin Ian King
trivial fix to spelling mistake in dev_info message
Signed-off-by: Colin Ian King
---
drivers/crypto/qat/qat_common/adf_aer.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
> +u64 ioread64(void __iomem *addr)
> +{
> + u64 low, high;
> +
> + low = ioread32(addr);
> + high = ioread32(addr + sizeof(u32));
> + return low | (high << 32);
> +}
> +u64 ioread64be(void __iomem *addr)
> +{
> + u64 low, high;
> +
> + low = ioread32be(addr +
On 06/26/2017 04:17 PM, Tom Lendacky wrote:
+const struct ccp_vdata ccpv3_platform = {
+.version = CCP_VERSION(3, 0),
+.setup = NULL,
+.perform = _actions,
+.bar = 2,
Platform devices don't use BARs so should probably delete this (unless
you want to make it more generic and
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On 06/22/17 19:48, Logan Gunthorpe wrote:
> Now that we can expect iowrite64 to always exist the hack is no longer
> necessary so we just call iowrite64 directly.
>
> Signed-off-by: Logan Gunthorpe
> Cc: Jyri Sarha
> Cc: Tomi Valkeinen
On 06/22/17 19:48, Logan Gunthorpe wrote:
> This is a prep patch for adding a universal iowrite64.
>
> The patch is to prevent compiler warnings when we add iowrite64 that
> would occur because there is an unnecessary volatile in this driver.
>
> Signed-off-by: Logan Gunthorpe
On Mon, Jun 26, 2017 at 07:40:58AM +0200, David Gstir wrote:
>
> So, am I correct in assuming that it is required for all modes including AEAD
> modes like GCM?
> In that case I'll include a fix for the CAAM GCM mode too.
It's only required for skcihper. As we do not do chunking/streaming
with
Thanks Arnd,
added to the dma-mapping tree.
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