On 06/15/2016 06:52 AM, Steffen Klassert wrote:
Hi Jason.
On Tue, Jun 14, 2016 at 11:00:54PM +0200, Jason A. Donenfeld wrote:
Hi Steffen & Folks,
I submit a job to padata_do_parallel(). When the parallel() function
triggers, I do some things, and then call padata_do_serial(). Finally
the
On 06/24/2016 07:01 AM, Stephan Mueller wrote:
Am Freitag, 24. Juni 2016, 17:24:02 schrieb Harsh Jain:
Hi Harsh,
379 * The memory structure for cipher operation has the following
380 * structure:
381 * AEAD encryption input: assoc data || plaintext
382
manages the version-specific data.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-crypto-aes.c | 12 ++-
drivers/crypto/ccp/ccp-crypto-sha.c |9 +++-
drivers/crypto/ccp/ccp-dev.c| 27
drivers/crypto/ccp/ccp
-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile |2
drivers/crypto/ccp/ccp-dev-v3.c | 534 +
drivers/crypto/ccp/ccp-dev.c | 306 +
drivers/crypto/ccp/ccp-dev.h | 138 +-
drivers/cryp
ons through a
struct of function pointers
This patch series is based on cryptodev-2.6
---
Gary R Hook (4):
crypto: ccp - Remove check for x86 family and model
crypto: ccp - Support for multiple CCPs
crypto: ccp - CCP versioning support
crypto: ccp - Add abstraction for dev
Each x86 SoC will make use of a unique PCI ID for the CCP
device so it is not necessary to check for the CPU family
and model.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.c | 47 ++
1 file changed, 11 insertions(
Enable management of >1 CCPs in a system. Each device will
get a unique identifier, as well as uniquely named
resources. Treat each CCP as an orthogonal unit and register
resources individually.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.c
This patch fixes a coccinelle warning about reusing a flags
variable in nested lock acquisition.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev.c b/d
This patch simplifies an unneeded read-write lock.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.c |6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev.c b/drivers/crypto/ccp/ccp-dev.c
index 336e5b7..4
On 03/11/2016 08:22 PM, Herbert Xu wrote:
On Fri, Mar 11, 2016 at 10:40:11AM -0600, Gary R Hook wrote:
@@ -128,14 +128,14 @@ static struct ccp_device *ccp_get_device(void)
*/
read_lock_irqsave(_unit_lock, flags);
if (!list_empty(_units
On 03/21/2016 11:43 AM, Tom Lendacky wrote:
Gary will be taking over future development of the CCP driver, so add
him as a co-maintainer of the driver.
Signed-off-by: Tom Lendacky
---
MAINTAINERS |1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS
On 04/04/2016 04:47 PM, Tom Lendacky wrote:
On 04/04/2016 03:50 PM, Gary R Hook wrote:
The CCP has the ability to provide DMA services to the
kernel using pass-through mode of the device. Register
these services as general purpose DMA channels.
---
You're missing a cc: to David Miller
/drivers/crypto/ccp/ccp-dmaengine.c
new file mode 100644
index 000..94f77b0
--- /dev/null
+++ b/drivers/crypto/ccp/ccp-dmaengine.c
@@ -0,0 +1,727 @@
+/*
+ * AMD Cryptographic Coprocessor (CCP) driver
+ *
+ * Copyright (C) 2016 Advanced Micro Devices, Inc.
+ *
+ * Author: Gary R Hook <
The CCP has the ability to provide DMA services to the
kernel using pass-through mode of the device. Register
these services as general purpose DMA channels.
---
drivers/crypto/ccp/Kconfig |1
drivers/crypto/ccp/Makefile|6
drivers/crypto/ccp/ccp-dev-v3.c| 13 +
On 05/20/2016 06:31 PM, Herbert Xu wrote:
On Fri, May 20, 2016 at 10:50:38AM -0500, Gary R Hook wrote:
Why is (or should) setting geniv (be) required?
crypto_givcipher_default() appears to call crypto_default_geniv() if
the geniv member
is NULL. That function returns "eseqiv" o
On 05/19/2016 11:19 PM, Herbert Xu wrote:
Denis B wrote:
My algs struct now looks like this:
static struct crypto_alg pp_crypto_algs[] = {
{
.cra_name = "authenc(hmac(sha256),cbc(aes))",
.cra_driver_name = "pp_crypto_cbc_hmac_sha256",
.cra_priority
I am working on hooking up RSA functionality to the akcipher API. It appears
that no other code, to date, uses this API. Can anyone confirm or deny that
conclusion?
I have questions about invoking akcipher transform functions, and can
find no
information about specifics that vex me. If there is
Thanks so much.
There are exactly 3 references to that symbol (in my freshly pulled copy
of cryptodev-2.6).
testmgr.c precipitates my questions, and public_key.c doesn't actually
provide any content
in the source input buffer, neither modulus nor plaintext. Thus, it
doesn't clarify things
Ah enlightenment can be such an uncomfortable thing...
On 05/17/2016 05:56 PM, Stephan Mueller wrote:
Am Dienstag, 17. Mai 2016, 17:46:44 schrieb Gary R Hook:
Hi Gary,
Thanks so much.
There are exactly 3 references to that symbol (in my freshly pulled copy
of cryptodev-2.6).
testmgr.c
On 05/01/2016 06:52 AM, Julia Lawall wrote:
The ccp_actions structure is never modified, so declare it as const.
Done with the help of Coccinelle.
Signed-off-by: Julia Lawall
Acked-by: Gary Hook
---
drivers/crypto/ccp/ccp-dev-v3.c |2 +-
/unregister calls are properly ordered
- Verified all changed files are listed in the diffstat
- Undo some superfluous changes
- Added a cc:
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Kconfig |1
drivers/crypto/ccp/Makefile|6
drivers/crypto/c
A DMA_ENGINE requires DMADEVICES in Kconfig
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Kconfig |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/ccp/Kconfig b/drivers/crypto/ccp/Kconfig
index 79cabfb..2238f77 100644
--- a/drivers/crypto/ccp/K
On 04/20/2016 05:35 AM, kbuild test robot wrote:
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
head: 21ec757d2dd8650f978d27ad53cb1fcca8bb5e2b
commit: 58ea8abf490415c390e0cc671e875510c9b66318 [56/59] crypto: ccp - Register
the CCP as a DMA resource
will be added to the actions
structure.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c | 32 ++---
drivers/crypto/ccp/ccp-dev.c|7 +
drivers/crypto/ccp/ccp-dev.h| 43 +++---
drivers/crypto/ccp/ccp-ops.c
Device-specific values for the BAR and offset should be found
in the version data structure.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c |3 +++
drivers/crypto/ccp/ccp-dev.h|3 +++
drivers/crypto/ccp/ccp-pci.c| 15 +++
3
The following series updates the CCP driver to support
both current and new cryptographic coprocessor models.
Refactor code to further separate device-specific code
from driver logic, then add equivalent support for the
new device version.
---
Gary R Hook (10):
crypto: ccp - Abstract PCI
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c | 13 -
drivers/crypto/ccp/ccp-dev-v5.c |7 +++
drivers/crypto/ccp/ccp-dev.c| 23 +++
drivers/crypto/ccp/ccp-dev.h|2 ++
4 files changed, 36 insertions
Adhere to the cryptodev comment convention.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.h | 24
1 file changed, 8 insertions(+), 16 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h
index bd
Make the RNG support code common (where possible) in
preparation for adding a v5 device.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c | 51 ---
drivers/crypto/ccp/ccp-dev.c| 28 +
d
Enable equivalent function on a v5 CCP. Add support for a
version 5 CCP which enables AES/XTS/SHA services. Also,
more work on the data structures to virtualize
functionality.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile |1
drivers/crypto/c
is managed differently.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c | 52 +++
drivers/crypto/ccp/ccp-dev.h| 74 +++
drivers/crypto/ccp/ccp-ops.c| 52 ++-
3
Please ignore this patch.
[PATCH] crypto: CCP - build error: label 'e_hwrng' undefined
Gary R Hook Wed, 10 Aug 2016 12:27:28 -0700
Fix goto target for when registration fails
Reported-by: kbuild test robot <fengguang...@intel.com>
Signed-off-by: Gary R Hook <gary.h...@amd.com>
A patch for this will be submitted shortly.
On 08/10/2016 10:30 AM, kbuild test robot wrote:
tree:
https://git.kernel.org/pub/scm/linux/kernel/git/herbert/cryptodev-2.6.git master
head: 47856204146ba6fd0f198dbb23c4ed7ad1c3fd99
commit: 99d90b2ebd8b327c0c496798db99009b30c70945 [17/45]
Fix goto target for when registration fails
Reported-by: kbuild test robot <fengguang...@intel.com>
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5
Q: Is there a policy (de facto or otherwise) on adding tests to testmgr.h?
Two cases:
1) Tests from the NIST document(s) on various ciphers and hashes wherein
we add to an existing set of tests? For example, 3DES ECB mode, or AES
GCM? I suppose this question is really about, "how much is
On 08/09/2016 09:10 AM, Tapas Sarangi wrote:
Ps : I could not send any attachment, is it possible to send attachment to
this mailing list ?
Pretty sure that's frowned upon.
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the body of a message to
Ensure that the size field is correctly populated for
all AES modes.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c |3 +--
drivers/crypto/ccp/ccp-dev.h|1 +
drivers/crypto/ccp/ccp-ops.c|8
3 files changed, 10 insertions
On 01/27/2017 03:28 PM, Gary R Hook wrote:
An I/O page fault occurs when the IOMMU is enabled on a
system that supports the v5 CCP. DMA operations use a
Request ID value that does not match what is expected by
the IOMMU, resulting in the I/O page fault. Setting the
Request ID value to 0
On 01/27/2017 05:09 PM, Gary R Hook wrote:
Eliminate a double-add by creating a new list to manage
command descriptors when created; move the descriptor to
the pending list when the command is submitted.
Herbert,
Another patch that could use some 4.10 love. Possible?
Thanks,
Gary
Signed
The following series implements:
- Move verbose init messages to debug mode
- Set the start-of-cmmand bit for all SHA operations
- Update the queue pointers in the event of an error
- Simplify buffer management and eliminate an unused option
---
Gary R Hook (4):
crypto: ccp - Change
The reverse-get/set functions can be simplified by
eliminating unused code.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-ops.c | 142 +-
1 file changed, 56 insertions(+), 86 deletions(-)
diff --git a/drivers/crypto/c
The CCP initialization messages only need to be sent to
syslog in debug mode.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/c
Move the command queue tail pointer when an error is
detected. Always return the error.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/d
The start-of-command bit should be set for every sha
operation.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-ops.c |1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/crypto/ccp/ccp-ops.c b/drivers/crypto/ccp/ccp-ops.c
index 50fae44..1a27af3
It turns out that this change will negatively impact performance. Please
ignore.
I will submit a V2 patch set.
On 01/30/2017 08:28 AM, Gary R Hook wrote:
The start-of-command bit should be set for every sha
operation.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/c
An I/O page fault occurs when the IOMMU is enabled on a
system that supports the v5 CCP. DMA operations use a
Request ID value that does not match what is expected by
the IOMMU, resulting in the I/O page fault. Setting the
Request ID value to 0 corrects this issue.
Signed-off-by: Gary R Hook
Eliminate a double-add by creating a new list to manage
command descriptors when created; move the descriptor to
the pending list when the command is submitted. This
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.h |1 +
drivers/crypto/c
Move the command queue tail pointer when an error is
detected. Always return the error.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/d
The CCP initialization messages only need to be sent to
syslog in debug mode.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c |5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/c
The reverse-get/set functions can be simplified by
eliminating unused code.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-ops.c | 142 +-
1 file changed, 56 insertions(+), 86 deletions(-)
diff --git a/drivers/crypto/c
The following series implements...
- Move verbose init messages to debug mode
- Update the queue pointers in the event of an error
- Simply buffer management and eliminate an unused option
---
Gary R Hook (3):
crypto: ccp - Change mode for detailed CCP init messages
crypto: ccp
Wire up support for Triple DES in ECB mode.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile |1
drivers/crypto/ccp/ccp-crypto-des3.c | 254 ++
drivers/crypto/ccp/ccp-crypto-main.c | 10 +
drivers/crypto/c
A version 5 device provides the primitive commands
required for AES GCM. This patch adds support for
en/decryption.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile|2
drivers/crypto/ccp/ccp-crypto-aes-galois.c
The following series implements new function in a version 5
coprocessor. New features are:
- Support for SHA-2 384-bit and 512-bit hashing
- Support for AES GCM encryption
- Support for 3DES encryption
---
Gary R Hook (3):
crypto: ccp - Add SHA-2 384-/512-/bit support
crypto: ccp
Incorporate 384-bit and 512-bit hashing for a version 5 CCP
device
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-crypto-sha.c | 22 +++
drivers/crypto/ccp/ccp-crypto.h |8 ++--
drivers/crypto/ccp/ccp-ops.c
Fix a build break by referencing the proper structure member
name when invoking functions. Remove unneeded akcipher
structure.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile |1 -
drivers/crypto/ccp/ccp-crypto-main.c |8
drivers/
On 02/15/2017 03:55 PM, Gary R Hook wrote:
The following series implements new function in a version 5
coprocessor. New features are:
- Support for SHA-2 384-bit and 512-bit hashing
- Support for AES GCM encryption
- Support for 3DES encryption
Please ignore. This patchset introduces build
On 02/27/2017 11:10 AM, Gary R Hook wrote:
Fix a build break by referencing the proper structure member
name when invoking functions. Remove unneeded akcipher
structure.
Please ignore. I was mistakenly under the impression that the referenced
patchset had been accepted.
Signed-off-by: Gary
Add human readable strings to log messages about CCP errors
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c |3 ++
drivers/crypto/ccp/ccp-dev-v5.c |3 ++
drivers/crypto/ccp/ccp-dev.c| 53 +++
drivers/cryp
Add human-readable strings to log messages about CCP errors
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c |3 ++
drivers/crypto/ccp/ccp-dev-v5.c |3 ++
drivers/crypto/ccp/ccp-dev.c| 53 +++
drivers/cryp
V2: point a goto statement at the correct label
The following series is for miscellaneous small changes.
---
Gary R Hook (2):
crypto: ccp - clean up data structure
crypto: ccp - Make syslog errors human-readable
drivers/crypto/ccp/ccp-dev-v3.c |5 +++-
drivers/crypto/ccp/ccp
Change names of data structure instances; add const
keyword where appropriate.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c |2 +-
drivers/crypto/ccp/ccp-dev-v5.c |7 +--
drivers/crypto/ccp/ccp-dev.h|6 +++---
drivers/crypto/ccp/ccp
et(desc, 0, sizeof(*desc));
-
dma_async_tx_descriptor_init(>tx_desc, >dma_chan);
desc->tx_desc.flags = flags;
desc->tx_desc.tx_submit = ccp_tx_submit;
Acked-by: Gary R Hook <gary.h...@amd.com>
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To unsubscribe from this list: send the line "unsubscribe l
name);
- if (!dma_cmd_cache_name)
+ if (!dma_desc_cache_name)
return -ENOMEM;
ccp->dma_desc_cache = kmem_cache_create(dma_desc_cache_name,
sizeof(struct ccp_dma_desc),
Acked-by: Gary R Hook <gary.h...@amd
Change names of data structure instances. Add const
keyword where appropriate. Add error handling path.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c |2 +-
drivers/crypto/ccp/ccp-dev-v5.c |9 ++---
drivers/crypto/ccp/ccp-dev.h
Bit fields are not sensitive to endianness, so use
a transparent standard data type
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.h | 42 +-
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/
uawei.com>
Excellent. Thank you.
Acked-by: Gary R Hook <gary.h...@amd.com>
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On 10/20/2016 02:20 PM, Paul Bolle wrote:
The abbreviation for Cryptographic Coprocessor is "CCP".
Signed-off-by: Paul Bolle <pebo...@tiscali.nl>
Acked-by: Gary R Hook <gary.h...@amd.com>
---
include/linux/ccp.h | 6 +++---
1 file changed, 3 insertions(+), 3 de
Fix a few problems revealed by testing: verify consistent
units, especially in public slot allocation. Percolate
some common initialization code up to a common routine.
Add some comments.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v3.c |4
d
Bit fields are not sensitive to endianness, so use
a transparent standard data type
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.h | 42 +-
1 file changed, 21 insertions(+), 21 deletions(-)
diff --git a/drivers/
Clean up patch for an unneeded structure member.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.h |1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h
index 0d996fe..b96d788 100644
--- a/drivers/
On 11/16/2016 03:01 AM, Herbert Xu wrote:
On Tue, Nov 15, 2016 at 03:41:25PM -0600, Gary R Hook wrote:
On 11/13/2016 03:49 AM, Herbert Xu wrote:
On Tue, Nov 01, 2016 at 02:05:05PM -0500, Gary R Hook wrote:
The exponent size in the ccp_op structure is in bits. A v5
CCP requires the exponent
On 11/17/2016 07:14 AM, Herbert Xu wrote:
On Wed, Nov 16, 2016 at 11:25:19AM -0600, Gary R Hook wrote:
The kernel crypto layer does not yet support RSA, true. However, we
designed the ccp.ko layer to be available to anyone that wants to use
it. The underlying module currently has differing
On 11/13/2016 03:39 AM, Herbert Xu wrote:
On Fri, Nov 04, 2016 at 11:04:32AM -0500, Gary R Hook wrote:
+ ctx->u.rsa.pkey.e = mpi_read_raw_data(raw_key.e, raw_key.e_sz);
+ if (!ctx->u.rsa.pkey.e)
+ goto e_ret;
+ ctx->u.rsa.e_buf = mpi_get_buffer(ctx->
On 11/13/2016 03:49 AM, Herbert Xu wrote:
On Tue, Nov 01, 2016 at 02:05:05PM -0500, Gary R Hook wrote:
The exponent size in the ccp_op structure is in bits. A v5
CCP requires the exponent size to be in bytes, so convert
the size from bits to bytes when populating the descriptor.
The current
store in the LSB. Populate the descriptor with
the LSB location (address).
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/ccp/c
Take advantage of the increased RSA key size support in
the v5 CCP.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-crypto-rsa.c |5 ++
drivers/crypto/ccp/ccp-crypto.h |1
drivers/crypto/ccp/ccp-dev-v3.c |1
drivers/crypto/ccp/ccp-de
A version 5 device provides the primitive commands
required for AES GCM. This patch adds support for
en/decryption.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile|1
drivers/crypto/ccp/ccp-crypto-aes-galois.c
Wire up the CCP as an RSA cipher provider.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile |1
drivers/crypto/ccp/ccp-crypto-main.c | 19 ++
drivers/crypto/ccp/ccp-crypto-rsa.c | 294 ++
drivers/crypto/c
Incorporate 384-bit and 512-bit hashing for a version 5 CCP
device
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-crypto-sha.c | 22 +++
drivers/crypto/ccp/ccp-crypto.h |8 ++--
drivers/crypto/ccp/ccp-ops.c
The reverse-get/set functions can be simplified by
eliminating unused code.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-ops.c | 142 +-
1 file changed, 56 insertions(+), 86 deletions(-)
diff --git a/drivers/crypto/c
Move the command queue tail pointer when an error is
detected. Always return the error.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/d
store in the LSB. Populate the descriptor with
the LSB location (address).
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/ccp/c
The following series implements new function for a version
5 CCP: Support for SHA-2, wiring of RSA using the updated
framework, additional RSA features for new devices, AES GCM
mode, and Triple-DES in ECB and CBC mode.
---
Gary R Hook (9):
crypto: ccp - Fix handling of RSA exponent on a v5
Wire up support for Triple DES in ECB mode.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile |1
drivers/crypto/ccp/ccp-crypto-des3.c | 254 ++
drivers/crypto/ccp/ccp-crypto-main.c | 10 +
drivers/crypto/c
Move the command queue tail pointer when an error is
detected. Always return the error.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev-v5.c |7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/d
Take into account device implementation differences for
RSA.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-crypto-rsa.c | 14 +++--
drivers/crypto/ccp/ccp-crypto.h |3 -
drivers/crypto/ccp/ccp-dev.h|2 -
drivers/crypto/ccp/ccp-ops.c
Wire up the v3 CCP as a cipher provider.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile |1
drivers/crypto/ccp/ccp-crypto-main.c | 15 ++
drivers/crypto/ccp/ccp-crypto-rsa.c | 258 ++
drivers/crypto/c
Incorporate 384-bit and 512-bit hashing for a version 5 CCP
device
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-crypto-sha.c | 22 +++
drivers/crypto/ccp/ccp-crypto.h |9 +++--
drivers/crypto/ccp/ccp-ops.c
The following series implements new function for a version 5
CCP: Support for SHA-2, wiring of RSA using the updated
framework, AES GCM mode, and Triple-DES in ECB mode.
---
Gary R Hook (6):
crypto: ccp - Add SHA-2 support
crypto: ccp - Remove unneeded sign-extension support
A version 5 device provides the primitive commands
required for AES GCM. This patch adds support for
en/decryption.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile|1
drivers/crypto/ccp/ccp-crypto-aes-galois.c
The reverse-get/set functions can be simplified by
eliminating unused code.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-ops.c | 145 +-
1 file changed, 59 insertions(+), 86 deletions(-)
diff --git a/drivers/crypto/c
Wire up support for Triple DES in ECB mode.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/Makefile |1
drivers/crypto/ccp/ccp-crypto-des3.c | 254 ++
drivers/crypto/ccp/ccp-crypto-main.c | 10 +
drivers/crypto/c
On 10/13/2016 01:25 PM, Stephan Mueller wrote:
Am Donnerstag, 13. Oktober 2016, 09:53:09 CEST schrieb Gary R Hook:
Hi Gary,
Wire up the v3 CCP as a cipher provider.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
...snip...
+}
+
+static void ccp_free_mpi_key(struct ccp_rsa_ke
The lsb field uses a value of -1 to indicate that it
is unassigned. Therefore type must be a signed int.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/crypto/ccp/ccp-dev.h |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/crypto/ccp/ccp-dev.h b/d
Am I the only person that can't clone/pull from kernel.org? Been getting
handshake errors this week, but other sites (e.g. libvirt.org) seem to
be working fine.
I thought I'd ask first... perhaps it's just me/my employer?
--
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Move RSA support of general use into internal/rsa.h.
This allows reuse of, e.g. RSA MPI keys and support
functions.
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
crypto/rsa.c | 16
include/crypto/internal/rsa.h | 17 +
2 files c
at a device level, reserve the "other" (secondary)
CCP channels as private.
Add a module parameter that allows for override, to be
applied to all channels on all devices.
CC: <sta...@vger.kernel.org> # 4.10.x-
Signed-off-by: Gary R Hook <gary.h...@amd.com>
---
drivers/c
Ack. Didn't reply all Sorry, Arnd.
There was a krobot warning about this and I submitted a patch just now.
(I thought) my mistake was (in this function) not handling the structure
elements in the same manner as other functions. My patch rectifies that.
On 03/28/2017 04:58 AM, Arnd
On 03/28/2017 04:58 AM, Arnd Bergmann wrote:> The newly added AES GCM
implementation uses one of the largest stack frames
in the kernel, around 1KB on normal 64-bit kernels, and 1.6KB when
CONFIG_KASAN
is enabled:
drivers/crypto/ccp/ccp-ops.c: In function 'ccp_run_aes_gcm_cmd':
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