Re: authencesn compatibility problemn between software crypto and talitos driver

On 3/11/2013 9:15 AM, Steffen Klassert wrote: Ccing Horia Geanta, he did the esn implementation for talitos. On Fri, Mar 08, 2013 at 03:27:48PM +, Chaoxing Lin wrote: 1. Can any one point me which RFC describe how exactly authencesn should work? The ESN algorithm is described in RFC

Re: authencesn compatibility problemn between software crypto and talitos driver

On 3/12/2013 10:57 PM, Chaoxing Lin wrote: Seems that somehow I got confused, considering the one/single-pass over data description the same as combined mode algorithm. I will post a fix or revert the patch if HW does not allow the correct behaviour. Horia, Do you plan to fix talitos

Re: [PATCH] Revert crypto: caam - add IPsec ESN support

On 3/20/2013 4:15 PM, Horia Geanta wrote: This reverts commit 891104ed008e8646c7860fe5bc70b0aac55dcc6c (upstream: 891104ed008e8646c7860fe5bc70b0aac55dcc6c). This line is not needed. Will resend this with commit message updated. Sorry for the noise. -- To unsubscribe from this list: send the

Re: [PATCHv1] crypto: caam - fix job ring cleanup code

On 4/15/2013 7:25 AM, Vakul Garg wrote: The job ring init function creates a platform device for each job ring. While the job ring is shutdown, e.g. while caam module removal, its platform device was not being removed. This leads to failure while reinsertion and then removal of caam module

Re: [PATCH] crypto: remove double execution of the same test suite

On 7/18/2013 6:57 PM, Cristian Stoica wrote: This patch removes redundant execution of the same test suite in cases where alg and driver variables are the same (e.g. when alg_test is called from tcrypt_test) Signed-off-by: Cristian Stoica cristian.sto...@freescale.com Reviewed-by: Horia

Re: [PATCH] drivers/crypto:caam:Map src buffer before access in CAAM driver

On 9/11/2013 9:02 AM, yashpal.du...@freescale.com wrote: From: Yashpal Dutta yashpal.du...@freescale.com KMap the buffers before copying trailing bytes during hmac in CAAM driver into a session temporary buffer. This is required if pinned buffer from user-space is send to CAAM driver during

Re: [PATCH v2] crypto: caam - map src buffer before access

On 9/11/2013 10:24 PM, Yashpal Dutta wrote: KMap the buffers before copying trailing bytes during hmac into a session temporary buffer. This is required if pinned buffer from user-space is send during hmac and is safe even if hmac request is generated from within kernel. Signed-off-by: Yashpal

Asymmetric cryptography HW offloading

Hi, CAAM crypto engine (drivers/crypto/caam/*) is capable of asymmetric operations, like: modular exponentiation, RSA sign/verify/encrypt/decrypt, (EC)DSA sign etc. I would appreciate some design guidelines on how to harness these capabilities, for crypto engines in general. 1. In-kernel

Re: [PATCH v4] crypto: caam - map src buffer before access

On 9/23/2013 9:51 PM, Kim Phillips wrote: On Sat, 21 Sep 2013 14:26:35 +0530 Yashpal Dutta yashpal.du...@freescale.com wrote: KMap the buffers before copying trailing bytes during hmac into a session temporary buffer. This is required if pinned buffer from user-space is send during hmac and is

Re: Asymmetric cryptography HW offloading

On 9/23/2013 4:28 PM, Nikos Mavrogiannopoulos wrote: On 09/23/2013 02:31 PM, Horia Geantă wrote: Hi, CAAM crypto engine (drivers/crypto/caam/*) is capable of asymmetric operations, like: modular exponentiation, RSA sign/verify/encrypt/decrypt, (EC)DSA sign etc. I would appreciate some design

Re: [PATCH 2/2] crypto: testmgr - make test_aead also test 'dst != src' code paths

On 9/21/2012 10:26 AM, Jussi Kivilinna wrote: Currrently test_aead uses same buffer for destination and source. However in any places, 'dst != src' take different path than 'dst == src' case. Therefore make test_aead also run tests with destination buffer being different than source buffer.

Re: [PATCH] crypto: caam - fix ERA retrieval function

On 2/6/2014 10:27 AM, Alex Porosanu wrote: SEC ERA has to be retrieved by reading the fsl,sec-era property from the device tree. This property is updated/filled in by u-boot. Change-Id: Ie1620354a0cf2cac5cd2c72bd5f2449f55858378 Change-Id should be dropped. Signed-off-by: Alex Porosanu

Re: [PATCH] crypto: caam - Fix job ring discovery in controller driver

On 1/24/2014 11:03 AM, Nitesh Lal wrote: The SEC Controller driver creates platform devices for it's child job ring nodes. Currently the driver uses for_each_compatible routine which traverses the whole device tree to create the job rings for the platform device. The patch changes this to

Re: [PATCH cryptodev 1/4] crypto: caam - remove error propagation handling

On 3/17/2014 8:23 PM, Marek Vasut wrote: On Friday, March 14, 2014 at 04:46:49 PM, Horia Geanta wrote: Commit 61bb86bba169507a5f223b94b9176c32c84b4721 (crypto: caam - set descriptor sharing type to SERIAL) changed the descriptor sharing mode from SHARE_WAIT to SHARE_SERIAL. All descriptor

Re: [PATCH cryptodev 1/4] crypto: caam - remove error propagation handling

On 3/19/2014 9:01 PM, Marek Vasut wrote: On Wednesday, March 19, 2014 at 06:25:48 PM, Horia Geantă wrote: On 3/17/2014 8:23 PM, Marek Vasut wrote: On Friday, March 14, 2014 at 04:46:49 PM, Horia Geanta wrote: Commit 61bb86bba169507a5f223b94b9176c32c84b4721 (crypto: caam - set descriptor

Re: [PATCH v3] crypto: caam - power management support for caam job-ring

On 3/22/2014 6:24 PM, Ben Hutchings wrote: On Fri, 2014-03-21 at 00:35 +0545, Yashpal Dutta wrote: Job ring is suspended gracefully and resume afresh. Both Sleep (where device will remain powered-on) and Deep-sleep (where device will be powered-down are handled gracefully. Persistance sessions

Re: [PATCH crypto 2/2] crypto: caam - add allocation failure handling in SPRINTFCAT macro

On 4/23/2014 2:56 AM, Marek Vasut wrote: On Friday, April 18, 2014 at 12:01:42 PM, Horia Geanta wrote: GFP_ATOMIC memory allocation could fail. In this case, avoid NULL pointer dereference and notify user. Cc: sta...@vger.kernel.org # 3.2+ If I recall correctly, you need to get the patch

Re: [PATCH 0/9] crypto: caam - Add RTA descriptor creation library

On 7/19/2014 1:13 AM, Kim Phillips wrote: On Fri, 18 Jul 2014 19:37:17 +0300 Horia Geanta horia.gea...@freescale.com wrote: This patch set adds Run Time Assembler (RTA) SEC descriptor library. The main reason of replacing incumbent inline append is to have a single code base both for user

Re: [PATCH 00/10] CAAM - DMA API fixes

On 7/19/2014 2:04 AM, Kim Phillips wrote: On Fri, 11 Jul 2014 15:34:45 +0300 Horia Geanta horia.gea...@freescale.com wrote: Hi Horia, Enabling DMA-API debugging reveals quite a lot of problems in CAAM module. Patches below fix them - tested on P3041DS QorIQ platform. Please apply. In an

Re: [PATCH 0/9] crypto: caam - Add RTA descriptor creation library

On 7/19/2014 4:23 AM, Kim Phillips wrote: On Sat, 19 Jul 2014 02:51:30 +0300 Horia Geantă horia.gea...@freescale.com wrote: On 7/19/2014 1:13 AM, Kim Phillips wrote: On Fri, 18 Jul 2014 19:37:17 +0300 Horia Geanta horia.gea...@freescale.com wrote: This patch set adds Run Time Assembler (RTA

Re: [PATCH 01/10] crypto: testmgr - avoid DMA mapping from text, rodata, stack

On 7/23/2014 1:37 AM, Kim Phillips wrote: On Fri, 11 Jul 2014 15:34:46 +0300 Horia Geanta horia.gea...@freescale.com wrote: +++ b/crypto/testmgr.c @@ -198,13 +198,20 @@ static int __test_hash(struct crypto_ahash *tfm, struct hash_testvec *template, const char *algo =

Re: [PATCH v2 00/12] crypto: caam - Add RTA descriptor creation library

On 8/16/2014 2:16 PM, Kim Phillips wrote: On Thu, 14 Aug 2014 15:54:22 +0300 Horia Geanta horia.gea...@freescale.com wrote: This patch set adds Run Time Assembler (RTA) SEC descriptor library. RTA is a replacement for incumbent inline append. The library is intended to be a single code

Re: [PATCH v2 5/5] crypto: talitos: Add software backlog queue handling

On 3/4/2015 2:23 AM, Kim Phillips wrote: Only potential problem is getting the crypto API to set the GFP_DMA flag in the allocation request, but presumably a CRYPTO_TFM_REQ_DMA crt_flag can be made to handle that. Seems there are quite a few places that do not use the

Re: [PATCH v2 5/5] crypto: talitos: Add software backlog queue handling

On 3/17/2015 2:19 AM, Kim Phillips wrote: On Mon, 16 Mar 2015 12:02:51 +0200 Horia Geantă horia.gea...@freescale.com wrote: On 3/4/2015 2:23 AM, Kim Phillips wrote: Only potential problem is getting the crypto API to set the GFP_DMA flag in the allocation request, but presumably

Re: [PATCH 0/2] crypto: talitos: Add AES-XTS mode

On 3/13/2015 4:08 PM, Martin Hicks wrote: Hi Horia, On Wed, Mar 11, 2015 at 11:48 AM, Horia Geantă horia.gea...@freescale.com wrote: While here: note that xts-talitos supports only two key lengths - 256 and 512 bits. There are tcrypt speed tests that check also for 384-bit keys (which

Re: [PATCH 0/2] crypto: talitos: Add AES-XTS mode

On 3/9/2015 5:08 PM, Martin Hicks wrote: On Mon, Mar 9, 2015 at 6:16 AM, Horia Geantă horia.gea...@freescale.com wrote: On 3/3/2015 7:44 PM, Martin Hicks wrote: On Tue, Mar 3, 2015 at 10:44 AM, Horia Geantă horia.gea...@freescale.com wrote: For talitos, there are two cases: 1. request

Re: [PATCH 1/4] crypto: add CRYPTO_TFM_REQ_DMA flag

On 3/13/2015 7:14 PM, Horia Geanta wrote: The CRYPTO_TFM_REQ_DMA flag can be used by backend implementations to indicate to crypto API the need to allocate GFP_DMA memory for private contexts of the crypto requests. Signed-off-by: Horia Geanta horia.gea...@freescale.com ---

Re: [PATCH 2/4] net: esp: check CRYPTO_TFM_REQ_DMA flag when allocating crypto request

On 3/13/2015 9:46 PM, David Miller wrote: From: Horia Geanta horia.gea...@freescale.com Date: Fri, 13 Mar 2015 19:15:22 +0200 Some crypto backends might require the requests' private contexts to be allocated in DMA-able memory. Signed-off-by: Horia Geanta horia.gea...@freescale.com No

Re: [PATCH 4/4] crypto: talitos - add software backlog queue handling

On 3/13/2015 8:37 PM, Tom Lendacky wrote: On 03/13/2015 12:16 PM, Horia Geanta wrote: I was running into situations where the hardware FIFO was filling up, and the code was returning EAGAIN to dm-crypt and just dropping the submitted crypto request. This adds support in talitos for a

Re: [PATCH 2/2] crypto: talitos: Add AES-XTS Support

On 3/7/2015 3:16 AM, Kim Phillips wrote: On Fri, 6 Mar 2015 11:49:43 -0500 Martin Hicks m...@bork.org wrote: On Thu, Mar 5, 2015 at 7:16 PM, Kim Phillips kim.phill...@freescale.com wrote: On Fri, 20 Feb 2015 12:00:10 -0500 Martin Hicks m...@bork.org wrote: The newer talitos hardware has

Re: [PATCH 0/2] crypto: talitos: Add AES-XTS mode

On 3/3/2015 7:44 PM, Martin Hicks wrote: On Tue, Mar 3, 2015 at 10:44 AM, Horia Geantă horia.gea...@freescale.com wrote: On 3/3/2015 12:09 AM, Martin Hicks wrote: On Mon, Mar 02, 2015 at 03:37:28PM +0100, Milan Broz wrote: If crypto API allows to encrypt more sectors in one run (handling

Re: [PATCH 0/2] crypto: talitos: Add AES-XTS mode

On 3/3/2015 12:09 AM, Martin Hicks wrote: On Mon, Mar 02, 2015 at 03:37:28PM +0100, Milan Broz wrote: If crypto API allows to encrypt more sectors in one run (handling IV internally) dmcrypt can be modified of course. But do not forget we can use another IV (not only sequential number)

Re: [PATCH 0/3] fix some CAAM warnings.

On 3/3/2015 8:50 AM, yanjiang@windriver.com wrote: From: Yanjiang Jin yanjiang@windriver.com Hi, This patch series fix some CAAM compile and runtime warnings. The patches 0001 and 0002 are same as V1. I have tested this on fsl-p5020ds board using upstream 4.0.0-rc1+ with the

Re: [PATCH 1/4] crypto: caam: fix some compile warnings

On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote: From: Yanjiang Jin yanjiang@windriver.com This commit is to avoid the below warnings: drivers/crypto/caam/sg_sw_sec4.h:88:12: warning: 'dma_map_sg_chained' defined but not used [-Wunused-function] static int

Re: [PATCH 2/4] crypto: caam_rng: fix rng_unmap_ctx's DMA_UNMAP size problem

On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote: From: Yanjiang Jin yanjiang@windriver.com Fix rng_unmap_ctx's DMA_UNMAP size problem for caam_rng, else system would report the below calltrace during kexec boot: caam_jr ffe301000.jr: DMA-API: device driver frees DMA memory with

Re: [PATCH 0/2] crypto: talitos: Add AES-XTS mode

On 2/20/2015 7:00 PM, Martin Hicks wrote: This adds the AES-XTS mode, supported by the Freescale SEC 3.3.2. One of the nice things about this hardware is that it knows how to deal with encrypt/decrypt requests that are larger than sector size, but that also requires that that the sector

Re: [PATCH 3/4] crypto: caamhash: add two missed dma_mapping_error

On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote: From: Yanjiang Jin yanjiang@windriver.com Add two missed dma_mapping_error() after dma_map_single(). Signed-off-by: Yanjiang Jin yanjiang@windriver.com --- drivers/crypto/caam/caamhash.c | 8 1 file changed, 8

Re: [PATCH 4/4] crypto: caamhash: replace kmalloc with kzalloc

On 2/28/2015 8:00 AM, yanjiang@windriver.com wrote: From: Yanjiang Jin yanjiang@windriver.com This can make sure we get a clean memory, else system would report the below warning: I'd avoid using kzalloc, it's an overhead on the hot path. kmalloc can be used with a bit of attention

Re: [PATCH 2/5] crypto: talitos: Remove MD5_BLOCK_SIZE

On 2/20/2015 6:21 PM, Martin Hicks wrote: This is properly defined in the md5 header file. --- Signed-off-by tag is missing. -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at

Re: [PATCH 2/2] crypto: talitos: Add AES-XTS Support

On 2/20/2015 7:00 PM, Martin Hicks wrote: The newer talitos hardware has support for AES in XTS mode. Signed-off-by: Martin Hicks m...@bork.org --- checkpatch complains about formatting, please check. drivers/crypto/talitos.c | 33 +

Re: [PATCH v2 5/5] crypto: talitos: Add software backlog queue handling

On 3/4/2015 2:23 AM, Kim Phillips wrote: On Tue, 3 Mar 2015 08:21:37 -0500 Martin Hicks m...@bork.org wrote: @@ -1170,6 +1237,8 @@ static struct talitos_edesc *talitos_edesc_alloc(struct device *dev, edesc-dma_len,

Re: [PATCH 5/5] crypto: talitos: Add software backlog queue handling

On 2/20/2015 6:21 PM, Martin Hicks wrote: I was running into situations where the hardware FIFO was filling up, and the code was returning EAGAIN to dm-crypt and just dropping the submitted crypto request. This adds support in talitos for a software backlog queue. When requests can't be

Re: [PATCH v2 5/5] crypto: talitos: Add software backlog queue handling

On 3/18/2015 12:03 AM, Kim Phillips wrote: On Tue, 17 Mar 2015 19:58:55 +0200 Horia Geantă horia.gea...@freescale.com wrote: On 3/17/2015 2:19 AM, Kim Phillips wrote: On Mon, 16 Mar 2015 12:02:51 +0200 Horia Geantă horia.gea...@freescale.com wrote: On 3/4/2015 2:23 AM, Kim Phillips wrote

Re: CCM/GCM implementation defect

On 4/23/2015 6:26 AM, Herbert Xu wrote: Hi: It looks like our IPsec implementations of CCM and GCM are buggy This applies also to GMAC (rfc4543), right? in that they don't include the IV in the authentication calculation. This definitely breaks interoperability with anyone who implements

Re: [v2 PATCH 6/8] crypto: caam - Convert GCM to new AEAD interface

On 6/18/2015 9:17 AM, Herbert Xu wrote: +static void init_gcm_job(struct aead_request *req, +struct aead_edesc *edesc, +bool all_contig, bool encrypt) +{ + struct crypto_aead *aead = crypto_aead_reqtfm(req); + struct caam_ctx *ctx =

[PATCH] crypto: caam - add support for LS1021A

are postponed: -endianness fix of the last word in the S/G (rsvd2, bpid, offset), fields are always 0 anyway; -S/G format fix for i.MX7 (yes, i.MX7 support was not added yet, but still...) Signed-off-by: Horia Geantă horia.gea...@freescale.com --- Tested with ls1021_defconfig added by: ARM: configs: Add

Re: [PATCH 4/4] crypto: caam: ctrl: Use devm_kcalloc()

On 8/21/2015 5:49 PM, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com From Documentation/CodingStyle: The preferred form for allocating a zeroed array is the following: p = kcalloc(n, sizeof(...), ...); , so do as suggested. Signed-off-by: Fabio Estevam

Re: [PATCH v2 1/3] crypto: caam: ctrl: Fix the error handling

: Reviewed-by: Horia Geantă horia.gea...@freescale.com Thanks! Horia -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

[PATCH] crypto: caam - fix writing to JQCR_MS when using service interface

there is no problem since the only descriptors ran through this interface are the ones that (un)instantiate RNG. Signed-off-by: Horia Geantă horia.gea...@freescale.com --- It does not affect current driver, thus not Cc-ing stable. drivers/crypto/caam/ctrl.c | 2 +- 1 file changed, 1 insertion(+), 1

Re: [PATCH v3 1/3] crypto: caam: ctrl: Fix the error handling

Reviewed-by: Horia Geantă horia.gea...@freescale.com Thanks, Horia -- To unsubscribe from this list: send the line unsubscribe linux-crypto in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html

Re: [PATCH] crypto: caam - fix rfc4106 encap shared descriptor

On 7/30/2015 4:46 PM, Herbert Xu wrote: On Thu, Jul 30, 2015 at 04:39:26PM +0300, Horia Geantă wrote: The encap shared descriptor was changed to use the new IV convention. In the process some commands were shifted, making the output length zero, caam effectively writing garbage in dst

[PATCH] crypto: caam - fix rfc4106 encap shared descriptor

was). This makes sure the input fifo is drained before becoming full. Fixes: 46218750d523 (crypto: caam - Use new IV convention) Signed-off-by: Horia Geantă horia.gea...@freescale.com Signed-off-by: Tudor Ambarus tudor.amba...@freescale.com --- drivers/crypto/caam/caamalg.c | 18 +- 1

Re: [PATCH] crypto: caam - fix rfc4106 encap shared descriptor

On 7/30/2015 5:03 PM, Herbert Xu wrote: On Thu, Jul 30, 2015 at 04:59:01PM +0300, Horia Geantă wrote: Indeed, there is: A-005473 - Using SEQ FIFO LOAD SKIP and SEQ FIFO STORE SKIP simultaneously will cause the DECO to hang. However, the skip commands are not consecutive, there's a math

[PATCH v2] crypto: caam - fix rfc4106 encap shared descriptor

was). This makes sure the input fifo is drained before becoming full. Fixes: 46218750d523 (crypto: caam - Use new IV convention) Signed-off-by: Horia Geantă horia.gea...@freescale.com Signed-off-by: Tudor Ambarus tudor.amba...@freescale.com --- v2 - added erratum workaround drivers/crypto/caam

Re: [PATCH 00/12] crypto: caam - Add i.MX6 support to the Freescale CAAM driver

On 7/30/2015 6:58 AM, Victoria Milhoan wrote: This patch series adds i.MX6 support to the Freescale CAAM driver. Modifications include: - explicit cache coherency support in the driver 1. Please check the aead failures when enabling self-tests (CONFIG_CRYPTO_MANAGER_DISABLE_TESTS not set).

[PATCH] crypto: caam - fix memory corruption in ahash_final_ctx

When doing pointer operation for accessing the HW S/G table, a value representing number of entries (and not number of bytes) must be used. Cc: sta...@vger.kernel.org # 3.6+ Fixes: 045e36780f115 (crypto: caam - ahash hmac support) Signed-off-by: Horia Geantă horia.gea...@freescale.com

Re: [BUG?] crypto: caam: little/big endianness on ARM vs PPC

On 6/15/2015 8:18 PM, Russell King - ARM Linux wrote: On Mon, Jun 15, 2015 at 06:33:17PM +0200, Jon Nettleton wrote: Funny enough I tackled this problem over the weekend as well. My approach was to switch the driver over to use the *_relaxed() io functions and then special case the bits

Re: [PATCH] crypto: caam - Fix error handling in caam_rng_init()

On 8/12/2015 5:48 PM, Fabio Estevam wrote: From: Fabio Estevam fabio.este...@freescale.com In the error paths we should free the resources that were previously acquired, so fix it accordingly. Signed-off-by: Fabio Estevam fabio.este...@freescale.com Reviewed-by: Horia Geantă horia.gea

Re: [PATCH v2 11/14] ARM: dts: mx6sx: Add CAAM device node

On 8/5/2015 9:28 PM, Victoria Milhoan wrote: Add CAAM device node to the i.MX6SX device tree. Signed-off-by: Victoria Milhoan vicki.milh...@freescale.com --- arch/arm/boot/dts/imx6sx.dtsi | 28 1 file changed, 28 insertions(+) diff --git

Re: [PATCH RFC 06/11] crypto: caam - Enable MXC devices to select CAAM driver in Kconfig

On 6/17/2015 10:27 AM, Steffen Trumtrar wrote: On Mon, Jun 15, 2015 at 04:52:54PM -0700, Victoria Milhoan wrote: From: Steve Cornelius steve.cornel...@freescale.com Allow CAAM to be selected in the kernel for Freescale i.MX6 devices if ARCH_MXC is enabled. Signed-off-by: Steve Cornelius

Re: [PATCH 0/3] AF_ALG interface for akcipher

On 7/22/2015 7:19 AM, Tadeusz Struk wrote: On 07/21/2015 06:32 PM, Herbert Xu wrote: I think we should finish the conversion of the only in-kernel user of RSA before we add the user-space interface. Otherwise this unnecessarily ties our hands to the current API. For example, do we want an

[PATCH 2/4] crypto: caam - fix snooping for write transactions

to the IOMMU (PAMU) driver setting the correct memory coherency attributes -ARM-based: the update fixes cache coherency issues, since IOMMU (SMMU) driver is not programmed to behave similar to PAMU Signed-off-by: Horia Geantă horia.gea...@freescale.com --- drivers/crypto/caam/ctrl.c | 5

[PATCH 1/4] crypto: caam - fix ERA property reading

From: Alex Porosanu alexandru.poros...@freescale.com In order to ensure that the ERA property is properly read from DT on all platforms, of_property_read* function needs to be used. Signed-off-by: Alex Porosanu alexandru.poros...@freescale.com Signed-off-by: Horia Geantă horia.gea

[PATCH 4/4] crypto: caam - fix warning in APPEND_MATH_IMM_u64

Ambarus tudor.amba...@freescale.com Signed-off-by: Horia Geantă horia.gea...@freescale.com --- drivers/crypto/caam/desc_constr.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/caam/desc_constr.h b/drivers/crypto/caam/desc_constr.h index 9f79fd7bd4d7..98d07de24fc4

[PATCH 3/4] crypto: caam - fix RNG init descriptor ret. code checking

When successful, the descriptor that performs RNG initialization is allowed to return a status code of 7000_h, since last command in the descriptor is a JUMP HALT. Signed-off-by: Horia Geantă horia.gea...@freescale.com --- drivers/crypto/caam/ctrl.c | 5 +++-- 1 file changed, 3 insertions

[PATCH] crypto: tcrypt - avoid mapping from module image addresses

/arm/mm/dma-mapping.c:822 Signed-off-by: Horia Geantă horia.gea...@freescale.com --- Only reproduced on ARM-based platforms (LS1021A, i.MX6). For some unknown reason, PPC-based ones do not exhibit the problem. crypto/tcrypt.c | 17 + 1 file changed, 13 insertions(+), 4 deletions

[RFC][PATCH 0/2] crypto: caam - Revamp I/O accessors

. 2nd patch updates the I/O accessors in the caam driver. Horia Geantă (2): arm64: add ioread64be and iowrite64be macros crypto: caam - handle core endianness != caam endianness arch/arm64/include/asm/io.h | 4 ++- drivers/crypto/caam/caamhash.c| 5 +-- drivers/crypto/caam/ctrl.c

[RFC][PATCH 1/2] arm64: add ioread64be and iowrite64be macros

This will allow device drivers to consistently use io{read,write}XXbe macros also for 64-bit accesses. Signed-off-by: Alex Porosanu alexandru.poros...@freescale.com Signed-off-by: Horia Geantă horia.gea...@freescale.com --- arch/arm64/include/asm/io.h | 4 +++- 1 file changed, 3 insertions(+), 1

[RFC][PATCH 2/2] crypto: caam - handle core endianness != caam endianness

- {in,out}_{le,be}XX - are replaced with generic io{read,write}[be]XX where possible (no 64-bit generic I/O). Signed-off-by: Horia Geantă horia.gea...@freescale.com Signed-off-by: Alex Porosanu alexandru.poros...@freescale.com --- While patch takes into consideration the S/G format (struct sec4_sg_entry

Re: [PATCH] crypto/caam: add backlogging support

On 9/9/2015 9:57 AM, Alex Porosanu wrote: > caam_jr_enqueue() function returns -EBUSY once there are no > more slots available in the JR, but it doesn't actually save > the current request. This breaks the functionality of users > that expect that even if there is no more space for the request, >

Re: [PATCH] caam: desc: Remove unused JUMP_TYPE_MASK definition

t; > Signed-off-by: Fabio Estevam <fabio.este...@freescale.com> The build warning is introduced by commit a1efb01feca5 ("jump_label, locking/static_keys: Rename JUMP_LABEL_TYPE_* and related helpers to the static_key* pattern") which currently is not in cryptodev-2.6 tree, i.e

Re: [PATCH v3] crypto/caam: add backlogging support

On 9/19/2015 12:02 PM, Alex Porosanu wrote: > caam_jr_enqueue() function returns -EBUSY once there are no > more slots available in the JR, but it doesn't actually save > the current request. This breaks the functionality of users > that expect that even if there is no more space for the request,

Re: [PATCH RFC 06/11] crypto: caam: ensure that we clean up after an error

On 12/7/2015 9:12 PM, Russell King wrote: > Ensure that we clean up allocations and DMA mappings after encountering > an error rather than just giving up and leaking memory and resources. > > Signed-off-by: Russell King I guess the error cleanup code should be

Re: [PATCH RFC 00/13] Further iMX CAAM updates

On 12/7/2015 9:11 PM, Russell King - ARM Linux wrote: > Here are further imx-caam updates that I've had since before the > previous merge window. Please review and (I guess) if Freescale > folk can provide acks etc that would be nice. Thanks. Thanks Russell. Note that the patch set does not

Re: [PATCH RFC 10/11] crypto: caam: add ahash_edesc_add_src()

On 12/7/2015 9:12 PM, Russell King wrote: > Add a helper to map the source scatterlist into the descriptor. > > Signed-off-by: Russell King After appending 07/11 ("crypto: caam: check and use dma_map_sg() return code") as follows: diff --git

Re: [PATCH RFC 07/11] crypto: caam: check and use dma_map_sg() return code

On 12/7/2015 9:12 PM, Russell King wrote: > Strictly, dma_map_sg() may coalesce SG entries, but in practise on iMX > hardware, this will never happen. However, dma_map_sg() can fail, and > we completely fail to check its return value. So, fix this properly. > > Arrange the code to map the

[PATCH] crypto: talitos - fix ahash algorithms registration

Provide hardware state import/export functionality, as mandated by commit 8996eafdcbad ("crypto: ahash - ensure statesize is non-zero") Cc: <sta...@vger.kernel.org> # 4.3+ Reported-by: Jonas Eymann <j.eym...@gmx.net> Signed-off-by: Horia Geantă <horia.gea...@nxp.com> -

[PATCH v3 2/8] asm-generic/io.h: add io{read,write}64 accessors

This will allow device drivers to consistently use io{read,write}XX also for 64-bit accesses. Acked-by: Arnd Bergmann <a...@arndb.de> Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- include/asm-generic/io.h| 63 + include/asm-gen

[PATCH v3 3/8] arm64: add io{read,write}64be accessors

This will allow device drivers to consistently use io{read,write}XXbe also for 64-bit accesses. Acked-by: Catalin Marinas <catalin.mari...@arm.com> Signed-off-by: Alex Porosanu <alexandru.poros...@nxp.com> Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- arch/arm64/in

[PATCH v3 0/8] crypto: caam - add support for LS1043A SoC

d, but lead to a bigger performance drop.) Thanks, Horia Cristian Stoica (1): crypto: caam - fix offset field in hw sg entries Horia Geantă (7): asm-generic/io.h: allow barriers in io{read,write}{16,32}be asm-generic/io.h: add io{read,write}64 accessors arm64: add io{read,write}64be accessors

[PATCH v3 7/8] crypto: caam - add ARCH_LAYERSCAPE to supported architectures

This basically adds support for ls1043a platform. Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- drivers/crypto/caam/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig index d2c2909a4020..ff54c4

[PATCH v3 4/8] powerpc: add io{read,write}64 accessors

This will allow device drivers to consistently use io{read,write}XX also for 64-bit accesses. Acked-by: Michael Ellerman <m...@ellerman.id.au> Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- arch/powerpc/kernel/iomap.c | 24 1 file changed, 24 inserti

[PATCH v3 5/8] crypto: caam - fix offset field in hw sg entries

From: Cristian Stoica <cristian.sto...@freescale.com> The offset field is 13 bits wide; make sure we don't overwrite more than that in the caam hardware scatter gather structure. Signed-off-by: Cristian Stoica <cristian.sto...@freescale.com> Signed-off-by: Horia Geantă <horia

[PATCH v3 8/8] arm64: dts: ls1043a: add crypto node

LS1043A has a SEC v5.4 security engine. For now don't add rtic or sec_mon subnodes, since these features haven't been tested yet. Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- To go into kernel 4.8 via crypto tree. arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 4 +++ arch

[PATCH v3 1/8] asm-generic/io.h: allow barriers in io{read,write}{16,32}be

n architectures that don't override the io{read,write}{16,32}be accessors, but it will work correctly on all architectures without them having to override these accessors." Suggested-by: Arnd Bergmann <a...@arndb.de> Acked-by: Arnd Bergmann <a...@arndb.de> Signed-off-by: Horia Geantă <

[PATCH 2/7] arm64: add io{read,write}64be accessors

This will allow device drivers to consistently use io{read,write}XXbe also for 64-bit accesses. Signed-off-by: Alex Porosanu <alexandru.poros...@nxp.com> Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- arch/arm64/include/asm/io.h | 4 +++- 1 file changed, 3 insertions(+)

[PATCH 5/7] crypto: caam - handle core endianness != caam endianness

to take into consideration the endianness of the core when displaying data. Add the necessary glue code so the entries remain the same, but they are properly read, regardless of the core and/or SEC endianness. Note: pdb.h fixes only what is currently being used (IPsec). Signed-off-by: Horia Geantă

[PATCH 4/7] crypto: caam - fix offset field in hw sg entries

From: Cristian Stoica <cristian.sto...@freescale.com> The offset field is 13 bits wide; make sure we don't overwrite more than that in the caam hardware scatter gather structure. Signed-off-by: Cristian Stoica <cristian.sto...@freescale.com> Signed-off-by: Horia Geantă <horia

[PATCH 6/7] crypto: caam - add ARCH_LAYERSCAPE to supported architectures

This basically adds support for ls1043a platform. Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- drivers/crypto/caam/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig index d2c2909a4020..ff54c4

[PATCH 0/7] crypto: caam - add support for LS1043A SoC

ield in hw sg entries Horia Geantă (6): asm-generic/io.h: add io{read,write}64 accessors arm64: add io{read,write}64be accessors powerpc: add io{read,write}64 accessors crypto: caam - handle core endianness != caam endianness crypto: caam - add ARCH_LAYERSCAPE to supported architectures arm64:

[PATCH 7/7] arm64: dts: ls1043a: add crypto node

LS1043A has a SEC v5.4 security engine. For now don't add rtic or sec_mon subnodes, since these features haven't been tested yet. Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 4 +++ arch/arm64/boot/dts/freescale/fsl-ls1043

[PATCH 1/7] asm-generic/io.h: add io{read,write}64 accessors

This will allow device drivers to consistently use io{read,write}XX also for 64-bit accesses. Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- include/asm-generic/io.h| 63 + include/asm-generic/iomap.h | 8 ++ 2 files chang

[PATCH v2 8/8] arm64: dts: ls1043a: add crypto node

LS1043A has a SEC v5.4 security engine. For now don't add rtic or sec_mon subnodes, since these features haven't been tested yet. Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- arch/arm64/boot/dts/freescale/fsl-ls1043a-rdb.dts | 4 +++ arch/arm64/boot/dts/freescale/fsl-ls1043

[PATCH v2 7/8] crypto: caam - add ARCH_LAYERSCAPE to supported architectures

This basically adds support for ls1043a platform. Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- drivers/crypto/caam/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/crypto/caam/Kconfig b/drivers/crypto/caam/Kconfig index d2c2909a4020..ff54c4

[PATCH v2 6/8] crypto: caam - handle core endianness != caam endianness

to take into consideration the endianness of the core when displaying data. Add the necessary glue code so the entries remain the same, but they are properly read, regardless of the core and/or SEC endianness. Note: pdb.h fixes only what is currently being used (IPsec). Signed-off-by: Horia Geantă

[RESEND PATCH v2 1/8] asm-generic/io.h: allow barriers in io{read,write}{16,32}be

n architectures that don't override the io{read,write}{16,32}be accessors, but it will work correctly on all architectures without them having to override these accessors." Suggested-by: Arnd Bergmann <a...@arndb.de> Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- Herbert, I forgo

[PATCH v2 0/8] crypto: caam - add support for LS1043A SoC

uce device endianness. The performance drop due to the runtime detection is < 1.0%. (An alternative implementation using function pointers has been tried, but lead to a bigger performance drop.) Thanks, Horia Cristian Stoica (1): crypto: caam - fix offset field in hw sg entries Horia Gean

[PATCH v2 4/8] powerpc: add io{read,write}64 accessors

This will allow device drivers to consistently use io{read,write}XX also for 64-bit accesses. Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- arch/powerpc/kernel/iomap.c | 24 1 file changed, 24 insertions(+) diff --git a/arch/powerpc/kernel/iomap.c

[PATCH v2 5/8] crypto: caam - fix offset field in hw sg entries

From: Cristian Stoica <cristian.sto...@freescale.com> The offset field is 13 bits wide; make sure we don't overwrite more than that in the caam hardware scatter gather structure. Signed-off-by: Cristian Stoica <cristian.sto...@freescale.com> Signed-off-by: Horia Geantă <horia

[PATCH v2 3/8] arm64: add io{read,write}64be accessors

This will allow device drivers to consistently use io{read,write}XXbe also for 64-bit accesses. Signed-off-by: Alex Porosanu <alexandru.poros...@nxp.com> Signed-off-by: Horia Geantă <horia.gea...@nxp.com> --- arch/arm64/include/asm/io.h | 4 +++- 1 file changed, 3 insertions(+)

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