/PRNG algorithms.
Signed-off-by: LABBE Corentin clabbe.montj...@gmail.com
This is essentially a synchronous driver, no? If so please
switch to the blkcipher/shash interface.
The exact opposite has been asked for during v1's review...
Maxime
--
Maxime Ripard, Free Electrons
Embedded
On Sat, Jul 12, 2014 at 02:59:12PM +0200, LABBE Corentin wrote:
This patch adds documentation for Device-Tree bindings for the Security
System cryptographic accelerator driver.
Signed-off-by: LABBE Corentin clabbe.montj...@gmail.com
Acked-by: Maxime Ripard maxime.rip...@free-electrons.com
.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.asc
Description: Digital signature
Hi Corentin,
Thanks for resending it.
On Sun, Oct 19, 2014 at 04:16:22PM +0200, LABBE Corentin wrote:
Add support for the Security System included in Allwinner SoC A20.
The Security System is a hardware cryptographic accelerator that support
AES/MD5/SHA1/DES/3DES/PRNG algorithms.
We are removing the dmaengine_device_control API, that shouldn't even have been
exposed in the first place. Change the callers to use the proper API.
Signed-off-by: Maxime Ripard maxime.rip...@free-electrons.com
---
drivers/crypto/ux500/cryp/cryp_core.c | 4 ++--
drivers/crypto/ux500/hash
On Fri, Oct 24, 2014 at 08:52:26PM +0200, Corentin LABBE wrote:
On 10/21/14 21:11, Maxime Ripard wrote:
Hi Corentin,
Thanks for resending it.
On Sun, Oct 19, 2014 at 04:16:22PM +0200, LABBE Corentin wrote:
Add support for the Security System included in Allwinner SoC A20
On Fri, Oct 31, 2014 at 04:18:03PM +0800, Herbert Xu wrote:
On Fri, Oct 31, 2014 at 09:13:23AM +0100, Maxime Ripard wrote:
I don't understand here. Why would other drivers *not* being affected?
If the scatter list passed by AF_ALG can be in highmem, I guess it's
the case for every
On Fri, Oct 31, 2014 at 06:05:22PM +0800, Herbert Xu wrote:
On Fri, Oct 31, 2014 at 10:57:06AM +0100, Maxime Ripard wrote:
On a 3.18-rc2 kernel:
$ git grep kmap -- crypto/
crypto/ahash.c: walk-data = kmap(walk-pg);
crypto/ahash.c: walk
On Mon, Nov 03, 2014 at 06:35:28PM +0800, Herbert Xu wrote:
On Mon, Nov 03, 2014 at 10:34:46AM +0100, Maxime Ripard wrote:
What I mean is that since you are saying that drivers should do the
kmap themselves, then *all* of the drivers are broken if they are not
using it. And all of them
On Thu, Nov 06, 2014 at 10:32:18PM +0800, Herbert Xu wrote:
On Thu, Nov 06, 2014 at 03:26:33PM +0100, Maxime Ripard wrote:
But you still haven't explain why the driver, while it doesn't handle
the user space buffer at any time, should be worried that the data the
framework has given him
;
+ interrupts = 0 86 4;
Please use the GIC's define here.
Thanks,
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.asc
Description: Digital signature
usually have an example after too.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.asc
Description: Digital signature
Hi Dan,
On Wed, May 13, 2015 at 09:00:46AM -0700, Dan Williams wrote:
On Wed, May 13, 2015 at 2:17 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi Dan,
On Tue, May 12, 2015 at 09:05:41AM -0700, Dan Williams wrote:
On Tue, May 12, 2015 at 8:37 AM, Maxime Ripard
maxime.rip
no control over it.
Why not just have a choice option, and select which one you want to
enable?
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.asc
Description: Digital signature
On Fri, Apr 17, 2015 at 04:40:43PM +0200, Gregory CLEMENT wrote:
Hi Maxime,
On 17/04/2015 16:32, Maxime Ripard wrote:
On Fri, Apr 17, 2015 at 04:19:22PM +0200, Boris Brezillon wrote:
Hi Gregory,
On Fri, 17 Apr 2015 15:01:01 +0200
Gregory CLEMENT gregory.clem...@free-electrons.com
On Fri, Apr 17, 2015 at 05:01:55PM +0200, Gregory CLEMENT wrote:
On 17/04/2015 16:50, Maxime Ripard wrote:
On Fri, Apr 17, 2015 at 04:40:43PM +0200, Gregory CLEMENT wrote:
Hi Maxime,
On 17/04/2015 16:32, Maxime Ripard wrote:
On Fri, Apr 17, 2015 at 04:19:22PM +0200, Boris Brezillon
async_mult
and async_sum_product).
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.asc
Description: Digital signature
On Mon, May 18, 2015 at 10:06:55AM -0700, Dan Williams wrote:
On Mon, May 18, 2015 at 2:14 AM, Maxime Ripard
maxime.rip...@free-electrons.com wrote:
Hi Dan,
On Wed, May 13, 2015 at 09:00:46AM -0700, Dan Williams wrote:
On Wed, May 13, 2015 at 2:17 AM, Maxime Ripard
maxime.rip...@free
to 0 is the right thing to do
though. Corentin?
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.asc
Description: Digital signature
functions
(SHA224/SHA256/RSA/CRC), they will be supported in a separate driver.
All applied. Thanks a lot!
All applied, DT bits included?
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.asc
Description: Digital
On Mon, Jul 20, 2015 at 04:20:57PM +0800, Herbert Xu wrote:
On Mon, Jul 20, 2015 at 10:18:36AM +0200, Maxime Ripard wrote:
On Mon, Jul 20, 2015 at 04:10:50PM +0800, Herbert Xu wrote:
On Fri, Jul 17, 2015 at 04:39:37PM +0200, LABBE Corentin wrote:
Hello
This is the driver
ementaton of md5/sha1 is via ahash algorithms.
Commit 8996eafdcbad ('crypto: ahash - ensure statesize is non-zero')
made impossible to load them without giving statesize. This patch
specifiy statesize for sha1 and md5.
Fixes: 6298e948215f ("crypto: sunxi-ss - Add Allwinner Security System crypto
a
d-off-by: LABBE Corentin <clabbe.montj...@gmail.com>
> Cc: sta...@vger.kernel.org
Please also add a Fixes tag (and the stable version it applies to).
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.asc
Description: Digital signature
gt;
Acked-by: Maxime Ripard <maxime.rip...@free-electrons.com>
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com
signature.asc
Description: Digital signature
don't think that's true either. A constant entropy provider will
not add any entropy, but will not remove any, would it?
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
signature.asc
Description: PGP signature
On Tue, Oct 25, 2016 at 07:38:55AM +0200, LABBE Corentin wrote:
> On Mon, Oct 24, 2016 at 10:10:20PM +0200, Maxime Ripard wrote:
> > On Sat, Oct 22, 2016 at 03:53:28PM +0200, Corentin Labbe wrote:
> > > Since SID's content is constant over reboot,
> >
> > That's not
P_INT_ENABLE (1 << 2)
> #define SS_TXFIFO_AVA_INT_ENABLE (1 << 0)
>
> +#define SS_SEED_LEN (192 / 8)
> +#define SS_DATA_LEN (160 / 8)
> +
> struct sun4i_ss_ctx {
> void __iomem *base;
> int irq;
> @@ -136,6 +140,7 @@ struct sun4i_ss_ctx {
> struct device *dev;
> struct resource *res;
> spinlock_t slock; /* control the use of the device */
> + u32 seed[SS_SEED_LEN / 4];
Shouldn't you define SS_SEED_LEN in bits, and then use either
BITS_PER_BYTE and BITS_PER_LONG so that it's obvious what you're doing
?
And you could also make that variable defined based on the option,
otherwise you'll always allocate that array, even if you're not using
it.
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
signature.asc
Description: PGP signature
On Tue, Jun 20, 2017 at 01:45:36PM +0200, Corentin Labbe wrote:
> On Tue, Jun 20, 2017 at 11:59:47AM +0200, Maxime Ripard wrote:
> > Hi,
> >
> > On Tue, Jun 20, 2017 at 10:58:19AM +0200, Corentin Labbe wrote:
> > > The Security System have a PRNG, thi
robably shouldn't.
The AHB clock is shared by most of the drivers, some of them actually
using that clock to generate their signals.
You would have to unbreak all those drivers first, which is probably
not needed at all. I haven't seen a case where a block had a module
clock and did care for its AH
d add a SoC-specific compatible here, just so that if we ever
need to fix something in there we don't have to update our DT.
Thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
signature.asc
Description: PGP signature
On Thu, Jun 01, 2017 at 09:39:05PM +0200, Antoine Tenart wrote:
> Add SoC specific compatibles for all sunXi crypto nodes, in addition to
> the one already used (allwinner,sun4i-a10-crypto).
>
> Signed-off-by: Antoine Tenart <antoine.ten...@free-electrons.com>
Applied, thanks!
ntoine.ten...@free-electrons.com>
Applied, thanks!
Maxime
--
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com
signature.asc
Description: PGP signature
32 matches
Mail list logo
