Re: [PATCH v5 1/4] Documentation/bindings: Document the SafeXel cryptographic engine driver

2017-05-23 Thread Antoine Tenart
Hi Thomas, On Mon, May 22, 2017 at 09:34:16PM +0200, Thomas Petazzoni wrote: > On Mon, 22 May 2017 16:45:11 +0200, Antoine Tenart wrote: > > + interrupts = > IRQ_TYPE_LEVEL_HIGH)>, > > You already got the feedback previously that an interrupt that is both > edge and level at the same

Re: [PATCH v5 1/4] Documentation/bindings: Document the SafeXel cryptographic engine driver

2017-05-22 Thread Thomas Petazzoni
Hello, On Mon, 22 May 2017 16:45:11 +0200, Antoine Tenart wrote: > + interrupts = IRQ_TYPE_LEVEL_HIGH)>, You already got the feedback previously that an interrupt that is both edge and level at the same time doesn't make sense. Could you fix this? Also, the DTs that have already

[PATCH v5 1/4] Documentation/bindings: Document the SafeXel cryptographic engine driver

2017-05-22 Thread Antoine Tenart
The Inside Secure Safexcel cryptographic engine is found on some Marvell SoCs (7k/8k). Document the bindings used by its driver. Signed-off-by: Antoine Tenart --- .../bindings/crypto/inside-secure-safexcel.txt | 29 ++ 1 file changed,