Hi Frederic,
On Fri, 28 Sep 2012 01:01:48 +0200, Frederic Weisbecker wrote:
> When Arun was working on this, I asked him to explore if it could make sense
> to reuse
> the "-b, --branch-stack" perf report option. Because after all, this feature
> is doing
> about the same than "-b" except it's
Hi Al,
Today's linux-next merge of the signal tree got a conflict in fs/exec.c
between commit 5b8a94d461a7 ("coredump: move core dump functionality into
its own file") from the vfs tree and commits 70446600fa12 ("arm:
introduce ret_from_kernel_execve(), switch to generic kernel_execve()")
and
On 09/27/2012 12:02 AM, Alex Shi wrote:
Peter:
Maybe the patch doesn't looks perfect for this issue.
So I am wondering if the following patch is better, if we don't care the irq_tlb
was counted again in irq_call?
Tomoki-san's patch looked sane to me, I should just apply it.
-hpa
On 09/27/2012 10:38 PM, Raghavendra K T wrote:
+
+bool kvm_overcommitted()
+{
This better not be C...
-hpa
--
H. Peter Anvin, Intel Open Source Technology Center
I work for Intel. I don't speak on their behalf.
--
To unsubscribe from this list: send the line "unsubscribe
On Thu, Sep 27, 2012 at 02:33:09PM -0700, Andrew Morton wrote:
> On Wed, 26 Sep 2012 20:17:07 +0530
> "Philip, Avinash" wrote:
>
> > Some back lights perform poorly when driven by a PWM with a short
> > duty-cycle. For such devices, the low threshold can be used to specify a
> > lower bound for
On 09/27/2012 05:33 PM, Avi Kivity wrote:
On 09/27/2012 01:23 PM, Raghavendra K T wrote:
This gives us a good case for tracking preemption on a per-vm basis. As
long as we aren't preempted, we can keep the PLE window high, and also
return immediately from the handler without looking for
On Thu, Sep 27, 2012 at 03:11:59PM -0700, Andrew Morton wrote:
> On Thu, 27 Sep 2012 13:29:11 +0200
> Thierry Reding wrote:
>
> > Hi Marek,
> >
> > any idea why CMA might be broken in next-20120926. I see that there
> > haven't been any major changes to CMA itself, but there's been quite a
> >
Forgot to Cc x86 maintainers, will send again. Sorry for the noise.
> -Original Message-
> From: Zheng, Lv
> Sent: Friday, September 28, 2012 10:40 AM
> To: Brown, Len
> Cc: linux-kernel@vger.kernel.org; linux-a...@vger.kernel.org; Zheng, Lv
> Subject: [PATCH v4 0/2] ACPI: DBGP/DBG2 early
On Fri, Sep 28, 2012 at 4:18 AM, GeneralTouch wrote:
> From: Xianhan Yu
>
> Fix the touch-up no response problem on GeneralTouch twofingers touchscreen
> and modify the driver for new GeneralTouch PWT touchscreen.
>
> Signed-off-by: Xianhan Yu
Hi,
Thank you for re-submitting the patch. It's
From: Wei Yongjun
Convert cpu_to_leXX(leXX_to_cpu(E1) + E2) to use leXX_add_cpu().
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun
---
fs/hpfs/dnode.c | 30 +++---
fs/hpfs/anode.c | 6 +++---
2 files
Hi Jiri,
On Thu, 27 Sep 2012 19:03:52 +0200, Jiri Olsa wrote:
>> diff --git a/tools/perf/util/parse-events.c b/tools/perf/util/parse-events.c
>> index bf5d033ee1b4..3c52d0ab9270 100644
>> --- a/tools/perf/util/parse-events.c
>> +++ b/tools/perf/util/parse-events.c
>> @@ -830,6 +830,7 @@ int
From: Wei Yongjun
Convert cpu_to_beXX(beXX_to_cpu(E1) + E2) to use beXX_add_cpu().
dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)
Signed-off-by: Wei Yongjun
---
fs/omfs/file.c | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git
On 09/05/2012 05:25 PM, we...@cn.fujitsu.com wrote:
From: Yasuaki Ishimatsu
We should offline and remove memory when removing the memory device.
The memory device can be removed by 2 ways:
1. send eject request by SCI
2. echo 1 >/sys/bus/pci/devices/PNP0C80:XX/eject
In the 1st case,
From: Andi Kleen
Haswell has two additional LBR from flags for TSX: intx and abort, implemented
as a new v4 version of the PEBS record.
Handle those in and adjust the sign extension code to still correctly extend.
The flags are exported similarly in the LBR record to the existing misprediction
From: Andi Kleen
Add basic PEBS support for Haswell.
The constraints are similar to SandyBridge with a few new events.
Signed-off-by: Andi Kleen
---
arch/x86/kernel/cpu/perf_event.h |2 ++
arch/x86/kernel/cpu/perf_event_intel.c|2 +-
From: Andi Kleen
Expose INTX (count in transaction only, :t) and INTX_CHECKPOINTED
(on transaction abort restore counter, :c) attributes as generic perf event
attributes. These are important for measuring basic hardware transactional
behaviour.
They also need to be handled in a special way in
From: Andi Kleen
Just straight forward use of the new flags
Signed-off-by: Andi Kleen
---
tools/perf/util/header.c |6 --
tools/perf/util/python.c |8 +++-
2 files changed, 11 insertions(+), 3 deletions(-)
diff --git a/tools/perf/util/header.c b/tools/perf/util/header.c
index
From: Andi Kleen
Add LBR filtering for branch in transaction, branch not in transaction
or transaction abort. This is exposed as new sample types.
Signed-off-by: Andi Kleen
---
arch/x86/kernel/cpu/perf_event_intel_lbr.c | 31 +--
include/linux/perf_event.h
From: Andi Kleen
I had some problems with spurious PMIs, so print the PMU state
on a spurious one. This will not interact well with other NMI users.
Disabled by default, has to be explicitely enabled through sysfs.
Optional, but useful for debugging.
Signed-off-by: Andi Kleen
---
From: Andi Kleen
This is not arch perfmon, but older CPUs will just ignore it. This makes
it possible to do at least some TSX measurements from a KVM guest
Cc: a...@redhat.com
Signed-off-by: Andi Kleen
---
arch/x86/kernel/cpu/perf_event_intel.c |3 ++-
arch/x86/kvm/pmu.c
From: Andi Kleen
Add basic Haswell PMU support.
Similar to SandyBridge, but has a few new events. Further
differences are handled in followon patches.
There are some new counter flags that need to be prevented
from being set on fixed counters.
Contains fixes from Stephane Eranian
From: Andi Kleen
Add the generic transaction events with aliases to the parser, lexer
and the reverse map code.
Signed-off-by: Andi Kleen
---
tools/perf/util/evsel.c| 40
tools/perf/util/parse-events.c | 24
From: Andi Kleen
Make perf report -j aware of the new intx,notx,abort branch qualifiers.
Signed-off-by: Andi Kleen
---
tools/perf/builtin-record.c |3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/tools/perf/builtin-record.c b/tools/perf/builtin-record.c
index
From: Andi Kleen
Add a generic qualifier for transaction events, as a new sample
type that returns a flag word. This is particularly useful
for qualifying aborts: to distinguish aborts which happen
due to asynchronous events (like conflicts caused by another
CPU) versus instructions that lead to
From: Andi Kleen
So that the browser still shows the abort label
Signed-off-by: Andi Kleen
---
tools/perf/util/annotate.c |2 ++
1 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
index 3a282c0..bf549cd 100644
---
From: Andi Kleen
Implement the TSX transaction and checkpointed transaction qualifiers for
Haswell. This allows e.g. to profile the number of cycles in transactions.
The checkpointed qualifier requires forcing the event to
counter 2, implement this with a custom constraint for Haswell.
From: Andi Kleen
Haswell supports new per event qualifiers for TSX transactions and
checkpointed transaction qualifiers that can be used to compute the
events discarded due to aborts.
Implement it in the usertool as :t and :c
Signed-off-by: Andi Kleen
---
From: Andi Kleen
Add support for reporting PEBS records in a raw format that can
be then parsed by perf script.
We exposed most of the Haswell PEBS fields in a generic way
in this patchkit:
- Aborted cycles is in weight
- Memory latency is in weight
- DataLA is in address
- EventingRIP is used
From: Andi Kleen
Add histogram support for the transaction flags. Each flags instance becomes
a separate histogram. Support sorting and displaying the flags in report
and top.
The patch is fairly large, but it's really mostly just plumbing to pass the
flags around.
Signed-off-by: Andi Kleen
From: Andi Kleen
For some events it's useful to weight sample with a hardware
provided number. This expresses how expensive the action the
sample represent was. This allows the profiler to scale
the samples to be more informative to the programmer.
There is already the period which is used
From: Andi Kleen
Straight forward table mapping from the generic transactional memory events
to the Haswell TSX events.
One special case is that the abort-all events force PEBS with precise level
two. Without using eventingrip abort IPs are generally useless (you get
something after the abort).
From: Andi Kleen
Add support to perf stat to print the basic transactional execution statistics:
Total cycles, Cycles in Transaction, Cycles in aborted transsactions
using the intx and intx_checkpoint qualifiers.
Transaction Starts and Elision Starts, to compute the average transaction
length.
From: Andi Kleen
In the PEBS handler report the transaction flags using the new
generic transaction flags facility. Most of them come from
the "tsx_tuning" field in PEBSv2, but the abort code is derived
from the RAX register reported in the PEBS record.
Signed-off-by: Andi Kleen
---
From: Andi Kleen
With checkpointed counters there can be a situation where the counter
is overflowing, aborts the transaction, is set back to a non overflowing
checkpoint, causes interupt. The interrupt doesn't see the overflow
because it has been checkpointed. This is then a spurious PMI,
From: Andi Kleen
When a weighted sample is requested, first try to report the TSX abort cost
on Haswell. If that is not available report the memory latency. This
allows profiling both by abort cost and by memory latencies.
Memory latencies requires enabling a different PEBS mode (LL).
When both
From: Andi Kleen
For tuning and debugging hardware transactional memory it is very
important to have hardware counter support.
This patch adds a simple and hopefully generic set of hardware events
for transactional memory and lock elision.
It is based on the TSX PMU support because I don't
On 27 September 2012 21:36, Jassi Brar wrote:
> On Thu, Sep 27, 2012 at 9:11 PM, Inderpal Singh
> wrote:
>> On 27 September 2012 15:18, Vinod Koul wrote:
>>> On Wed, 2012-09-26 at 12:11 +0530, Inderpal Singh wrote:
If we fail pl330_remove while some client is queued, the force unload
From: Andi Kleen
Extend the perf branch sorting code to support sorting by intx
or abort qualifiers. Also print out those qualifiers.
Signed-off-by: Andi Kleen
---
tools/perf/builtin-report.c |3 +-
tools/perf/builtin-top.c|4 ++-
tools/perf/perf.h |4 ++-
From: Andi Kleen
Haswell supplies the address for every PEBS event, so always fill it in
when the user requested it. It will be 0 when not useful (no memory access)
Signed-off-by: Andi Kleen
---
arch/x86/kernel/cpu/perf_event_intel_ds.c |4
1 files changed, 4 insertions(+), 0
From: Andi Kleen
Add support for the v2 PEBS format. It has a superset of the v1 PEBS
fields, but has a longer record so we need to adjust the code paths.
The main advantage is the new "EventingRip" support which directly
gives the instruction, not off-by-one instruction. So with precise == 2
From: Andi Kleen
perf record has a new option -W that enables weightened sampling.
Add sorting support in top/report for the average weight per sample and the
total weight sum. This allows to both compare relative cost per event
and the total cost over the measurement period.
Add the necessary
From: Andi Kleen
Add the glue in the user tools to record transaction flags with
--transaction (-T was already taken) and dump them.
Followon patches will use them.
Signed-off-by: Andi Kleen
---
tools/perf/Documentation/perf-record.txt |5 -
tools/perf/builtin-record.c |
From: Andi Kleen
When the LBR format is unknown disable LBR recording. This prevents
crashes when the LBR address is misdecoded and mis-sign extended.
Signed-off-by: Andi Kleen
---
arch/x86/kernel/cpu/perf_event_intel_lbr.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff
From: Andi Kleen
The --sort documentation for top and report was hopelessly out-of-date
Instead of having two more places that would need to be updated,
just point to --help.
Signed-off-by: Andi Kleen
---
tools/perf/Documentation/perf-report.txt |2 +-
From: Andi Kleen
Haswell has a new alternative MSR range for perfctrs that allows writing the
full
counter width. Enable this range if the hardware reports it using a new
capability
bit. This lowers overhead of perf stat slightly because it has to do less
interrupts
to accumulate the counter
This adds perf PMU support for the upcoming Haswell core. The patchkit
is fairly large, mainly due to various enhancement for TSX. TSX tuning
relies heavily on the PMU, so I tried hard to make all facilities
easily available. In addition it also has some other enhancements.
This includes
Hi,
From: Nobuhiro Iwamatsu
Subject: Re: [PATCH v3 1/2] iommu/shmobile: Add iommu driver for Renesas IPMMU
modules
Date: Wed, 12 Sep 2012 17:07:00 +0900
>> +static inline void ipmmu_add_device(struct device *dev)
>> +{
>> +}
>
> Please use 'do { } while (0)'.
Do you mean using #define macro
On Thu, 2012-09-27 at 12:40 -0700, Linus Torvalds wrote:
> On Thu, Sep 27, 2012 at 11:29 AM, Peter Zijlstra
> wrote:
> >
> > Don't forget to run the desktop interactivity benchmarks after you're
> > done wriggling with this knob... wakeup preemption is important for most
> > those.
>
> So I
Hi Chen,
2012/09/28 11:22, Ni zhan Chen wrote:
On 09/05/2012 05:25 PM, we...@cn.fujitsu.com wrote:
From: Yasuaki Ishimatsu
remove_memory() only try to offline pages. It is called in two cases:
1. hot remove a memory device
2. echo offline >/sys/devices/system/memory/memoryXX/state
In the
On Thu, 2012-09-27 at 21:24 +0200, Borislav Petkov wrote:
> On Thu, Sep 27, 2012 at 08:29:44PM +0200, Peter Zijlstra wrote:
> > > >> Or could we just improve the heuristics. What happens if the
> > > >> scheduling granularity is increased, for example? It's set to 1ms
> > > >> right now, with a
Hi Kosaki-san,
2012/09/28 10:35, KOSAKI Motohiro wrote:
On Thu, Sep 27, 2012 at 8:24 PM, Yasuaki Ishimatsu
wrote:
Hi Chen,
2012/09/27 19:20, Ni zhan Chen wrote:
Hi Congyang,
2012/9/27
From: Yasuaki Ishimatsu
When calling remove_memory_block(), the function shows following message
at
On Tue, Sep 25, 2012 at 10:11:59AM -0600, mathieu.poir...@linaro.org wrote:
> From: Kalle Komierowski
>
> The CCMuxOffset bit is not kept set, this will force the columb counter
> of the AB8500 to use the measure offset calibration.
> This should increase the accuracy of the fuel gauge.
>
>
On Tue, Sep 25, 2012 at 10:11:58AM -0600, mathieu.poir...@linaro.org wrote:
> From: Johan Bjornstedt
>
> There is no state machine in the AB to step up/down
> the charger current to avoid dips and spikes on VBUS
> and VBAT when charging is started.
> Instead this is implemented in SW
Some
On 2012-09-27 19:35, Paul Bolle wrote:
On Fri, 2012-09-21 at 16:40 +0800, Zhenzhong Duan wrote:
@@ -275,7 +280,7 @@ static int __frontswap_shrink(unsigned long target_pages,
if (total_pages<= target_pages) {
/* Nothing to do */
*pages_to_unuse = 0;
I
A couple of fixes; one for automount/lazy umount race, another
a classic "we don't protect the refcount transition to zero with the
lock that protects looking for object in hash" kind of crap in lockd.
Please, pull. The usual place -
git.kernel.org/pub/scm/linux/kernel/git/viro/vfs.git
Hi all,
Today's linux-next merge of the tip tree got a conflict in
arch/x86/Kconfig between commit 9a9d5786a5e7 ("Make most arch
asm/module.h files use asm-generic/module.h") from the rr tree and
commits fdf9c356502a ("cputime: Make finegrained irqtime accounting
generally available") and
On 09/11/2012 10:24 AM, Yasuaki Ishimatsu wrote:
Hi Wen,
2012/09/11 11:15, Wen Congyang wrote:
Hi, ishimatsu
At 09/05/2012 05:25 PM, we...@cn.fujitsu.com Wrote:
From: Yasuaki Ishimatsu
If system supports memory hot-remove, online_pages() may online
removed pages.
So online_pages() need to
Hi all,
Today's linux-next merge of the tip tree got a conflict in arch/Kconfig
between commit 9a9d5786a5e7 ("Make most arch asm/module.h files use
asm-generic/module.h") from the rr tree and commits fdf9c356502a
("cputime: Make finegrained irqtime accounting generally available") and
I've found a much simpler way of fixing this, by using
down_read_trylock(). In the very unlikely case where s_umount is
contended, we can just skip kicking the writeback thread.
- Ted
>From 51ad3407a91ab090d1772b63329bd3b7f2210eb0 Mon Sep 17 00:00:00 2001
On 09/05/2012 05:25 PM, we...@cn.fujitsu.com wrote:
From: Wen Congyang
The memory device has only one node id. Store the node id when
enable the memory device, and we can reuse it when removing the
memory device.
one question:
if use numa emulation, memory device will associated to one node
Quoting Matthew Garrett (m...@redhat.com):
> The firmware has a set of flags that indicate whether secure boot is enabled
> and enforcing. Use them to indicate whether the kernel should lock itself
> down.
>
> Signed-off-by: Matthew Garrett
(purely for the non-firmware bits) seems good, thanks.
Quoting Matthew Garrett (m...@redhat.com):
> From: Josh Boyer
>
> This forcibly drops CAP_COMPROMISE_KERNEL from both cap_permitted and cap_bset
> in the init_cred struct, which everything else inherits from. This works on
> any machine and can be used to develop even if the box doesn't have
Quoting Matthew Garrett (m...@redhat.com):
> Secure boot adds certain policy requirements, including that root must not
> be able to do anything that could cause the kernel to execute arbitrary code.
> The simplest way to handle this would seem to be to add a new capability
> and gate various
On 23:22 Thu 27 Sep , Roland Stigge wrote:
> The recurring task of providing simultaneous access to GPIO lines (especially
> for bit banging protocols) needs an appropriate API.
>
> This patch adds a kernel internal "Block GPIO" API that enables simultaneous
> access to several GPIOs in the
On Tue, Sep 25, 2012 at 10:12:53AM -0600, mathieu.poir...@linaro.org wrote:
> From: Marcus Cooper
>
> The patch for 426250 added a change to check for the quick
What is 426250? I guess it's some internal bug#... but since we don't have
access to that info, it's better to describe which upstream
On Tue, Sep 25, 2012 at 10:12:52AM -0600, mathieu.poir...@linaro.org wrote:
> From: Marcus Cooper
>
> When the state of USB Charge detection is changed then the calls
> use a define for another register in other bank. This change
> creates a new define for the correct register and removes the
>
On Tue, Sep 25, 2012 at 10:12:51AM -0600, mathieu.poir...@linaro.org wrote:
> From: Marcus Cooper
>
> The newer AB's such as the AB8505, AB9540 etc include a
> USBLink1 Status register which detects a larger range of
> external devices. This should be used instead of the
> USBLine Status
On Tue, Sep 25, 2012 at 10:12:50AM -0600, mathieu.poir...@linaro.org wrote:
> From: "Mathieu J. Poirier"
>
> Signed-off-by: Mathieu Poirier
> ---
[...]
> diff --git a/drivers/power/ab8500_fg.h b/drivers/power/ab8500_fg.h
> new file mode 100644
> index 000..5cfadc2
> --- /dev/null
> +++
On 09/27/2012 03:44 PM, Tim Chen wrote:
Version 2
This version of the patch series fixes compilation errors for
32 bit x86 targets.
Version 1
This patch series optimized CRC32C calculations with PCLMULQDQ
instruction for crc32c-intel module. It speeds up the original
implementation by 1.6x for
On Tue, Sep 25, 2012 at 10:12:49AM -0600, mathieu.poir...@linaro.org wrote:
> From: Hakan Berg
>
> Timers used for charging safety and maintenance must work even when
> CPU is power collapsed. By using hrtimers with realtime clock, system
> is able to trigger an alarm that wakes the CPU up and
On Thu, Sep 27, 2012 at 07:35:10PM -0700, Anton Vorontsov wrote:
[...]
> abx500_chargalg_check_safety_timer()
> {
> if (di->batt_data.percent < 100) {
> dev_dbg(di->dev, "stopping safety timer\n");
> abx500_chargalg_stop_safety_timer(di);
> return;
>
Microsoft Debug Port Table (DBGP or DBG2) is required for Windows SoC
platforms. This patch is introduced to fix the gap between Windows
and Linux.
Signed-off-by: Lv Zheng
---
Documentation/kernel-parameters.txt |1 +
arch/x86/Kconfig.debug | 15 +++
DesignWare SPI UART is used as one of the debug ports on Low Power Intel
Architecture (LPIA) platforms. This patch is introduced to support this
debugging console reported by ACPI DBGP/DBG2. The original MID SPI
early console stuff is also refined to co-exist with the new ACPI usage
model.
Microsoft Debug Port Table (DBGP or DBG2) is used by the Windows SoC
platforms to describe their debugging facilities.
Recent Low Power Intel Architecture (LPIA) platforms have utilized
this for the SPI UART debug ports that are resident on their debug
boards.
This patch set enables the DBGP/DBG2
On Tue, Sep 25, 2012 at 10:12:48AM -0600, mathieu.poir...@linaro.org wrote:
> From: "Mathieu J. Poirier"
>
> A lot of developement happened internally since the first
> mainlining of the battery managmenent driver. Most of the
> new code can be historically accounted for but some of it
> can't.
On Thu, Sep 27, 2012 at 5:46 PM, "Jan H. Schönherr"
wrote:
> Am 27.09.2012 15:39, schrieb Kay Sievers:
>> It is a flag that we have not been able to merge a continuation line
>> in the buffer, because we had a race with another thread, or the
>> console lock was taken for a long time and we
On 09/27/2012 03:33 PM, Seiji Aguchi wrote:
> Hi,
>
>> ... except the cost can be reduced to zero *AND* be made into a more general
>> mechanism by simply hooking the IDT.
>
> Thank you for giving me the comment.
> In my understanding, we can introduce a more general mechanism by
>
On Tue, Sep 25, 2012 at 10:12:47AM -0600, mathieu.poir...@linaro.org wrote:
> From: Hakan Berg
>
> When the charging safety timer is elapsed the battery health is shown as
> "Good".
> This is misleading and also hard to distingiush problems reported on "phone
> discharges although charger is
On 09/05/2012 05:25 PM, we...@cn.fujitsu.com wrote:
From: Yasuaki Ishimatsu
remove_memory() only try to offline pages. It is called in two cases:
1. hot remove a memory device
2. echo offline >/sys/devices/system/memory/memoryXX/state
In the 1st case, we should also change memory block's
From: Xianhan Yu
Fix the touch-up no response problem on GeneralTouch twofingers touchscreen and
modify the driver for new GeneralTouch PWT touchscreen.
Signed-off-by: Xianhan Yu
---
drivers/hid/hid-ids.h|1 +
drivers/hid/hid-multitouch.c | 20 ++--
2 files
On 28.09.2012, at 04:04, Linus Torvalds wrote:
> On Thu, Sep 27, 2012 at 6:55 PM, Alexander Graf wrote:
>>
>> Below are OOPS excerpts from different rc's I tried. All of them crashed -
>> all the way up to current Linus' master branch. I haven't cross-checked, but
>> I don't remember any
From: Stephen Rothwell
Date: Fri, 28 Sep 2012 11:43:35 +1000
> Hi all,
>
> After merging the net-next tree, today's linux-next build (powerpc
> ppc64_defconfig) failed like this:
>
> drivers/net/ethernet/emulex/benet/be_main.c: In function 'be_find_vfs':
>
On Tue, Sep 25, 2012 at 10:12:46AM -0600, mathieu.poir...@linaro.org wrote:
> From: "Mathieu J. Poirier"
No reasoning behind the change?
> Signed-off-by: Mathieu Poirier
> ---
> drivers/power/abx500_chargalg.c |2 --
> 1 files changed, 0 insertions(+), 2 deletions(-)
>
> diff --git
On Thursday 20 September 2012 18:50:35 Thierry Reding wrote:
> Since the pwm-backlight driver is lacking a proper maintainer and is the
> heaviest user of the PWM framework I'm taking over maintenance.
>
> Signed-off-by: Thierry Reding
> Cc: Arun Murthy
> Cc: Matthew Garrett
> Cc: Robert
On Thu, Sep 27, 2012 at 6:55 PM, Alexander Graf wrote:
>
> Below are OOPS excerpts from different rc's I tried. All of them crashed -
> all the way up to current Linus' master branch. I haven't cross-checked, but
> I don't remember any such behavior from pre-3.6 releases.
Since you seem to be
well, I guess my new email provider is worse than the old one, as only
the summary email appears to have made it through. I'll try something
else tomorrow :(
Daniel
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To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majord...@vger.kernel.org
At 09/27/2012 06:35 PM, Vasilis Liaskovitis Wrote:
> On Thu, Sep 27, 2012 at 02:37:14PM +0800, Wen Congyang wrote:
>> Hi Vasilis Liaskovitis
>>
>> At 09/27/2012 12:46 AM, Vasilis Liaskovitis Wrote:
>>> Hi,
>>>
>>> I am testing 3.6.0-rc7 with this v9 patchset plus more recent fixes
>>> [1],[2],[3]
2012/9/27, Jan Kara :
> On Thu 27-09-12 15:00:18, Namjae Jeon wrote:
>> 2012/9/27, Jan Kara :
>> > On Thu 27-09-12 00:56:02, Wu Fengguang wrote:
>> >> On Tue, Sep 25, 2012 at 12:23:06AM +0200, Jan Kara wrote:
>> >> > On Thu 20-09-12 16:44:22, Wu Fengguang wrote:
>> >> > > On Sun, Sep 16, 2012 at
From: Fabio Estevam
On a mx53qsb dt-kernel the da9052-core driver fails to probe as follows:
da9052 1-0048: DA9052 ADC IRQ failed ret=-22
The reason for the error was due to passing only the offset as the interrupt
number in request_threaded_irq().
The recommended approach though is to use
Throughout compiler*.h, many version checks are made. These can be
simplified by using the macro that gcc's documentation recommends.
However, my primary reason for adding this is that I need bug-check
macros that are enabled at certain gcc versions and it's cleaner to use
this macro than the
__linktime_error() does the same thing as __compiletime_error() and is
only used in bug.h. Since the macro defines a function attribute that
will cause a failure at compile-time (not link-time), it makes more
sense to keep __compiletime_error(), which is also neatly mated with
For gcc 4.1 & later, expands to __attribute__((flatten)) which forces
the compiler to inline everything it can into the function. This is
useful in combination with noinline when you want to control the depth
of inlining, or create a single function where inline expansions will
occur. (see
Howdy,
While running 3.6.0-rcX I am having a few issues with nfsd on my PPC970 based
system. For some reason every time I actually end up accessing an NFS share on
it, it crashes away at random points. It looks a lot like corrupted pointers in
all logs. I also can't reproduce the oopses
Signed-off-by: Daniel Santos
---
include/linux/bug.h |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/include/linux/bug.h b/include/linux/bug.h
index aaac4bb..298a916 100644
--- a/include/linux/bug.h
+++ b/include/linux/bug.h
@@ -73,7 +73,7 @@ extern int
Using GCC_VERSION reduces complexity, is easier to read and is GCC's
recommended mechanism for doing version checks. (Just don't ask me why
they didn't define it in the first place.) This also makes it easy to
merge compiler-gcc{3,4}.h should somebody want to.
Signed-off-by: Daniel Santos
---
This helps to keep the file from getting confusing, removes one
duplicate version check and should encourage future editors to put new
macros where they belong.
Signed-off-by: Daniel Santos
---
include/linux/compiler-gcc4.h | 20 +++-
1 files changed, 11 insertions(+), 9
__attribute__((error(msg))) was introduced in gcc 4.3 (not 4.4) and as I
was unable to find any gcc bugs pertaining to it, I'm presuming that it
has functioned as advertised since 4.3.0.
Signed-off-by: Daniel Santos
---
include/linux/compiler-gcc4.h |2 +-
1 files changed, 1 insertions(+),
This revised patch set is rebased onto linux-mmotm.
I have a new mail provider now, but they seem just as bad as the last, so I'm
going to try to split the recpients in half and pray that this goes through.
I'm sorry to those of you who have gotten partial patch sets and I hope to get
this
At 09/28/2012 04:17 AM, KOSAKI Motohiro Wrote:
> On Thu, Sep 27, 2012 at 1:45 AM, wrote:
>> From: Wen Congyang
>>
>> hwpoisoned may set when we offline a page by the sysfs interface
>> /sys/devices/system/memory/soft_offline_page or
>> /sys/devices/system/memory/hard_offline_page. If we don't
Commit-ID: 4901b402c957d4ebaff123ffc34fafe3cef99542
Gitweb: http://git.kernel.org/tip/4901b402c957d4ebaff123ffc34fafe3cef99542
Author: Thomas Renninger
AuthorDate: Wed, 26 Sep 2012 14:19:01 +0200
Committer: H. Peter Anvin
CommitDate: Thu, 27 Sep 2012 15:01:43 -0700
ACPI: Document ACPI
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