On 22 February 2016 at 21:02, Russell King - ARM Linux
wrote:
> On Mon, Feb 22, 2016 at 08:17:11PM +0100, Ard Biesheuvel wrote:
>> I am not exactly sure why ioremap_cache() does not use MT_MEMORY_RW
>> attributes, but the ARM architecture simply does not allow mismatched
>> attributes, so we canno
Remove struct device from drivers global data and use regmap
API to retrieve device info instead.
This replacement can be done for drivers that include regmap
in their global data.
Signed-off-by: Alison Schofield
---
drivers/staging/iio/light/isl29018.c | 28 +++-
1 file
From: Dinh Nguyen
There are some Arria10 clocks of type "altr,socfpga-a10-perip-clk" that can
have multiple parents. Fix up the __socfpga_periph_init() to call
of_clk_parent_fill() that will return the appropriate number of parents.
Also, update __socfpga_gate_init() to call of_clk_parent_fill()
On Mon, Feb 22, 2016 at 10:14:50PM +0200, Michael S. Tsirkin wrote:
> On Sun, Feb 21, 2016 at 08:06:17AM -0500, Gabriel L. Somlo wrote:
> > > > +static void fw_cfg_io_cleanup(void)
> > > > +{
> > > > + if (fw_cfg_is_mmio) {
> > > > + iounmap(fw_cfg_dev_base);
> > > > +
On Mon, 22 Feb 2016 14:08:22 -0300
Daniel Bristot de Oliveira wrote:
> The operation '%' is not implemented on event-parse.c, causing
> an error on the parse of events with '%' operation on its
> printk format. For example,
>
> # perf record -e sched:sched_deadline_yield ~/y
> Warning: [sched:
Hi Guenter,
Please don't do things like this to me:
On Sun, Feb 21, 2016 at 10:22 AM, Guenter Roeck wrote:
>
> Please pull hwmon fixes for Linux v4.5-rc6 from signed tag:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git
> hwmon-v4.5-rc6
>
> ...
>
> git://git.ker
On Sun, Feb 21, 2016 at 08:06:17AM -0500, Gabriel L. Somlo wrote:
> > > +static void fw_cfg_io_cleanup(void)
> > > +{
> > > + if (fw_cfg_is_mmio) {
> > > + iounmap(fw_cfg_dev_base);
> > > + release_mem_region(fw_cfg_p_base, fw_cfg_p_size);
> > > + } else {
> > > + ioport_unm
On Mon, 22 Feb 2016 19:37:59 +0530
Laxman Dewangan wrote:
> Use devm_gpiochip_add_data() for GPIO registration.
>
> Signed-off-by: Laxman Dewangan
> Cc: Alban Bedel
> ---
> drivers/gpio/gpio-ath79.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpio/gpio-at
On 02/22/2016 05:35 AM, Colin King wrote:
From: Colin Ian King
passing rtl_stats by value is inefficient; the structure is over 300
bytes in size and generally just one field (packet_report_type)
is being accessed, so the pass by value is a relatively large overhead.
This change just affects ju
On 02/22/2016 02:48 PM, Steven Rostedt wrote:
> On Mon, 22 Feb 2016 18:32:59 +0100
> Peter Zijlstra wrote:
>
>
>> > So I'm a bit allergic to tracepoints and this is very flimsy on reasons
>> > why I would want to do this.
> Because there's no way to know if SCHED_DEADLINE tasks are doing what
On 22/02/16 18:42, Tony Lindgren wrote:
> * Roger Quadros [160222 02:16]:
>> On 20/02/16 00:04, Tony Lindgren wrote:
>>> * Roger Quadros [160219 13:27]:
Hi,
@Tony
Patches 15 and 24 are new and will need your review.
I've modified patch 22 to include the new am335x boards
Some devices take longer than the spec indicates to return from FLR
reset, a notable case of this is Intel integrated graphics (IGD),
which can often take an additional 300ms powering down an attached
LCD panel as part of the FLR. Allow devices up to 1000ms, testing
every 100ms whether the second
On 02/19/2016 09:18 AM, David Howells wrote:
> Move the RSA EMSA-PKCS1-v1_5 encoding from the asymmetric-key public_key
> subtype to the rsa crypto module. This means that the public_key subtype
> no longer has any dependencies on public key type.
>
> To make this work, I've made the following ch
Regulator stuff and pin configuration copied from imx6qdl-nitrogen6_max.dtsi
and checked against Boundary Devices linux kernel tree ([1]).
[1]
https://github.com/boundarydevices/linux-imx6/blob/boundary-imx_3.14.28_1.0.0_ga/arch/arm/boot/dts/imx6qdl-nitrogen6x.dtsi
Signed-off-by: Peter Seiderer
On 02/19/2016 09:18 AM, David Howells wrote:
>
> Here's a set of patches that cleans up the public key handling in the
> asymmetric key functions:
>
> (1) - (3) These are Tadeusz's RSA akcipher conversion.
Thanks for taking this David.
>
> (4) This removes all knowledge of RSA from the softw
On Mon, Feb 22, 2016 at 08:17:11PM +0100, Ard Biesheuvel wrote:
> I am not exactly sure why ioremap_cache() does not use MT_MEMORY_RW
> attributes, but the ARM architecture simply does not allow mismatched
> attributes, so we cannot simply replace each instance of
> ioremap_cache() with memremap()
On 02/22/2016 11:00 AM, Yu-cheng Yu wrote:
> + if (xsave->header.xfeatures & XFEATURE_MASK_SUPERVISOR)
> + xsave->header.xfeatures = xfeatures | XFEATURE_MASK_SUPERVISOR;
> + else
> + xsave->header.xfeatures = xfeatures;
This is dangerous. It says, "if any supervis
On 02/22/2016 10:59 AM, Yu-cheng Yu wrote:
> This actually does not apply to XSAVES as XSAVES uses optimization. After
> init, all components are in INIT and not MODIFIED state and will not be
> saved. There is no need of setting xcomp_bv except for bit 63 to indicate
> a compacted format.
I look
On Mon, Feb 22, 2016 at 11:17 AM, Ard Biesheuvel
wrote:
> On 22 February 2016 at 20:05, Dan Williams wrote:
>> On Mon, Feb 22, 2016 at 6:02 AM, Ard Biesheuvel
>> wrote:
>>> Currently, the memremap code serves MEMREMAP_WB mappings directly from
>>> the kernel direct mapping, unless the region is
On Mon, Feb 22, 2016 at 4:20 AM, Linus Walleij wrote:
> This is a duct-tape-and-chewing-gum solution to the problem
> with the major numbers running out when allocating major
> numbers dynamically.
Ok, much less hacky, but now the initialization is fairly unreadable,
even if the comment kind of s
Add 'of_nvmem_cell_from_device_node()' -- a function that allows to
obtain 'struct nvmem_cell' from a device tree node representing it. One
use-case for such a function would be to access nvmem cells with known
phandles.
Signed-off-by: Andrey Smirnov
---
drivers/nvmem/core.c | 44 +
Add 'nvmem-blob' driver, which allows to access device tree embedded
data via NVMEM subsystem API.
Signed-off-by: Andrey Smirnov
---
Documentation/devicetree/bindings/nvmem/blob.txt | 35 ++
drivers/nvmem/Makefile | 1 +
drivers/nvmem/blob.c
Hello,
This RFC introduces two new drivers to NVMEM subsytem. First driver,
'nvmem-blob', serves the purpose of exposing data, embedded in DTB,
via NVMEM consumer API. Second, 'nvmem-composite', allows the user to
combin a number of NVMEM cells (or parts of them) into a single
continuos "blob" of
Add 'nvmem-composite' driver which allows to combine multiple chunks of
various NVMEM cells into a single continuous NVMEM device.
Signed-off-by: Andrey Smirnov
---
.../devicetree/bindings/nvmem/composite.txt| 44
drivers/nvmem/Makefile | 1 +
drivers/
On 2/22/2016 11:41 AM, Scott Branden wrote:
My comments below
On 16-02-22 11:36 AM, Dmitry Torokhov wrote:
On Fri, Feb 19, 2016 at 11:43:50AM +0530, Raveendra Padasalagi wrote:
On Thu, Feb 18, 2016 at 8:06 PM, Rob Herring wrote:
On Wed, Feb 17, 2016 at 03:13:44PM +0530, Raveendra Padasalag
On Wed, Feb 17, 2016 at 02:19:26PM +0100, Manfred Schlaegl wrote:
> If the pwm can sleep defer actions to it using a worker.
> A similar approach was used in leds-pwm (c971ff185)
>
> Trigger:
> On a Freescale i.MX53 based board we ran into "BUG: scheduling while
> atomic" because input_inject_even
On Mon, Feb 22, 2016 at 09:58:27AM +0100, Michael Hennerich wrote:
> On 11/19/2015 09:22 AM, Michael Hennerich wrote:
> >On 11/18/2015 05:16 PM, Dan Bogdan Nechita wrote:
> >>Currently writing the attributes with "echo" will result in comparing:
> >>"enabled\n" with "enabled\0" and attribute is alw
My comments below
On 16-02-22 11:36 AM, Dmitry Torokhov wrote:
On Fri, Feb 19, 2016 at 11:43:50AM +0530, Raveendra Padasalagi wrote:
On Thu, Feb 18, 2016 at 8:06 PM, Rob Herring wrote:
On Wed, Feb 17, 2016 at 03:13:44PM +0530, Raveendra Padasalagi wrote:
In Cygnus SOC touch screen controller
+++ Andy Shevchenko [22/02/16 11:27 +0200]:
On Fri, 2016-02-19 at 20:20 -0500, Jessica Yu wrote:
Hi,
This patch adds support for the '%[' conversion specifier for
sscanf().
Since functions that calculate substring lengths based on accepted or
rejected characters already exist in the kernel (nam
* John Ogness [160222 07:30]:
> Hi Tony,
>
> On 2016-02-11, Tony Lindgren wrote:
> >> At these speeds, nearly every DMA interrupt is accompanied by a
> >> spurious UART interrupt. So, sadly, the interrupts are doubled.
> >>
> >> It is on my TODO list to verify if the spurious UART interrupts
>
On 22 February 2016 at 12:00, Dan Williams wrote:
> On Mon, 2016-02-22 at 11:36 -0500, João Paulo Rechi Vita wrote:
>> This series implements an airplane-mode indicator LED trigger, which
>> can be
>> used by platform drivers. The default policy have have airplane-mode
>> set when
>> all the radio
On Fri, Feb 19, 2016 at 11:43:50AM +0530, Raveendra Padasalagi wrote:
> On Thu, Feb 18, 2016 at 8:06 PM, Rob Herring wrote:
> > On Wed, Feb 17, 2016 at 03:13:44PM +0530, Raveendra Padasalagi wrote:
> >> In Cygnus SOC touch screen controller registers are shared
> >> with ADC and flex timer. Using
We know "len" is not zero because we tested for that at the beginning of
the function so this test can be removed.
Signed-off-by: Dan Carpenter
diff --git a/drivers/staging/gdm72xx/gdm_wimax.c
b/drivers/staging/gdm72xx/gdm_wimax.c
index 6d647d6..09bf64e 100644
--- a/drivers/staging/gdm72xx/gdm_
"size" here should be unsigned, otherwise we might end up trying to copy
negative bytes in gdm_wimax_ioctl_get_data() resulting in an information
leak.
Reported-by: Alan Cox
Signed-off-by: Dan Carpenter
diff --git a/drivers/staging/gdm72xx/wm_ioctl.h
b/drivers/staging/gdm72xx/wm_ioctl.h
index
On Mon, Feb 22, 2016 at 07:39:36PM +0100, Thomas Gleixner wrote:
> On Sun, 21 Feb 2016, William Breathitt Gray wrote:
>
> > On 01/27/2016 05:07 AM, Thomas Gleixner wrote:
> > > On Fri, 22 Jan 2016, William Breathitt Gray wrote:
> > >> Many motherboards utilize a LPC to ISA bridge in order to decod
We pad the start of this buffer with 256 bytes of padding. It's not
clear to me exactly what's going on or how it's used but let's zero it
out.
Signed-off-by: Dan Carpenter
diff --git a/drivers/staging/gdm72xx/usb_boot.c
b/drivers/staging/gdm72xx/usb_boot.c
index 3082987..4431a80 100644
--- a
We had an underflow bug here and I think I fixed it but we may as
well be proactive and make "len" unsigned to be double sure.
Signed-off-by: Dan Carpenter
diff --git a/drivers/staging/gdm72xx/gdm_wimax.h
b/drivers/staging/gdm72xx/gdm_wimax.h
index 3330cd79..ed12813 100644
--- a/drivers/staging
The value of "group" comes from "idx" in __gdm_wimax_event_send():
if (sscanf(e->dev->name, "wm%d", &idx) == 1)
Smatch marks sscanf values as user controlled. It's supposed to be a
number in 0-30 range. We cap the upper bound but allow negatives. Fix
this by making it type u16 instead.
Provide an interface for the airplane-mode indicator be controlled from
userspace. User has to first acquire the control through
RFKILL_OP_AIRPLANE_MODE_INDICATOR_ACQUIRE and keep the fd open for the
whole time it wants to be in control of the indicator. Closing the fd
restores the default policy.
If nlh->nlmsg_len is less than ND_IFINDEX_LEN we end up trying to memcpy
a negative size. I also re-ordered slighty the condition to make it
more uniform.
Signed-off-by: Dan Carpenter
diff --git a/drivers/staging/gdm72xx/netlink_k.c
b/drivers/staging/gdm72xx/netlink_k.c
index cf0b47c..4089b17
On Fri, Feb 19, 2016 at 3:07 PM, Laura Abbott wrote:
> On 02/19/2016 02:19 PM, Kees Cook wrote:
>>
>> On Fri, Feb 19, 2016 at 2:11 PM, Laura Abbott wrote:
>>>
>>> On 02/19/2016 11:12 AM, Kees Cook wrote:
On Thu, Feb 18, 2016 at 5:15 PM, Laura Abbott
wrote:
>
>
>>
These warnings still seem to be present with DP MST configurations. They
don't actually indicate any impending doom, so we may as well use
I915_STATE_WARN_ON() here to help quiet things down a little bit for
distro kernel users.
Signed-off-by: Lyude
---
drivers/gpu/drm/i915/intel_pm.c | 2 +-
1
On Mon 2016-02-22 15:59:48, Diego Viola wrote:
> On Mon, Feb 22, 2016 at 7:09 AM, Pavel Machek wrote:
> > Hi!
> >
> >> Every time I initiate a suspend (systemctl suspend) the machine hangs
> >> at resume unless I unload the jme driver.
> >
> > It seems to have some kind of suspend/resume
On Friday 02/19 at 07:14 -0600, Corey Minyard wrote:
> On 02/19/2016 12:41 AM, Calvin Owens wrote:
> >Hello,
> >
> >I've got a few boxes that are leaking memory in handle_new_recv_msgs()
> >in ipmi_msghandler. AFAICS this is intentional, there's even an explicit
> >counter that tracks the number of
* Nishanth Menon [160222 08:51]:
> Add EEPROM at 0x50 that describes the board configuration.
> This is useful for userspace programs that may need to check board
> revision and other similar information.
>
> Signed-off-by: Nishanth Menon
> ---
> arch/arm/boot/dts/am57xx-beagle-x15.dts | 5
On 2/22/2016 4:43 AM, Aaro Koskinen wrote:
Hi,
On Fri, Feb 19, 2016 at 05:12:41PM -0800, Yang Shi wrote:
I tried to boot 4.5-rc4 kernel on my CN6880 board, but it is failed at
booting up secondary cores. The error is:
With v4.5-rc5, EBB6800 is booting fine:
[0.00] CPU0 revision is: 00
On 22 February 2016 at 20:05, Dan Williams wrote:
> On Mon, Feb 22, 2016 at 6:02 AM, Ard Biesheuvel
> wrote:
>> Currently, the memremap code serves MEMREMAP_WB mappings directly from
>> the kernel direct mapping, unless the region is in high memory, in which
>> case it falls back to using ioremap
On Mon, Feb 22, 2016 at 2:10 AM, Thomas Petazzoni
wrote:
> Hello,
>
> FWIW, you're replying to the v1 of this patch, while v2 and v3 have
> already been posted, and v3 has already been merged by the irqchip
> maintainers:
>
>
> http://git.kernel.org/cgit/linux/kernel/git/tip/tip.git/commit/?id=
Thierry,
On Mon, Feb 22, 2016 at 9:59 AM, Thierry Reding
wrote:
>> This is because only some drivers would be able to read the hardware
>> state? I'm not sure how we can get away from that. In all proposals
>> we've talked about (including what you propose below, right?) the PWM
>> regulator wi
Andi,
On Mon, 22 Feb 2016, Andi Kleen wrote:
> Thomas Gleixner writes:
>
> > Add the necessary exit functions so it can be built as a module.
>
> If you make it a module you also need to add MODULE_DEVICE_TABLE
> for the PCI IDs and also add x86_cpu_id tables/annotations
> for the model number
On Mon, Feb 22, 2016 at 09:08:28PM +0200, Jarkko Sakkinen wrote:
> On Mon, Feb 22, 2016 at 10:52:45AM -0700, Jason Gunthorpe wrote:
> > On Mon, Feb 22, 2016 at 04:50:23PM +0200, Jarkko Sakkinen wrote:
> >
> > > I already pushed a fix to my master for this issue:
> > >
> > > https://github.com/jsa
On Mon, 22 Feb 2016 19:58:18 +0100,
Martin Kepplinger wrote:
>
> Am 2016-02-22 um 15:12 schrieb Takashi Iwai:
> > On Mon, 22 Feb 2016 15:02:56 +0100,
> > Martin Kepplinger wrote:
> >>> And how about my questions in the previous mail? Does
> >>> i915_audio_component_get_eld() is called and returns
On Sun, Feb 21, 2016 at 12:41:21PM +0100, Álvaro Fernández Rojas wrote:
> This adds a device tree example for SFR Neufbox4 (Sercomm version), which
> also serves as a real example for brcm,bcm6358-leds.
>
> Signed-off-by: Álvaro Fernández Rojas
> ---
> v2: Remove led0 alias and use stdout-path o
On Mon, Feb 22, 2016 at 10:52:45AM -0700, Jason Gunthorpe wrote:
> On Mon, Feb 22, 2016 at 04:50:23PM +0200, Jarkko Sakkinen wrote:
>
> > I already pushed a fix to my master for this issue:
> >
> > https://github.com/jsakkine/linux-tpmdd/commit/6386544ad7bceb3d0248b85da29d4d99eebe9161
>
> The go
Andi,
On Mon, 22 Feb 2016, Andi Kleen wrote:
> Thomas Gleixner writes:
> > + if (c->cpuid_level >= 0x0001) {
> > + u32 eax, ebx, ecx, edx;
> > +
> > + cpuid(0x0001, &eax, &ebx, &ecx, &edx);
>
> Use cpuid_edx()
That does not give me EBX ...
> > + /*
> >
* Pavel Machek [160221 06:05]:
> On Sun 2016-02-21 12:28:23, Pali Rohár wrote:
> > This change does not break existing userspace or Maemo software because
> > isp1704_charger.c always export power supply device under isp1704 name.
>
> ..exports..
>
> > Signed-off-by: Pali Rohár
>
> 4,5,6: Acke
On Mon, Feb 22, 2016 at 6:02 AM, Ard Biesheuvel
wrote:
> Currently, the memremap code serves MEMREMAP_WB mappings directly from
> the kernel direct mapping, unless the region is in high memory, in which
> case it falls back to using ioremap_cache(). However, the semantics of
> ioremap_cache() are
Component offset print out was incorrect for XSAVES. Correct it and move
to a separate function.
Signed-off-by: Yu-cheng Yu
---
arch/x86/kernel/fpu/xstate.c | 18 --
1 file changed, 16 insertions(+), 2 deletions(-)
diff --git a/arch/x86/kernel/fpu/xstate.c b/arch/x86/kernel/fpu/
From: Dan Williams
The recent *sync enabling discovered that we are inserting into the
block_device pagecache counter to the expectations of the dirty data
tracking for dax mappings. This can lead to data corruption.
We want to support DAX for block devices eventually, but it requires
wider cha
We did not handle XSAVES* instructions correctly. There were issues in
converting between standard and compacted format when interfacing with
user-space. These issues have been corrected.
Signed-off-by: Yu-cheng Yu
---
arch/x86/kernel/fpu/init.c | 15 ---
1 file changed, 15 deletions
Online defrag operations for ext4 are hard coded to use the page cache.
See ext4_ioctl() -> ext4_move_extents() -> move_extent_per_page()
When combined with DAX I/O, which circumvents the page cache, this can
result in data corruption. This was observed with xfstests ext4/307 and
ext4/308.
Fix t
When S_DAX is set on an inode we assume that if there are pages attached
to the mapping (mapping->nrpages != 0), those pages are clean zero pages
that were used to service reads from holes. Any dirty data associated with
the inode should be in the form of DAX exceptional entries
(mapping->nrexcept
XSAVES uses compacted format and is a kernel instruction. The kernel
should use standard-format, non-supervisor state data for PTRACE.
Signed-off-by: Yu-cheng Yu
---
arch/x86/include/asm/fpu/xstate.h | 4 +
arch/x86/kernel/fpu/regset.c | 56 +
arch/x86/kernel/fpu/xstate.c
CPUID function 0x0d, sub function (i, i > 1) returns in ecx[1] the
alignment requirement of component i when the compacted format is used.
If ecx[1] is 0, component i is located immediately following the preceding
component. If ecx[1] is 1, component i is located on the next 64-byte
boundary follo
In setup_init_fpu_buf(), we use XRSTOR/XRSTORS with xfeatures (xstate_bv)
of 0x0 to effectively set all xstate components to init values. We then
execute XSAVE/XSAVES on the same buffer to save back init values.
This actually does not apply to XSAVES as XSAVES uses optimization. After
init, all co
Changes since v3:
- Added Reviewed-by tags from Jan Kara.
- Dropped patch 6, "block: use dax_do_io() if blkdev_dax_capable()"
I believe that this series is ready for inclusion in v4.5. I think it
should be merged for v4.5 because it fixes serious issues with the DAX code
including possible data c
* Pavel Machek [160222 02:55]:
> On Sun 2016-02-21 12:06:48, Pali Rohár wrote:
> > This makes DTS structure more readable.
> >
> > Signed-off-by: Pali Rohár
>
> Acked-by: Pavel Machek
Applying into omap-for-v4.6/dt.
Thanks,
Tony
CPUID function 0x0d, sub function (i, i > 1) returns in ebx the offset of
xstate component i. Zero is returned for a supervisor state. A supervisor
state can only be saved by XSAVES and XSAVES uses a compacted format.
There is no fixed offset for a supervisor state. This patch checks and
makes sure
XSAVES is a kernel instruction and uses a compacted format. When
working with user space, the kernel should provide standard-format,
non-supervisor state data. We cannot do __copy_to_user() from a compacted-
format kernel xstate area to a signal frame.
Note that the path to copy_fpstate_to_sigfram
User space uses standard format xsave area. fpstate in signal frame should
have standard format size.
To explicitly distinguish between xstate size in kernel space and the one
in user space, we rename xstate_size to kernel_xstate_size. This patch is
not fixing a bug. It just makes kernel code more
Keep init_fpstate.xsave.header.xfeatures as zero for init optimization.
This is important for init optimization that is implemented in processor.
If a bit corresponding to an xstate in xstate_bv is 0, it means the
xstate is in init status and will not be read from memory to the processor
during XRS
On Mon, Feb 22, 2016 at 7:09 AM, Pavel Machek wrote:
> Hi!
>
>> Every time I initiate a suspend (systemctl suspend) the machine hangs
>> at resume unless I unload the jme driver.
>
> It seems to have some kind of suspend/resume support. ... and it is
> rather complex.
>
> Maybe jme_start
Am 2016-02-22 um 15:12 schrieb Takashi Iwai:
> On Mon, 22 Feb 2016 15:02:56 +0100,
> Martin Kepplinger wrote:
>>> And how about my questions in the previous mail? Does
>>> i915_audio_component_get_eld() is called and returns 0?
>>> And is monitor_present set true or false?
>>
>> i915_audio_compone
Previously calls to dax_writeback_mapping_range() for all DAX filesystems
(ext2, ext4 & xfs) were centralized in filemap_write_and_wait_range().
dax_writeback_mapping_range() needs a struct block_device, and it used to
get that from inode->i_sb->s_bdev. This is correct for normal inodes
mounted on
Andi,
On Mon, 22 Feb 2016, Andi Kleen wrote:
> Thomas Gleixner writes:
> >
> > +static void __init rapl_advertise(void)
> > +{
> > + int i;
> > +
> > + pr_info("API unit is 2^-32 Joules, %d fixed counters, %llu ms ovfl
> > timer\n",
> > + hweight32(rapl_cntr_mask), rapl_timer_ms
dax_clear_blocks() needs a valid struct block_device and previously it was
using inode->i_sb->s_bdev in all cases. This is correct for normal inodes
on mounted ext2, ext4 and XFS filesystems, but is incorrect for DAX raw
block devices and for XFS real-time devices.
Instead, rename dax_clear_block
If "xsaves" is enabled, kernel always uses compacted format of xsave area.
But user space still uses standard format of xsave area. Thus, xstate size
in kernel's xsave area is smaller than xstate size in user's xsave area.
The xstate in signal frame should be in standard format for user's signal
ha
XSAVES is a kernel-mode instruction. It offers a compacted format and
memory-write optimization. These patches fix known issues in the first
implementation. They are intended for discussion and getting feedback
before actually getting applied.
Patch 1, 2, and 4 are for converting between kernel-
On Fri, 2016-02-19 at 17:18 +, David Howells wrote:
> Here's a set of patches that cleans up the public key handling in the
> asymmetric key functions:
>
> (1) - (3) These are Tadeusz's RSA akcipher conversion.
Up to here, IMA-appraisal works properly.
Mimi
> (4) This removes all knowle
Thomas Gleixner writes:
> This series addresses the following issues:
FWIW I did a quick read through the series, and except where commented
it looks good to me.
Reviewed-by: Andi Kleen
-Andi
--
a...@linux.intel.com -- Speaking for myself only
On Sun, Feb 21, 2016 at 2:08 PM, Alasdair G Kergon wrote:
> On Sat, Feb 20, 2016 at 10:13:49AM -0800, Kees Cook wrote:
>> This is a resurrection of a patch series from a few years back, first
>> brought to the dm maintainers in 2010. It creates a way to define dm
>> devices on the kernel command l
Thomas Gleixner writes:
> +
> + if (c->cpuid_level >= 0x0001) {
> + u32 eax, ebx, ecx, edx;
> +
> + cpuid(0x0001, &eax, &ebx, &ecx, &edx);
Use cpuid_edx()
> + /*
> + * If HTT (EDX[28]) is set EBX[16:23] contain the number of
> +
On Mon, Feb 22, 2016 at 10:33 AM, Christopher Hall
wrote:
> I just sent another patchset (v8). I corrected the comment problems pointed
> out by Richard Cochran. I also changed the arch/x86 code to use "non-stop"
> TSC rather than "invariant" TSC. They are *exactly* the same thing (i.e.
> read fro
drivers/char/tpm/tpm_tis.c:838: warning: ‘tpm_tis_resume’ defined but
not used
Reported-by: James Morris
Fixes: 00194826e6be ("tpm_tis: Clean up the force=1 module parameter")
Signed-off-by: Jarkko Sakkinen
---
drivers/char/tpm/tpm_tis.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/dri
On Mon, Feb 22, 2016 at 04:41:22AM +0300, Sergei Ianovich wrote:
> DS1302 is half-duplex SPI device. The driver respects this fact now.
>
> Pin configurations should be implemented using SPI subsystem.
>
> Signed-off-by: Sergei Ianovich
> CC: Alexandre Belloni
> CC: Rob Herring
> ---
>v5..
Thomas Gleixner writes:
>
> +static void __init rapl_advertise(void)
> +{
> + int i;
> +
> + pr_info("API unit is 2^-32 Joules, %d fixed counters, %llu ms ovfl
> timer\n",
> + hweight32(rapl_cntr_mask), rapl_timer_ms);
Does the final resulting line contain RAPL for grepping
On Sun, 21 Feb 2016, William Breathitt Gray wrote:
> On 01/27/2016 05:07 AM, Thomas Gleixner wrote:
> > On Fri, 22 Jan 2016, William Breathitt Gray wrote:
> >> Many motherboards utilize a LPC to ISA bridge in order to decode
> >> ISA-style port-mapped I/O addresses. This is particularly true for
>
Thomas Gleixner writes:
> Add the necessary exit functions so it can be built as a module.
If you make it a module you also need to add MODULE_DEVICE_TABLE
for the PCI IDs and also add x86_cpu_id tables/annotations
for the model numbers.
Otherwise the module would always need to be loaded manua
Hi Dan,
I'm having some things that look like false positives when testing the media
drivers against smatch. This is bothering me for some time, but, as this was
harder to debug (as I needed to do a build with -j1), I postponed trying to
fix it for a while.
Basically, smatch is complaining for th
On Thu, 18 Feb 2016 11:26:24 -0800, John Stultz
wrote:
On Fri, Feb 12, 2016 at 12:25 PM, Christopher S. Hall
wrote:
Modern Intel hardware adds an Always Running Timer (ART) that allows the
network and audio device clocks to precisely cross timestamp the device
clock with the system clock. Thi
Wei,
Should changes to of-thermal should be discussed on linux-pm as opposed
to just linux-tegra and lkml?
Should you include Eduardo on the thread?
-Matt
On 02/22/2016 12:05 AM, Wei Ni wrote:
This patchset adds following functions for tegra_soctherm driver:
1. add T210 support.
2. export d
Quoting Sylwester Nawrocki (2016-02-17 02:03:36)
> On 16/02/16 07:20, Krzysztof Kozlowski wrote:
> > Currently the Exynos5433 (ARMv8 SoC) clock driver depends on ARCH_EXYNOS
> > so it is built also on ARMv7. This does not bring any kind of benefit.
> > There won't be a single kernel image for ARMv7
Hi,
another update of the Allwinner A64 / Pine64 support series.
I added a solution for the PLL6 reuse issue (the same patch I posted
yesterday). Also I addressed the comments I got from Rob and Chen-Yu.
For a changelog see below.
This series provides initial support for the Allwinner A64 SoC,
wh
Now that we can reuse the A31 PLL6 clock driver for clocks other then
PLL6 itself, describe the PLL8 clock properly.
Signed-off-by: Andre Przywara
---
arch/arm/boot/dts/sun8i-h3.dtsi | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/arm/boot/dts/sun8i-h3
Recent Allwinner SoCs introduced a bus gates clock which can have
different parents for individual gates.
For the time being we encoded this relation in the driver.
This commit specifies a new binding which allows to encode this in
the DT by using a child node for each parent clock used. This allow
The Pine64 is a cost-efficient development board based on the
Allwinner A64 SoC.
There are three models: the basic version with Fast Ethernet and
512 MB of DRAM (Pine64) and two Pine64+ versions, which both
feature Gigabit Ethernet and additional connectors for touchscreens
and a camera. Or as my s
The Allwinner A64 SoC is a low-cost chip with 4 ARM Cortex-A53 cores
and the typical tablet / TV box peripherals.
The SoC is based on the (32-bit) Allwinner H3 chip, sharing most of
the peripherals and the memory map.
Although the cores are proper 64-bit ones, the whole SoC is actually
limited to 4
The Allwinner H3 SoC introduced bus clock gates with potentially
different parents per clock gate. The H3 driver chose to hardcode the
actual parent clock relation in the code.
Add a new driver (which has the potential to drive the H3 and also
the simple clock gates as well) which uses the power of
To prepare for the Allwinner A64 SoC support, introduce a config
option to allow compiling Allwinner (aka. sunxi) specific drivers
for the arm64 architecture as well.
This patch just defines the ARCH_SUNXI symbol to allow Allwinner
specific drivers to be selected during kernel configuration.
Signe
Based on the Allwinner A64 user manual and on the previous sunxi
pinctrl drivers this introduces the pin multiplex assignments for
the ARMv8 Allwinner A64 SoC.
Port A is apparently used for the fixed function DRAM controller, so
the ports start at B here (the manual mentions "n from 1 to 7", so
not
501 - 600 of 1230 matches
Mail list logo
